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-rw-r--r--include/linux/dma-mapping.h12
-rw-r--r--include/linux/iommu-helper.h16
-rw-r--r--include/linux/pci_ids.h10
3 files changed, 38 insertions, 0 deletions
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 952e0f857ac9..ba9114ec5d3a 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -48,6 +48,11 @@ static inline int is_device_dma_capable(struct device *dev)
48 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 48 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
49} 49}
50 50
51static inline int is_buffer_dma_capable(u64 mask, dma_addr_t addr, size_t size)
52{
53 return addr + size <= mask;
54}
55
51#ifdef CONFIG_HAS_DMA 56#ifdef CONFIG_HAS_DMA
52#include <asm/dma-mapping.h> 57#include <asm/dma-mapping.h>
53#else 58#else
@@ -58,6 +63,13 @@ static inline int is_device_dma_capable(struct device *dev)
58#define dma_sync_single dma_sync_single_for_cpu 63#define dma_sync_single dma_sync_single_for_cpu
59#define dma_sync_sg dma_sync_sg_for_cpu 64#define dma_sync_sg dma_sync_sg_for_cpu
60 65
66static inline u64 dma_get_mask(struct device *dev)
67{
68 if (dev && dev->dma_mask && *dev->dma_mask)
69 return *dev->dma_mask;
70 return DMA_32BIT_MASK;
71}
72
61extern u64 dma_get_required_mask(struct device *dev); 73extern u64 dma_get_required_mask(struct device *dev);
62 74
63static inline unsigned int dma_get_max_seg_size(struct device *dev) 75static inline unsigned int dma_get_max_seg_size(struct device *dev)
diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h
index c975caf75385..a6d0586e2bf7 100644
--- a/include/linux/iommu-helper.h
+++ b/include/linux/iommu-helper.h
@@ -1,6 +1,20 @@
1#ifndef _LINUX_IOMMU_HELPER_H
2#define _LINUX_IOMMU_HELPER_H
3
4static inline unsigned long iommu_device_max_index(unsigned long size,
5 unsigned long offset,
6 u64 dma_mask)
7{
8 if (size + offset > dma_mask)
9 return dma_mask - offset + 1;
10 else
11 return size;
12}
13
1extern int iommu_is_span_boundary(unsigned int index, unsigned int nr, 14extern int iommu_is_span_boundary(unsigned int index, unsigned int nr,
2 unsigned long shift, 15 unsigned long shift,
3 unsigned long boundary_size); 16 unsigned long boundary_size);
17extern void iommu_area_reserve(unsigned long *map, unsigned long i, int len);
4extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, 18extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
5 unsigned long start, unsigned int nr, 19 unsigned long start, unsigned int nr,
6 unsigned long shift, 20 unsigned long shift,
@@ -8,3 +22,5 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
8 unsigned long align_mask); 22 unsigned long align_mask);
9extern void iommu_area_free(unsigned long *map, unsigned long start, 23extern void iommu_area_free(unsigned long *map, unsigned long start,
10 unsigned int nr); 24 unsigned int nr);
25
26#endif
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index a65b082a888a..f63b5455801c 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -497,6 +497,16 @@
497#define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP 0x1101 497#define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP 0x1101
498#define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL 0x1102 498#define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL 0x1102
499#define PCI_DEVICE_ID_AMD_K8_NB_MISC 0x1103 499#define PCI_DEVICE_ID_AMD_K8_NB_MISC 0x1103
500#define PCI_DEVICE_ID_AMD_10H_NB_HT 0x1200
501#define PCI_DEVICE_ID_AMD_10H_NB_MAP 0x1201
502#define PCI_DEVICE_ID_AMD_10H_NB_DRAM 0x1202
503#define PCI_DEVICE_ID_AMD_10H_NB_MISC 0x1203
504#define PCI_DEVICE_ID_AMD_10H_NB_LINK 0x1204
505#define PCI_DEVICE_ID_AMD_11H_NB_HT 0x1300
506#define PCI_DEVICE_ID_AMD_11H_NB_MAP 0x1301
507#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302
508#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
509#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
500#define PCI_DEVICE_ID_AMD_LANCE 0x2000 510#define PCI_DEVICE_ID_AMD_LANCE 0x2000
501#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 511#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
502#define PCI_DEVICE_ID_AMD_SCSI 0x2020 512#define PCI_DEVICE_ID_AMD_SCSI 0x2020