2 files changed, 54 insertions, 0 deletions

diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
index 4eab42bf2af9..071395251abf 100644
--- a/include/linux/pci-ats.h
+++ b/include/linux/pci-ats.h
@@ -17,6 +17,7 @@ struct pci_ats {
 extern int pci_enable_ats(struct pci_dev *dev, int ps);
 extern void pci_disable_ats(struct pci_dev *dev);
 extern int pci_ats_queue_depth(struct pci_dev *dev);
+
 /**
  * pci_ats_enabled - query the ATS status
  * @dev: the PCI device
@@ -51,4 +52,45 @@ static inline int pci_ats_enabled(struct pci_dev *dev)
 
 #endif /* CONFIG_PCI_IOV */
 
+#ifdef CONFIG_PCI_PRI
+
+extern int  pci_enable_pri(struct pci_dev *pdev, u32 reqs);
+extern void pci_disable_pri(struct pci_dev *pdev);
+extern bool pci_pri_enabled(struct pci_dev *pdev);
+extern int  pci_reset_pri(struct pci_dev *pdev);
+extern bool pci_pri_stopped(struct pci_dev *pdev);
+extern int  pci_pri_status(struct pci_dev *pdev);
+
+#else /* CONFIG_PCI_PRI */
+
+static inline int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
+{
+        return -ENODEV;
+}
+
+static inline void pci_disable_pri(struct pci_dev *pdev)
+{
+}
+
+static inline bool pci_pri_enabled(struct pci_dev *pdev)
+{
+        return false;
+}
+
+static inline int pci_reset_pri(struct pci_dev *pdev)
+{
+        return -ENODEV;
+}
+
+static inline bool pci_pri_stopped(struct pci_dev *pdev)
+{
+        return true;
+}
+
+static inline int pci_pri_status(struct pci_dev *pdev)
+{
+        return -ENODEV;
+}
+#endif /* CONFIG_PCI_PRI */
+
 #endif /* LINUX_PCI_ATS_H*/
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index e8840964aca1..7fc32aff94d2 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -663,6 +663,18 @@
 #define  PCI_ATS_CTRL_STU(x)    ((x) & 0x1f)    /* Smallest Translation Unit */
 #define  PCI_ATS_MIN_STU        12      /* shift of minimum STU block */
 
+/* Page Request Interface */
+#define PCI_PRI_CAP             0x13    /* PRI capability ID */
+#define PCI_PRI_CONTROL_OFF     0x04    /* Offset of control register */
+#define PCI_PRI_STATUS_OFF      0x06    /* Offset of status register */
+#define PCI_PRI_ENABLE          0x0001  /* Enable mask */
+#define PCI_PRI_RESET           0x0002  /* Reset bit mask */
+#define PCI_PRI_STATUS_RF       0x0001  /* Request Failure */
+#define PCI_PRI_STATUS_UPRGI    0x0002  /* Unexpected PRG index */
+#define PCI_PRI_STATUS_STOPPED  0x0100  /* PRI Stopped */
+#define PCI_PRI_MAX_REQ_OFF     0x08    /* Cap offset for max reqs supported */
+#define PCI_PRI_ALLOC_REQ_OFF   0x0c    /* Cap offset for max reqs allowed */
+
 /* Single Root I/O Virtualization */
 #define PCI_SRIOV_CAP           0x04    /* SR-IOV Capabilities */
 #define  PCI_SRIOV_CAP_VFM      0x01    /* VF Migration Capable */