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-rw-r--r--include/linux/usb/audio.h287
-rw-r--r--include/linux/usb/ch9.h8
-rw-r--r--include/linux/usb/ehci_def.h35
-rw-r--r--include/linux/usb/isp1362.h46
-rw-r--r--include/linux/usb/isp1760.h18
-rw-r--r--include/linux/usb/m66592.h44
-rw-r--r--include/linux/usb/r8a66597.h375
-rw-r--r--include/linux/usb/rndis_host.h13
-rw-r--r--include/linux/usb/serial.h13
-rw-r--r--include/linux/usb/usbnet.h19
-rw-r--r--include/linux/usb/video.h164
11 files changed, 856 insertions, 166 deletions
diff --git a/include/linux/usb/audio.h b/include/linux/usb/audio.h
index b5744bc218ab..eaf9dffe0a01 100644
--- a/include/linux/usb/audio.h
+++ b/include/linux/usb/audio.h
@@ -24,88 +24,78 @@
24#define USB_SUBCLASS_AUDIOCONTROL 0x01 24#define USB_SUBCLASS_AUDIOCONTROL 0x01
25#define USB_SUBCLASS_AUDIOSTREAMING 0x02 25#define USB_SUBCLASS_AUDIOSTREAMING 0x02
26#define USB_SUBCLASS_MIDISTREAMING 0x03 26#define USB_SUBCLASS_MIDISTREAMING 0x03
27#define USB_SUBCLASS_VENDOR_SPEC 0xff 27
28 28/* A.5 Audio Class-Specific AC Interface Descriptor Subtypes */
29/* A.5 Audio Class-Specific AC interface Descriptor Subtypes*/ 29#define UAC_HEADER 0x01
30#define HEADER 0x01 30#define UAC_INPUT_TERMINAL 0x02
31#define INPUT_TERMINAL 0x02 31#define UAC_OUTPUT_TERMINAL 0x03
32#define OUTPUT_TERMINAL 0x03 32#define UAC_MIXER_UNIT 0x04
33#define MIXER_UNIT 0x04 33#define UAC_SELECTOR_UNIT 0x05
34#define SELECTOR_UNIT 0x05 34#define UAC_FEATURE_UNIT 0x06
35#define FEATURE_UNIT 0x06 35#define UAC_PROCESSING_UNIT 0x07
36#define PROCESSING_UNIT 0x07 36#define UAC_EXTENSION_UNIT 0x08
37#define EXTENSION_UNIT 0x08 37
38 38/* A.6 Audio Class-Specific AS Interface Descriptor Subtypes */
39#define AS_GENERAL 0x01 39#define UAC_AS_GENERAL 0x01
40#define FORMAT_TYPE 0x02 40#define UAC_FORMAT_TYPE 0x02
41#define FORMAT_SPECIFIC 0x03 41#define UAC_FORMAT_SPECIFIC 0x03
42 42
43#define EP_GENERAL 0x01 43/* A.8 Audio Class-Specific Endpoint Descriptor Subtypes */
44 44#define UAC_EP_GENERAL 0x01
45#define MS_GENERAL 0x01 45
46#define MIDI_IN_JACK 0x02 46/* A.9 Audio Class-Specific Request Codes */
47#define MIDI_OUT_JACK 0x03 47#define UAC_SET_ 0x00
48 48#define UAC_GET_ 0x80
49/* endpoint attributes */ 49
50#define EP_ATTR_MASK 0x0c 50#define UAC__CUR 0x1
51#define EP_ATTR_ASYNC 0x04 51#define UAC__MIN 0x2
52#define EP_ATTR_ADAPTIVE 0x08 52#define UAC__MAX 0x3
53#define EP_ATTR_SYNC 0x0c 53#define UAC__RES 0x4
54 54#define UAC__MEM 0x5
55/* cs endpoint attributes */ 55
56#define EP_CS_ATTR_SAMPLE_RATE 0x01 56#define UAC_SET_CUR (UAC_SET_ | UAC__CUR)
57#define EP_CS_ATTR_PITCH_CONTROL 0x02 57#define UAC_GET_CUR (UAC_GET_ | UAC__CUR)
58#define EP_CS_ATTR_FILL_MAX 0x80 58#define UAC_SET_MIN (UAC_SET_ | UAC__MIN)
59 59#define UAC_GET_MIN (UAC_GET_ | UAC__MIN)
60/* Audio Class specific Request Codes */ 60#define UAC_SET_MAX (UAC_SET_ | UAC__MAX)
61#define USB_AUDIO_SET_INTF 0x21 61#define UAC_GET_MAX (UAC_GET_ | UAC__MAX)
62#define USB_AUDIO_SET_ENDPOINT 0x22 62#define UAC_SET_RES (UAC_SET_ | UAC__RES)
63#define USB_AUDIO_GET_INTF 0xa1 63#define UAC_GET_RES (UAC_GET_ | UAC__RES)
64#define USB_AUDIO_GET_ENDPOINT 0xa2 64#define UAC_SET_MEM (UAC_SET_ | UAC__MEM)
65 65#define UAC_GET_MEM (UAC_GET_ | UAC__MEM)
66#define SET_ 0x00 66
67#define GET_ 0x80 67#define UAC_GET_STAT 0xff
68 68
69#define _CUR 0x1 69/* MIDI - A.1 MS Class-Specific Interface Descriptor Subtypes */
70#define _MIN 0x2 70#define UAC_MS_HEADER 0x01
71#define _MAX 0x3 71#define UAC_MIDI_IN_JACK 0x02
72#define _RES 0x4 72#define UAC_MIDI_OUT_JACK 0x03
73#define _MEM 0x5 73
74 74/* MIDI - A.1 MS Class-Specific Endpoint Descriptor Subtypes */
75#define SET_CUR (SET_ | _CUR) 75#define UAC_MS_GENERAL 0x01
76#define GET_CUR (GET_ | _CUR) 76
77#define SET_MIN (SET_ | _MIN) 77/* Terminals - 2.1 USB Terminal Types */
78#define GET_MIN (GET_ | _MIN) 78#define UAC_TERMINAL_UNDEFINED 0x100
79#define SET_MAX (SET_ | _MAX) 79#define UAC_TERMINAL_STREAMING 0x101
80#define GET_MAX (GET_ | _MAX) 80#define UAC_TERMINAL_VENDOR_SPEC 0x1FF
81#define SET_RES (SET_ | _RES)
82#define GET_RES (GET_ | _RES)
83#define SET_MEM (SET_ | _MEM)
84#define GET_MEM (GET_ | _MEM)
85
86#define GET_STAT 0xff
87
88#define USB_AC_TERMINAL_UNDEFINED 0x100
89#define USB_AC_TERMINAL_STREAMING 0x101
90#define USB_AC_TERMINAL_VENDOR_SPEC 0x1FF
91 81
92/* Terminal Control Selectors */ 82/* Terminal Control Selectors */
93/* 4.3.2 Class-Specific AC Interface Descriptor */ 83/* 4.3.2 Class-Specific AC Interface Descriptor */
94struct usb_ac_header_descriptor { 84struct uac_ac_header_descriptor {
95 __u8 bLength; /* 8 + n */ 85 __u8 bLength; /* 8 + n */
96 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ 86 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
97 __u8 bDescriptorSubtype; /* USB_MS_HEADER */ 87 __u8 bDescriptorSubtype; /* UAC_MS_HEADER */
98 __le16 bcdADC; /* 0x0100 */ 88 __le16 bcdADC; /* 0x0100 */
99 __le16 wTotalLength; /* includes Unit and Terminal desc. */ 89 __le16 wTotalLength; /* includes Unit and Terminal desc. */
100 __u8 bInCollection; /* n */ 90 __u8 bInCollection; /* n */
101 __u8 baInterfaceNr[]; /* [n] */ 91 __u8 baInterfaceNr[]; /* [n] */
102} __attribute__ ((packed)); 92} __attribute__ ((packed));
103 93
104#define USB_DT_AC_HEADER_SIZE(n) (8 + (n)) 94#define UAC_DT_AC_HEADER_SIZE(n) (8 + (n))
105 95
106/* As above, but more useful for defining your own descriptors: */ 96/* As above, but more useful for defining your own descriptors: */
107#define DECLARE_USB_AC_HEADER_DESCRIPTOR(n) \ 97#define DECLARE_UAC_AC_HEADER_DESCRIPTOR(n) \
108struct usb_ac_header_descriptor_##n { \ 98struct uac_ac_header_descriptor_##n { \
109 __u8 bLength; \ 99 __u8 bLength; \
110 __u8 bDescriptorType; \ 100 __u8 bDescriptorType; \
111 __u8 bDescriptorSubtype; \ 101 __u8 bDescriptorSubtype; \
@@ -116,7 +106,7 @@ struct usb_ac_header_descriptor_##n { \
116} __attribute__ ((packed)) 106} __attribute__ ((packed))
117 107
118/* 4.3.2.1 Input Terminal Descriptor */ 108/* 4.3.2.1 Input Terminal Descriptor */
119struct usb_input_terminal_descriptor { 109struct uac_input_terminal_descriptor {
120 __u8 bLength; /* in bytes: 12 */ 110 __u8 bLength; /* in bytes: 12 */
121 __u8 bDescriptorType; /* CS_INTERFACE descriptor type */ 111 __u8 bDescriptorType; /* CS_INTERFACE descriptor type */
122 __u8 bDescriptorSubtype; /* INPUT_TERMINAL descriptor subtype */ 112 __u8 bDescriptorSubtype; /* INPUT_TERMINAL descriptor subtype */
@@ -129,18 +119,19 @@ struct usb_input_terminal_descriptor {
129 __u8 iTerminal; 119 __u8 iTerminal;
130} __attribute__ ((packed)); 120} __attribute__ ((packed));
131 121
132#define USB_DT_AC_INPUT_TERMINAL_SIZE 12 122#define UAC_DT_INPUT_TERMINAL_SIZE 12
133 123
134#define USB_AC_INPUT_TERMINAL_UNDEFINED 0x200 124/* Terminals - 2.2 Input Terminal Types */
135#define USB_AC_INPUT_TERMINAL_MICROPHONE 0x201 125#define UAC_INPUT_TERMINAL_UNDEFINED 0x200
136#define USB_AC_INPUT_TERMINAL_DESKTOP_MICROPHONE 0x202 126#define UAC_INPUT_TERMINAL_MICROPHONE 0x201
137#define USB_AC_INPUT_TERMINAL_PERSONAL_MICROPHONE 0x203 127#define UAC_INPUT_TERMINAL_DESKTOP_MICROPHONE 0x202
138#define USB_AC_INPUT_TERMINAL_OMNI_DIR_MICROPHONE 0x204 128#define UAC_INPUT_TERMINAL_PERSONAL_MICROPHONE 0x203
139#define USB_AC_INPUT_TERMINAL_MICROPHONE_ARRAY 0x205 129#define UAC_INPUT_TERMINAL_OMNI_DIR_MICROPHONE 0x204
140#define USB_AC_INPUT_TERMINAL_PROC_MICROPHONE_ARRAY 0x206 130#define UAC_INPUT_TERMINAL_MICROPHONE_ARRAY 0x205
131#define UAC_INPUT_TERMINAL_PROC_MICROPHONE_ARRAY 0x206
141 132
142/* 4.3.2.2 Output Terminal Descriptor */ 133/* 4.3.2.2 Output Terminal Descriptor */
143struct usb_output_terminal_descriptor { 134struct uac_output_terminal_descriptor {
144 __u8 bLength; /* in bytes: 9 */ 135 __u8 bLength; /* in bytes: 9 */
145 __u8 bDescriptorType; /* CS_INTERFACE descriptor type */ 136 __u8 bDescriptorType; /* CS_INTERFACE descriptor type */
146 __u8 bDescriptorSubtype; /* OUTPUT_TERMINAL descriptor subtype */ 137 __u8 bDescriptorSubtype; /* OUTPUT_TERMINAL descriptor subtype */
@@ -151,23 +142,24 @@ struct usb_output_terminal_descriptor {
151 __u8 iTerminal; 142 __u8 iTerminal;
152} __attribute__ ((packed)); 143} __attribute__ ((packed));
153 144
154#define USB_DT_AC_OUTPUT_TERMINAL_SIZE 9 145#define UAC_DT_OUTPUT_TERMINAL_SIZE 9
155 146
156#define USB_AC_OUTPUT_TERMINAL_UNDEFINED 0x300 147/* Terminals - 2.3 Output Terminal Types */
157#define USB_AC_OUTPUT_TERMINAL_SPEAKER 0x301 148#define UAC_OUTPUT_TERMINAL_UNDEFINED 0x300
158#define USB_AC_OUTPUT_TERMINAL_HEADPHONES 0x302 149#define UAC_OUTPUT_TERMINAL_SPEAKER 0x301
159#define USB_AC_OUTPUT_TERMINAL_HEAD_MOUNTED_DISPLAY_AUDIO 0x303 150#define UAC_OUTPUT_TERMINAL_HEADPHONES 0x302
160#define USB_AC_OUTPUT_TERMINAL_DESKTOP_SPEAKER 0x304 151#define UAC_OUTPUT_TERMINAL_HEAD_MOUNTED_DISPLAY_AUDIO 0x303
161#define USB_AC_OUTPUT_TERMINAL_ROOM_SPEAKER 0x305 152#define UAC_OUTPUT_TERMINAL_DESKTOP_SPEAKER 0x304
162#define USB_AC_OUTPUT_TERMINAL_COMMUNICATION_SPEAKER 0x306 153#define UAC_OUTPUT_TERMINAL_ROOM_SPEAKER 0x305
163#define USB_AC_OUTPUT_TERMINAL_LOW_FREQ_EFFECTS_SPEAKER 0x307 154#define UAC_OUTPUT_TERMINAL_COMMUNICATION_SPEAKER 0x306
155#define UAC_OUTPUT_TERMINAL_LOW_FREQ_EFFECTS_SPEAKER 0x307
164 156
165/* Set bControlSize = 2 as default setting */ 157/* Set bControlSize = 2 as default setting */
166#define USB_DT_AC_FEATURE_UNIT_SIZE(ch) (7 + ((ch) + 1) * 2) 158#define UAC_DT_FEATURE_UNIT_SIZE(ch) (7 + ((ch) + 1) * 2)
167 159
168/* As above, but more useful for defining your own descriptors: */ 160/* As above, but more useful for defining your own descriptors: */
169#define DECLARE_USB_AC_FEATURE_UNIT_DESCRIPTOR(ch) \ 161#define DECLARE_UAC_FEATURE_UNIT_DESCRIPTOR(ch) \
170struct usb_ac_feature_unit_descriptor_##ch { \ 162struct uac_feature_unit_descriptor_##ch { \
171 __u8 bLength; \ 163 __u8 bLength; \
172 __u8 bDescriptorType; \ 164 __u8 bDescriptorType; \
173 __u8 bDescriptorSubtype; \ 165 __u8 bDescriptorSubtype; \
@@ -179,7 +171,7 @@ struct usb_ac_feature_unit_descriptor_##ch { \
179} __attribute__ ((packed)) 171} __attribute__ ((packed))
180 172
181/* 4.5.2 Class-Specific AS Interface Descriptor */ 173/* 4.5.2 Class-Specific AS Interface Descriptor */
182struct usb_as_header_descriptor { 174struct uac_as_header_descriptor {
183 __u8 bLength; /* in bytes: 7 */ 175 __u8 bLength; /* in bytes: 7 */
184 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ 176 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
185 __u8 bDescriptorSubtype; /* AS_GENERAL */ 177 __u8 bDescriptorSubtype; /* AS_GENERAL */
@@ -188,16 +180,17 @@ struct usb_as_header_descriptor {
188 __le16 wFormatTag; /* The Audio Data Format */ 180 __le16 wFormatTag; /* The Audio Data Format */
189} __attribute__ ((packed)); 181} __attribute__ ((packed));
190 182
191#define USB_DT_AS_HEADER_SIZE 7 183#define UAC_DT_AS_HEADER_SIZE 7
192 184
193#define USB_AS_AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0 185/* Formats - A.1.1 Audio Data Format Type I Codes */
194#define USB_AS_AUDIO_FORMAT_TYPE_I_PCM 0x1 186#define UAC_FORMAT_TYPE_I_UNDEFINED 0x0
195#define USB_AS_AUDIO_FORMAT_TYPE_I_PCM8 0x2 187#define UAC_FORMAT_TYPE_I_PCM 0x1
196#define USB_AS_AUDIO_FORMAT_TYPE_I_IEEE_FLOAT 0x3 188#define UAC_FORMAT_TYPE_I_PCM8 0x2
197#define USB_AS_AUDIO_FORMAT_TYPE_I_ALAW 0x4 189#define UAC_FORMAT_TYPE_I_IEEE_FLOAT 0x3
198#define USB_AS_AUDIO_FORMAT_TYPE_I_MULAW 0x5 190#define UAC_FORMAT_TYPE_I_ALAW 0x4
191#define UAC_FORMAT_TYPE_I_MULAW 0x5
199 192
200struct usb_as_format_type_i_continuous_descriptor { 193struct uac_format_type_i_continuous_descriptor {
201 __u8 bLength; /* in bytes: 8 + (ns * 3) */ 194 __u8 bLength; /* in bytes: 8 + (ns * 3) */
202 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ 195 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
203 __u8 bDescriptorSubtype; /* FORMAT_TYPE */ 196 __u8 bDescriptorSubtype; /* FORMAT_TYPE */
@@ -210,9 +203,9 @@ struct usb_as_format_type_i_continuous_descriptor {
210 __u8 tUpperSamFreq[3]; 203 __u8 tUpperSamFreq[3];
211} __attribute__ ((packed)); 204} __attribute__ ((packed));
212 205
213#define USB_AS_FORMAT_TYPE_I_CONTINUOUS_DESC_SIZE 14 206#define UAC_FORMAT_TYPE_I_CONTINUOUS_DESC_SIZE 14
214 207
215struct usb_as_formate_type_i_discrete_descriptor { 208struct uac_format_type_i_discrete_descriptor {
216 __u8 bLength; /* in bytes: 8 + (ns * 3) */ 209 __u8 bLength; /* in bytes: 8 + (ns * 3) */
217 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ 210 __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
218 __u8 bDescriptorSubtype; /* FORMAT_TYPE */ 211 __u8 bDescriptorSubtype; /* FORMAT_TYPE */
@@ -224,8 +217,8 @@ struct usb_as_formate_type_i_discrete_descriptor {
224 __u8 tSamFreq[][3]; 217 __u8 tSamFreq[][3];
225} __attribute__ ((packed)); 218} __attribute__ ((packed));
226 219
227#define DECLARE_USB_AS_FORMAT_TYPE_I_DISCRETE_DESC(n) \ 220#define DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(n) \
228struct usb_as_formate_type_i_discrete_descriptor_##n { \ 221struct uac_format_type_i_discrete_descriptor_##n { \
229 __u8 bLength; \ 222 __u8 bLength; \
230 __u8 bDescriptorType; \ 223 __u8 bDescriptorType; \
231 __u8 bDescriptorSubtype; \ 224 __u8 bDescriptorSubtype; \
@@ -237,18 +230,15 @@ struct usb_as_formate_type_i_discrete_descriptor_##n { \
237 __u8 tSamFreq[n][3]; \ 230 __u8 tSamFreq[n][3]; \
238} __attribute__ ((packed)) 231} __attribute__ ((packed))
239 232
240#define USB_AS_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(n) (8 + (n * 3)) 233#define UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(n) (8 + (n * 3))
241
242#define USB_AS_FORMAT_TYPE_UNDEFINED 0x0
243#define USB_AS_FORMAT_TYPE_I 0x1
244#define USB_AS_FORMAT_TYPE_II 0x2
245#define USB_AS_FORMAT_TYPE_III 0x3
246 234
247#define USB_AS_ENDPOINT_ASYNC (1 << 2) 235/* Formats - A.2 Format Type Codes */
248#define USB_AS_ENDPOINT_ADAPTIVE (2 << 2) 236#define UAC_FORMAT_TYPE_UNDEFINED 0x0
249#define USB_AS_ENDPOINT_SYNC (3 << 2) 237#define UAC_FORMAT_TYPE_I 0x1
238#define UAC_FORMAT_TYPE_II 0x2
239#define UAC_FORMAT_TYPE_III 0x3
250 240
251struct usb_as_iso_endpoint_descriptor { 241struct uac_iso_endpoint_descriptor {
252 __u8 bLength; /* in bytes: 7 */ 242 __u8 bLength; /* in bytes: 7 */
253 __u8 bDescriptorType; /* USB_DT_CS_ENDPOINT */ 243 __u8 bDescriptorType; /* USB_DT_CS_ENDPOINT */
254 __u8 bDescriptorSubtype; /* EP_GENERAL */ 244 __u8 bDescriptorSubtype; /* EP_GENERAL */
@@ -256,30 +246,37 @@ struct usb_as_iso_endpoint_descriptor {
256 __u8 bLockDelayUnits; 246 __u8 bLockDelayUnits;
257 __le16 wLockDelay; 247 __le16 wLockDelay;
258}; 248};
259#define USB_AS_ISO_ENDPOINT_DESC_SIZE 7 249#define UAC_ISO_ENDPOINT_DESC_SIZE 7
260 250
261#define FU_CONTROL_UNDEFINED 0x00 251#define UAC_EP_CS_ATTR_SAMPLE_RATE 0x01
262#define MUTE_CONTROL 0x01 252#define UAC_EP_CS_ATTR_PITCH_CONTROL 0x02
263#define VOLUME_CONTROL 0x02 253#define UAC_EP_CS_ATTR_FILL_MAX 0x80
264#define BASS_CONTROL 0x03 254
265#define MID_CONTROL 0x04 255/* A.10.2 Feature Unit Control Selectors */
266#define TREBLE_CONTROL 0x05 256#define UAC_FU_CONTROL_UNDEFINED 0x00
267#define GRAPHIC_EQUALIZER_CONTROL 0x06 257#define UAC_MUTE_CONTROL 0x01
268#define AUTOMATIC_GAIN_CONTROL 0x07 258#define UAC_VOLUME_CONTROL 0x02
269#define DELAY_CONTROL 0x08 259#define UAC_BASS_CONTROL 0x03
270#define BASS_BOOST_CONTROL 0x09 260#define UAC_MID_CONTROL 0x04
271#define LOUDNESS_CONTROL 0x0a 261#define UAC_TREBLE_CONTROL 0x05
272 262#define UAC_GRAPHIC_EQUALIZER_CONTROL 0x06
273#define FU_MUTE (1 << (MUTE_CONTROL - 1)) 263#define UAC_AUTOMATIC_GAIN_CONTROL 0x07
274#define FU_VOLUME (1 << (VOLUME_CONTROL - 1)) 264#define UAC_DELAY_CONTROL 0x08
275#define FU_BASS (1 << (BASS_CONTROL - 1)) 265#define UAC_BASS_BOOST_CONTROL 0x09
276#define FU_MID (1 << (MID_CONTROL - 1)) 266#define UAC_LOUDNESS_CONTROL 0x0a
277#define FU_TREBLE (1 << (TREBLE_CONTROL - 1)) 267
278#define FU_GRAPHIC_EQ (1 << (GRAPHIC_EQUALIZER_CONTROL - 1)) 268#define UAC_FU_MUTE (1 << (UAC_MUTE_CONTROL - 1))
279#define FU_AUTO_GAIN (1 << (AUTOMATIC_GAIN_CONTROL - 1)) 269#define UAC_FU_VOLUME (1 << (UAC_VOLUME_CONTROL - 1))
280#define FU_DELAY (1 << (DELAY_CONTROL - 1)) 270#define UAC_FU_BASS (1 << (UAC_BASS_CONTROL - 1))
281#define FU_BASS_BOOST (1 << (BASS_BOOST_CONTROL - 1)) 271#define UAC_FU_MID (1 << (UAC_MID_CONTROL - 1))
282#define FU_LOUDNESS (1 << (LOUDNESS_CONTROL - 1)) 272#define UAC_FU_TREBLE (1 << (UAC_TREBLE_CONTROL - 1))
273#define UAC_FU_GRAPHIC_EQ (1 << (UAC_GRAPHIC_EQUALIZER_CONTROL - 1))
274#define UAC_FU_AUTO_GAIN (1 << (UAC_AUTOMATIC_GAIN_CONTROL - 1))
275#define UAC_FU_DELAY (1 << (UAC_DELAY_CONTROL - 1))
276#define UAC_FU_BASS_BOOST (1 << (UAC_BASS_BOOST_CONTROL - 1))
277#define UAC_FU_LOUDNESS (1 << (UAC_LOUDNESS_CONTROL - 1))
278
279#ifdef __KERNEL__
283 280
284struct usb_audio_control { 281struct usb_audio_control {
285 struct list_head list; 282 struct list_head list;
@@ -290,18 +287,6 @@ struct usb_audio_control {
290 int (*get)(struct usb_audio_control *con, u8 cmd); 287 int (*get)(struct usb_audio_control *con, u8 cmd);
291}; 288};
292 289
293static inline int generic_set_cmd(struct usb_audio_control *con, u8 cmd, int value)
294{
295 con->data[cmd] = value;
296
297 return 0;
298}
299
300static inline int generic_get_cmd(struct usb_audio_control *con, u8 cmd)
301{
302 return con->data[cmd];
303}
304
305struct usb_audio_control_selector { 290struct usb_audio_control_selector {
306 struct list_head list; 291 struct list_head list;
307 struct list_head control; 292 struct list_head control;
@@ -311,4 +296,6 @@ struct usb_audio_control_selector {
311 struct usb_descriptor_header *desc; 296 struct usb_descriptor_header *desc;
312}; 297};
313 298
299#endif /* __KERNEL__ */
300
314#endif /* __LINUX_USB_AUDIO_H */ 301#endif /* __LINUX_USB_AUDIO_H */
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 93223638f702..94012e649d86 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -258,6 +258,8 @@ struct usb_device_descriptor {
258#define USB_CLASS_APP_SPEC 0xfe 258#define USB_CLASS_APP_SPEC 0xfe
259#define USB_CLASS_VENDOR_SPEC 0xff 259#define USB_CLASS_VENDOR_SPEC 0xff
260 260
261#define USB_SUBCLASS_VENDOR_SPEC 0xff
262
261/*-------------------------------------------------------------------------*/ 263/*-------------------------------------------------------------------------*/
262 264
263/* USB_DT_CONFIG: Configuration descriptor information. 265/* USB_DT_CONFIG: Configuration descriptor information.
@@ -348,6 +350,12 @@ struct usb_endpoint_descriptor {
348#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */ 350#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */
349#define USB_ENDPOINT_DIR_MASK 0x80 351#define USB_ENDPOINT_DIR_MASK 0x80
350 352
353#define USB_ENDPOINT_SYNCTYPE 0x0c
354#define USB_ENDPOINT_SYNC_NONE (0 << 2)
355#define USB_ENDPOINT_SYNC_ASYNC (1 << 2)
356#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << 2)
357#define USB_ENDPOINT_SYNC_SYNC (3 << 2)
358
351#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */ 359#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */
352#define USB_ENDPOINT_XFER_CONTROL 0 360#define USB_ENDPOINT_XFER_CONTROL 0
353#define USB_ENDPOINT_XFER_ISOC 1 361#define USB_ENDPOINT_XFER_ISOC 1
diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
index 5b88e36c9103..af4b86f3aca3 100644
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -105,6 +105,7 @@ struct ehci_regs {
105#define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */ 105#define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */
106#define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */ 106#define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */
107/* 19:16 for port testing */ 107/* 19:16 for port testing */
108#define PORT_TEST_PKT (0x4<<16) /* Port Test Control - packet test */
108#define PORT_LED_OFF (0<<14) 109#define PORT_LED_OFF (0<<14)
109#define PORT_LED_AMBER (1<<14) 110#define PORT_LED_AMBER (1<<14)
110#define PORT_LED_GREEN (2<<14) 111#define PORT_LED_GREEN (2<<14)
@@ -132,6 +133,19 @@ struct ehci_regs {
132#define USBMODE_CM_HC (3<<0) /* host controller mode */ 133#define USBMODE_CM_HC (3<<0) /* host controller mode */
133#define USBMODE_CM_IDLE (0<<0) /* idle state */ 134#define USBMODE_CM_IDLE (0<<0) /* idle state */
134 135
136/* Moorestown has some non-standard registers, partially due to the fact that
137 * its EHCI controller has both TT and LPM support. HOSTPCx are extentions to
138 * PORTSCx
139 */
140#define HOSTPC0 0x84 /* HOSTPC extension */
141#define HOSTPC_PHCD (1<<22) /* Phy clock disable */
142#define HOSTPC_PSPD (3<<25) /* Port speed detection */
143#define USBMODE_EX 0xc8 /* USB Device mode extension */
144#define USBMODE_EX_VBPS (1<<5) /* VBus Power Select On */
145#define USBMODE_EX_HC (3<<0) /* host controller mode */
146#define TXFILLTUNING 0x24 /* TX FIFO Tuning register */
147#define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
148
135/* Appendix C, Debug port ... intended for use with special "debug devices" 149/* Appendix C, Debug port ... intended for use with special "debug devices"
136 * that can help if there's no serial console. (nonstandard enumeration.) 150 * that can help if there's no serial console. (nonstandard enumeration.)
137 */ 151 */
@@ -157,4 +171,25 @@ struct ehci_dbg_port {
157#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) 171#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep))
158} __attribute__ ((packed)); 172} __attribute__ ((packed));
159 173
174#ifdef CONFIG_EARLY_PRINTK_DBGP
175#include <linux/init.h>
176extern int __init early_dbgp_init(char *s);
177extern struct console early_dbgp_console;
178#endif /* CONFIG_EARLY_PRINTK_DBGP */
179
180#ifdef CONFIG_EARLY_PRINTK_DBGP
181/* Call backs from ehci host driver to ehci debug driver */
182extern int dbgp_external_startup(void);
183extern int dbgp_reset_prep(void);
184#else
185static inline int dbgp_reset_prep(void)
186{
187 return 1;
188}
189static inline int dbgp_external_startup(void)
190{
191 return -1;
192}
193#endif
194
160#endif /* __LINUX_USB_EHCI_DEF_H */ 195#endif /* __LINUX_USB_EHCI_DEF_H */
diff --git a/include/linux/usb/isp1362.h b/include/linux/usb/isp1362.h
new file mode 100644
index 000000000000..642684bb9292
--- /dev/null
+++ b/include/linux/usb/isp1362.h
@@ -0,0 +1,46 @@
1/*
2 * board initialization code should put one of these into dev->platform_data
3 * and place the isp1362 onto platform_bus.
4 */
5
6#ifndef __LINUX_USB_ISP1362_H__
7#define __LINUX_USB_ISP1362_H__
8
9struct isp1362_platform_data {
10 /* Enable internal pulldown resistors on downstream ports */
11 unsigned sel15Kres:1;
12 /* Clock cannot be stopped */
13 unsigned clknotstop:1;
14 /* On-chip overcurrent protection */
15 unsigned oc_enable:1;
16 /* INT output polarity */
17 unsigned int_act_high:1;
18 /* INT edge or level triggered */
19 unsigned int_edge_triggered:1;
20 /* DREQ output polarity */
21 unsigned dreq_act_high:1;
22 /* DACK input polarity */
23 unsigned dack_act_high:1;
24 /* chip can be resumed via H_WAKEUP pin */
25 unsigned remote_wakeup_connected:1;
26 /* Switch or not to switch (keep always powered) */
27 unsigned no_power_switching:1;
28 /* Ganged port power switching (0) or individual port power switching (1) */
29 unsigned power_switching_mode:1;
30 /* Given port_power, msec/2 after power on till power good */
31 u8 potpg;
32 /* Hardware reset set/clear */
33 void (*reset) (struct device *dev, int set);
34 /* Clock start/stop */
35 void (*clock) (struct device *dev, int start);
36 /* Inter-io delay (ns). The chip is picky about access timings; it
37 * expects at least:
38 * 110ns delay between consecutive accesses to DATA_REG,
39 * 300ns delay between access to ADDR_REG and DATA_REG (registers)
40 * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory)
41 * WE MUST NOT be activated during these intervals (even without CS!)
42 */
43 void (*delay) (struct device *dev, unsigned int delay);
44};
45
46#endif
diff --git a/include/linux/usb/isp1760.h b/include/linux/usb/isp1760.h
new file mode 100644
index 000000000000..de7de53c5531
--- /dev/null
+++ b/include/linux/usb/isp1760.h
@@ -0,0 +1,18 @@
1/*
2 * board initialization should put one of these into dev->platform_data
3 * and place the isp1760 onto platform_bus named "isp1760-hcd".
4 */
5
6#ifndef __LINUX_USB_ISP1760_H
7#define __LINUX_USB_ISP1760_H
8
9struct isp1760_platform_data {
10 unsigned is_isp1761:1; /* Chip is ISP1761 */
11 unsigned bus_width_16:1; /* 16/32-bit data bus width */
12 unsigned port1_otg:1; /* Port 1 supports OTG */
13 unsigned analog_oc:1; /* Analog overcurrent */
14 unsigned dack_polarity_high:1; /* DACK active high */
15 unsigned dreq_polarity_high:1; /* DREQ active high */
16};
17
18#endif /* __LINUX_USB_ISP1760_H */
diff --git a/include/linux/usb/m66592.h b/include/linux/usb/m66592.h
new file mode 100644
index 000000000000..cda9625e7df0
--- /dev/null
+++ b/include/linux/usb/m66592.h
@@ -0,0 +1,44 @@
1/*
2 * M66592 driver platform data
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 *
19 */
20
21#ifndef __LINUX_USB_M66592_H
22#define __LINUX_USB_M66592_H
23
24#define M66592_PLATDATA_XTAL_12MHZ 0x01
25#define M66592_PLATDATA_XTAL_24MHZ 0x02
26#define M66592_PLATDATA_XTAL_48MHZ 0x03
27
28struct m66592_platdata {
29 /* one = on chip controller, zero = external controller */
30 unsigned on_chip:1;
31
32 /* one = big endian, zero = little endian */
33 unsigned endian:1;
34
35 /* (external controller only) M66592_PLATDATA_XTAL_nnMHZ */
36 unsigned xtal:2;
37
38 /* (external controller only) one = 3.3V, zero = 1.5V */
39 unsigned vif:1;
40
41};
42
43#endif /* __LINUX_USB_M66592_H */
44
diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h
index e9f0384fa20c..26d216734057 100644
--- a/include/linux/usb/r8a66597.h
+++ b/include/linux/usb/r8a66597.h
@@ -28,9 +28,12 @@
28#define R8A66597_PLATDATA_XTAL_48MHZ 0x03 28#define R8A66597_PLATDATA_XTAL_48MHZ 0x03
29 29
30struct r8a66597_platdata { 30struct r8a66597_platdata {
31 /* This ops can controll port power instead of DVSTCTR register. */ 31 /* This callback can control port power instead of DVSTCTR register. */
32 void (*port_power)(int port, int power); 32 void (*port_power)(int port, int power);
33 33
34 /* set one = on chip controller, set zero = external controller */
35 unsigned on_chip:1;
36
34 /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */ 37 /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */
35 unsigned xtal:2; 38 unsigned xtal:2;
36 39
@@ -40,5 +43,373 @@ struct r8a66597_platdata {
40 /* set one = big endian, set zero = little endian */ 43 /* set one = big endian, set zero = little endian */
41 unsigned endian:1; 44 unsigned endian:1;
42}; 45};
43#endif 46
47/* Register definitions */
48#define SYSCFG0 0x00
49#define SYSCFG1 0x02
50#define SYSSTS0 0x04
51#define SYSSTS1 0x06
52#define DVSTCTR0 0x08
53#define DVSTCTR1 0x0A
54#define TESTMODE 0x0C
55#define PINCFG 0x0E
56#define DMA0CFG 0x10
57#define DMA1CFG 0x12
58#define CFIFO 0x14
59#define D0FIFO 0x18
60#define D1FIFO 0x1C
61#define CFIFOSEL 0x20
62#define CFIFOCTR 0x22
63#define CFIFOSIE 0x24
64#define D0FIFOSEL 0x28
65#define D0FIFOCTR 0x2A
66#define D1FIFOSEL 0x2C
67#define D1FIFOCTR 0x2E
68#define INTENB0 0x30
69#define INTENB1 0x32
70#define INTENB2 0x34
71#define BRDYENB 0x36
72#define NRDYENB 0x38
73#define BEMPENB 0x3A
74#define SOFCFG 0x3C
75#define INTSTS0 0x40
76#define INTSTS1 0x42
77#define INTSTS2 0x44
78#define BRDYSTS 0x46
79#define NRDYSTS 0x48
80#define BEMPSTS 0x4A
81#define FRMNUM 0x4C
82#define UFRMNUM 0x4E
83#define USBADDR 0x50
84#define USBREQ 0x54
85#define USBVAL 0x56
86#define USBINDX 0x58
87#define USBLENG 0x5A
88#define DCPCFG 0x5C
89#define DCPMAXP 0x5E
90#define DCPCTR 0x60
91#define PIPESEL 0x64
92#define PIPECFG 0x68
93#define PIPEBUF 0x6A
94#define PIPEMAXP 0x6C
95#define PIPEPERI 0x6E
96#define PIPE1CTR 0x70
97#define PIPE2CTR 0x72
98#define PIPE3CTR 0x74
99#define PIPE4CTR 0x76
100#define PIPE5CTR 0x78
101#define PIPE6CTR 0x7A
102#define PIPE7CTR 0x7C
103#define PIPE8CTR 0x7E
104#define PIPE9CTR 0x80
105#define PIPE1TRE 0x90
106#define PIPE1TRN 0x92
107#define PIPE2TRE 0x94
108#define PIPE2TRN 0x96
109#define PIPE3TRE 0x98
110#define PIPE3TRN 0x9A
111#define PIPE4TRE 0x9C
112#define PIPE4TRN 0x9E
113#define PIPE5TRE 0xA0
114#define PIPE5TRN 0xA2
115#define DEVADD0 0xD0
116#define DEVADD1 0xD2
117#define DEVADD2 0xD4
118#define DEVADD3 0xD6
119#define DEVADD4 0xD8
120#define DEVADD5 0xDA
121#define DEVADD6 0xDC
122#define DEVADD7 0xDE
123#define DEVADD8 0xE0
124#define DEVADD9 0xE2
125#define DEVADDA 0xE4
126
127/* System Configuration Control Register */
128#define XTAL 0xC000 /* b15-14: Crystal selection */
129#define XTAL48 0x8000 /* 48MHz */
130#define XTAL24 0x4000 /* 24MHz */
131#define XTAL12 0x0000 /* 12MHz */
132#define XCKE 0x2000 /* b13: External clock enable */
133#define PLLC 0x0800 /* b11: PLL control */
134#define SCKE 0x0400 /* b10: USB clock enable */
135#define PCSDIS 0x0200 /* b9: not CS wakeup */
136#define LPSME 0x0100 /* b8: Low power sleep mode */
137#define HSE 0x0080 /* b7: Hi-speed enable */
138#define DCFM 0x0040 /* b6: Controller function select */
139#define DRPD 0x0020 /* b5: D+/- pull down control */
140#define DPRPU 0x0010 /* b4: D+ pull up control */
141#define USBE 0x0001 /* b0: USB module operation enable */
142
143/* System Configuration Status Register */
144#define OVCBIT 0x8000 /* b15-14: Over-current bit */
145#define OVCMON 0xC000 /* b15-14: Over-current monitor */
146#define SOFEA 0x0020 /* b5: SOF monitor */
147#define IDMON 0x0004 /* b3: ID-pin monitor */
148#define LNST 0x0003 /* b1-0: D+, D- line status */
149#define SE1 0x0003 /* SE1 */
150#define FS_KSTS 0x0002 /* Full-Speed K State */
151#define FS_JSTS 0x0001 /* Full-Speed J State */
152#define LS_JSTS 0x0002 /* Low-Speed J State */
153#define LS_KSTS 0x0001 /* Low-Speed K State */
154#define SE0 0x0000 /* SE0 */
155
156/* Device State Control Register */
157#define EXTLP0 0x0400 /* b10: External port */
158#define VBOUT 0x0200 /* b9: VBUS output */
159#define WKUP 0x0100 /* b8: Remote wakeup */
160#define RWUPE 0x0080 /* b7: Remote wakeup sense */
161#define USBRST 0x0040 /* b6: USB reset enable */
162#define RESUME 0x0020 /* b5: Resume enable */
163#define UACT 0x0010 /* b4: USB bus enable */
164#define RHST 0x0007 /* b1-0: Reset handshake status */
165#define HSPROC 0x0004 /* HS handshake is processing */
166#define HSMODE 0x0003 /* Hi-Speed mode */
167#define FSMODE 0x0002 /* Full-Speed mode */
168#define LSMODE 0x0001 /* Low-Speed mode */
169#define UNDECID 0x0000 /* Undecided */
170
171/* Test Mode Register */
172#define UTST 0x000F /* b3-0: Test select */
173#define H_TST_PACKET 0x000C /* HOST TEST Packet */
174#define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */
175#define H_TST_K 0x000A /* HOST TEST K */
176#define H_TST_J 0x0009 /* HOST TEST J */
177#define H_TST_NORMAL 0x0000 /* HOST Normal Mode */
178#define P_TST_PACKET 0x0004 /* PERI TEST Packet */
179#define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */
180#define P_TST_K 0x0002 /* PERI TEST K */
181#define P_TST_J 0x0001 /* PERI TEST J */
182#define P_TST_NORMAL 0x0000 /* PERI Normal Mode */
183
184/* Data Pin Configuration Register */
185#define LDRV 0x8000 /* b15: Drive Current Adjust */
186#define VIF1 0x0000 /* VIF = 1.8V */
187#define VIF3 0x8000 /* VIF = 3.3V */
188#define INTA 0x0001 /* b1: USB INT-pin active */
189
190/* DMAx Pin Configuration Register */
191#define DREQA 0x4000 /* b14: Dreq active select */
192#define BURST 0x2000 /* b13: Burst mode */
193#define DACKA 0x0400 /* b10: Dack active select */
194#define DFORM 0x0380 /* b9-7: DMA mode select */
195#define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */
196#define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */
197#define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */
198#define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */
199#define DENDA 0x0040 /* b6: Dend active select */
200#define PKTM 0x0020 /* b5: Packet mode */
201#define DENDE 0x0010 /* b4: Dend enable */
202#define OBUS 0x0004 /* b2: OUTbus mode */
203
204/* CFIFO/DxFIFO Port Select Register */
205#define RCNT 0x8000 /* b15: Read count mode */
206#define REW 0x4000 /* b14: Buffer rewind */
207#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
208#define DREQE 0x1000 /* b12: DREQ output enable */
209#define MBW_8 0x0000 /* 8bit */
210#define MBW_16 0x0400 /* 16bit */
211#define MBW_32 0x0800 /* 32bit */
212#define BIGEND 0x0100 /* b8: Big endian mode */
213#define BYTE_LITTLE 0x0000 /* little dendian */
214#define BYTE_BIG 0x0100 /* big endifan */
215#define ISEL 0x0020 /* b5: DCP FIFO port direction select */
216#define CURPIPE 0x000F /* b2-0: PIPE select */
217
218/* CFIFO/DxFIFO Port Control Register */
219#define BVAL 0x8000 /* b15: Buffer valid flag */
220#define BCLR 0x4000 /* b14: Buffer clear */
221#define FRDY 0x2000 /* b13: FIFO ready */
222#define DTLN 0x0FFF /* b11-0: FIFO received data length */
223
224/* Interrupt Enable Register 0 */
225#define VBSE 0x8000 /* b15: VBUS interrupt */
226#define RSME 0x4000 /* b14: Resume interrupt */
227#define SOFE 0x2000 /* b13: Frame update interrupt */
228#define DVSE 0x1000 /* b12: Device state transition interrupt */
229#define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */
230#define BEMPE 0x0400 /* b10: Buffer empty interrupt */
231#define NRDYE 0x0200 /* b9: Buffer not ready interrupt */
232#define BRDYE 0x0100 /* b8: Buffer ready interrupt */
233
234/* Interrupt Enable Register 1 */
235#define OVRCRE 0x8000 /* b15: Over-current interrupt */
236#define BCHGE 0x4000 /* b14: USB us chenge interrupt */
237#define DTCHE 0x1000 /* b12: Detach sense interrupt */
238#define ATTCHE 0x0800 /* b11: Attach sense interrupt */
239#define EOFERRE 0x0040 /* b6: EOF error interrupt */
240#define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */
241#define SACKE 0x0010 /* b4: SETUP ACK interrupt */
242
243/* BRDY Interrupt Enable/Status Register */
244#define BRDY9 0x0200 /* b9: PIPE9 */
245#define BRDY8 0x0100 /* b8: PIPE8 */
246#define BRDY7 0x0080 /* b7: PIPE7 */
247#define BRDY6 0x0040 /* b6: PIPE6 */
248#define BRDY5 0x0020 /* b5: PIPE5 */
249#define BRDY4 0x0010 /* b4: PIPE4 */
250#define BRDY3 0x0008 /* b3: PIPE3 */
251#define BRDY2 0x0004 /* b2: PIPE2 */
252#define BRDY1 0x0002 /* b1: PIPE1 */
253#define BRDY0 0x0001 /* b1: PIPE0 */
254
255/* NRDY Interrupt Enable/Status Register */
256#define NRDY9 0x0200 /* b9: PIPE9 */
257#define NRDY8 0x0100 /* b8: PIPE8 */
258#define NRDY7 0x0080 /* b7: PIPE7 */
259#define NRDY6 0x0040 /* b6: PIPE6 */
260#define NRDY5 0x0020 /* b5: PIPE5 */
261#define NRDY4 0x0010 /* b4: PIPE4 */
262#define NRDY3 0x0008 /* b3: PIPE3 */
263#define NRDY2 0x0004 /* b2: PIPE2 */
264#define NRDY1 0x0002 /* b1: PIPE1 */
265#define NRDY0 0x0001 /* b1: PIPE0 */
266
267/* BEMP Interrupt Enable/Status Register */
268#define BEMP9 0x0200 /* b9: PIPE9 */
269#define BEMP8 0x0100 /* b8: PIPE8 */
270#define BEMP7 0x0080 /* b7: PIPE7 */
271#define BEMP6 0x0040 /* b6: PIPE6 */
272#define BEMP5 0x0020 /* b5: PIPE5 */
273#define BEMP4 0x0010 /* b4: PIPE4 */
274#define BEMP3 0x0008 /* b3: PIPE3 */
275#define BEMP2 0x0004 /* b2: PIPE2 */
276#define BEMP1 0x0002 /* b1: PIPE1 */
277#define BEMP0 0x0001 /* b0: PIPE0 */
278
279/* SOF Pin Configuration Register */
280#define TRNENSEL 0x0100 /* b8: Select transaction enable period */
281#define BRDYM 0x0040 /* b6: BRDY clear timing */
282#define INTL 0x0020 /* b5: Interrupt sense select */
283#define EDGESTS 0x0010 /* b4: */
284#define SOFMODE 0x000C /* b3-2: SOF pin select */
285#define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */
286#define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */
287#define SOF_DISABLE 0x0000 /* SOF OUT Disable */
288
289/* Interrupt Status Register 0 */
290#define VBINT 0x8000 /* b15: VBUS interrupt */
291#define RESM 0x4000 /* b14: Resume interrupt */
292#define SOFR 0x2000 /* b13: SOF frame update interrupt */
293#define DVST 0x1000 /* b12: Device state transition interrupt */
294#define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */
295#define BEMP 0x0400 /* b10: Buffer empty interrupt */
296#define NRDY 0x0200 /* b9: Buffer not ready interrupt */
297#define BRDY 0x0100 /* b8: Buffer ready interrupt */
298#define VBSTS 0x0080 /* b7: VBUS input port */
299#define DVSQ 0x0070 /* b6-4: Device state */
300#define DS_SPD_CNFG 0x0070 /* Suspend Configured */
301#define DS_SPD_ADDR 0x0060 /* Suspend Address */
302#define DS_SPD_DFLT 0x0050 /* Suspend Default */
303#define DS_SPD_POWR 0x0040 /* Suspend Powered */
304#define DS_SUSP 0x0040 /* Suspend */
305#define DS_CNFG 0x0030 /* Configured */
306#define DS_ADDS 0x0020 /* Address */
307#define DS_DFLT 0x0010 /* Default */
308#define DS_POWR 0x0000 /* Powered */
309#define DVSQS 0x0030 /* b5-4: Device state */
310#define VALID 0x0008 /* b3: Setup packet detected flag */
311#define CTSQ 0x0007 /* b2-0: Control transfer stage */
312#define CS_SQER 0x0006 /* Sequence error */
313#define CS_WRND 0x0005 /* Control write nodata status stage */
314#define CS_WRSS 0x0004 /* Control write status stage */
315#define CS_WRDS 0x0003 /* Control write data stage */
316#define CS_RDSS 0x0002 /* Control read status stage */
317#define CS_RDDS 0x0001 /* Control read data stage */
318#define CS_IDST 0x0000 /* Idle or setup stage */
319
320/* Interrupt Status Register 1 */
321#define OVRCR 0x8000 /* b15: Over-current interrupt */
322#define BCHG 0x4000 /* b14: USB bus chenge interrupt */
323#define DTCH 0x1000 /* b12: Detach sense interrupt */
324#define ATTCH 0x0800 /* b11: Attach sense interrupt */
325#define EOFERR 0x0040 /* b6: EOF-error interrupt */
326#define SIGN 0x0020 /* b5: Setup ignore interrupt */
327#define SACK 0x0010 /* b4: Setup acknowledge interrupt */
328
329/* Frame Number Register */
330#define OVRN 0x8000 /* b15: Overrun error */
331#define CRCE 0x4000 /* b14: Received data error */
332#define FRNM 0x07FF /* b10-0: Frame number */
333
334/* Micro Frame Number Register */
335#define UFRNM 0x0007 /* b2-0: Micro frame number */
336
337/* Default Control Pipe Maxpacket Size Register */
338/* Pipe Maxpacket Size Register */
339#define DEVSEL 0xF000 /* b15-14: Device address select */
340#define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */
341
342/* Default Control Pipe Control Register */
343#define BSTS 0x8000 /* b15: Buffer status */
344#define SUREQ 0x4000 /* b14: Send USB request */
345#define CSCLR 0x2000 /* b13: complete-split status clear */
346#define CSSTS 0x1000 /* b12: complete-split status */
347#define SUREQCLR 0x0800 /* b11: stop setup request */
348#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
349#define SQSET 0x0080 /* b7: Sequence toggle bit set */
350#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
351#define PBUSY 0x0020 /* b5: pipe busy */
352#define PINGE 0x0010 /* b4: ping enable */
353#define CCPL 0x0004 /* b2: Enable control transfer complete */
354#define PID 0x0003 /* b1-0: Response PID */
355#define PID_STALL11 0x0003 /* STALL */
356#define PID_STALL 0x0002 /* STALL */
357#define PID_BUF 0x0001 /* BUF */
358#define PID_NAK 0x0000 /* NAK */
359
360/* Pipe Window Select Register */
361#define PIPENM 0x0007 /* b2-0: Pipe select */
362
363/* Pipe Configuration Register */
364#define R8A66597_TYP 0xC000 /* b15-14: Transfer type */
365#define R8A66597_ISO 0xC000 /* Isochronous */
366#define R8A66597_INT 0x8000 /* Interrupt */
367#define R8A66597_BULK 0x4000 /* Bulk */
368#define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */
369#define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */
370#define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */
371#define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */
372#define R8A66597_DIR 0x0010 /* b4: Transfer direction select */
373#define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */
374
375/* Pipe Buffer Configuration Register */
376#define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */
377#define BUFNMB 0x007F /* b6-0: Pipe buffer number */
378#define PIPE0BUF 256
379#define PIPExBUF 64
380
381/* Pipe Maxpacket Size Register */
382#define MXPS 0x07FF /* b10-0: Maxpacket size */
383
384/* Pipe Cycle Configuration Register */
385#define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */
386#define IITV 0x0007 /* b2-0: Isochronous interval */
387
388/* Pipex Control Register */
389#define BSTS 0x8000 /* b15: Buffer status */
390#define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */
391#define CSCLR 0x2000 /* b13: complete-split status clear */
392#define CSSTS 0x1000 /* b12: complete-split status */
393#define ATREPM 0x0400 /* b10: Auto repeat mode */
394#define ACLRM 0x0200 /* b9: Out buffer auto clear mode */
395#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
396#define SQSET 0x0080 /* b7: Sequence toggle bit set */
397#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
398#define PBUSY 0x0020 /* b5: pipe busy */
399#define PID 0x0003 /* b1-0: Response PID */
400
401/* PIPExTRE */
402#define TRENB 0x0200 /* b9: Transaction counter enable */
403#define TRCLR 0x0100 /* b8: Transaction counter clear */
404
405/* PIPExTRN */
406#define TRNCNT 0xFFFF /* b15-0: Transaction counter */
407
408/* DEVADDx */
409#define UPPHUB 0x7800
410#define HUBPORT 0x0700
411#define USBSPD 0x00C0
412#define RTPORT 0x0001
413
414#endif /* __LINUX_USB_R8A66597_H */
44 415
diff --git a/include/linux/usb/rndis_host.h b/include/linux/usb/rndis_host.h
index 37836b937d97..1ef1ebc2b04f 100644
--- a/include/linux/usb/rndis_host.h
+++ b/include/linux/usb/rndis_host.h
@@ -70,12 +70,13 @@ struct rndis_msg_hdr {
70#define RNDIS_MSG_KEEPALIVE_C (RNDIS_MSG_KEEPALIVE|RNDIS_MSG_COMPLETION) 70#define RNDIS_MSG_KEEPALIVE_C (RNDIS_MSG_KEEPALIVE|RNDIS_MSG_COMPLETION)
71 71
72/* codes for "status" field of completion messages */ 72/* codes for "status" field of completion messages */
73#define RNDIS_STATUS_SUCCESS cpu_to_le32(0x00000000) 73#define RNDIS_STATUS_SUCCESS cpu_to_le32(0x00000000)
74#define RNDIS_STATUS_FAILURE cpu_to_le32(0xc0000001) 74#define RNDIS_STATUS_FAILURE cpu_to_le32(0xc0000001)
75#define RNDIS_STATUS_INVALID_DATA cpu_to_le32(0xc0010015) 75#define RNDIS_STATUS_INVALID_DATA cpu_to_le32(0xc0010015)
76#define RNDIS_STATUS_NOT_SUPPORTED cpu_to_le32(0xc00000bb) 76#define RNDIS_STATUS_NOT_SUPPORTED cpu_to_le32(0xc00000bb)
77#define RNDIS_STATUS_MEDIA_CONNECT cpu_to_le32(0x4001000b) 77#define RNDIS_STATUS_MEDIA_CONNECT cpu_to_le32(0x4001000b)
78#define RNDIS_STATUS_MEDIA_DISCONNECT cpu_to_le32(0x4001000c) 78#define RNDIS_STATUS_MEDIA_DISCONNECT cpu_to_le32(0x4001000c)
79#define RNDIS_STATUS_MEDIA_SPECIFIC_INDICATION cpu_to_le32(0x40010012)
79 80
80/* codes for OID_GEN_PHYSICAL_MEDIUM */ 81/* codes for OID_GEN_PHYSICAL_MEDIUM */
81#define RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED cpu_to_le32(0x00000000) 82#define RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED cpu_to_le32(0x00000000)
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 0ec50ba62139..ce911ebf91e8 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -59,6 +59,7 @@ enum port_dev_state {
59 * @bulk_out_buffer: pointer to the bulk out buffer for this port. 59 * @bulk_out_buffer: pointer to the bulk out buffer for this port.
60 * @bulk_out_size: the size of the bulk_out_buffer, in bytes. 60 * @bulk_out_size: the size of the bulk_out_buffer, in bytes.
61 * @write_urb: pointer to the bulk out struct urb for this port. 61 * @write_urb: pointer to the bulk out struct urb for this port.
62 * @write_fifo: kfifo used to buffer outgoing data
62 * @write_urb_busy: port`s writing status 63 * @write_urb_busy: port`s writing status
63 * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this 64 * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this
64 * port. 65 * port.
@@ -96,6 +97,7 @@ struct usb_serial_port {
96 unsigned char *bulk_out_buffer; 97 unsigned char *bulk_out_buffer;
97 int bulk_out_size; 98 int bulk_out_size;
98 struct urb *write_urb; 99 struct urb *write_urb;
100 struct kfifo *write_fifo;
99 int write_urb_busy; 101 int write_urb_busy;
100 __u8 bulk_out_endpointAddress; 102 __u8 bulk_out_endpointAddress;
101 103
@@ -148,6 +150,7 @@ struct usb_serial {
148 struct usb_interface *interface; 150 struct usb_interface *interface;
149 unsigned char disconnected:1; 151 unsigned char disconnected:1;
150 unsigned char suspending:1; 152 unsigned char suspending:1;
153 unsigned char attached:1;
151 unsigned char minor; 154 unsigned char minor;
152 unsigned char num_ports; 155 unsigned char num_ports;
153 unsigned char num_port_pointers; 156 unsigned char num_port_pointers;
@@ -238,9 +241,8 @@ struct usb_serial_driver {
238 int (*resume)(struct usb_serial *serial); 241 int (*resume)(struct usb_serial *serial);
239 242
240 /* serial function calls */ 243 /* serial function calls */
241 /* Called by console with tty = NULL and by tty */ 244 /* Called by console and by the tty layer */
242 int (*open)(struct tty_struct *tty, 245 int (*open)(struct tty_struct *tty, struct usb_serial_port *port);
243 struct usb_serial_port *port, struct file *filp);
244 void (*close)(struct usb_serial_port *port); 246 void (*close)(struct usb_serial_port *port);
245 int (*write)(struct tty_struct *tty, struct usb_serial_port *port, 247 int (*write)(struct tty_struct *tty, struct usb_serial_port *port,
246 const unsigned char *buf, int count); 248 const unsigned char *buf, int count);
@@ -261,6 +263,9 @@ struct usb_serial_driver {
261 be an attached tty at this point */ 263 be an attached tty at this point */
262 void (*dtr_rts)(struct usb_serial_port *port, int on); 264 void (*dtr_rts)(struct usb_serial_port *port, int on);
263 int (*carrier_raised)(struct usb_serial_port *port); 265 int (*carrier_raised)(struct usb_serial_port *port);
266 /* Called by the usb serial hooks to allow the user to rework the
267 termios state */
268 void (*init_termios)(struct tty_struct *tty);
264 /* USB events */ 269 /* USB events */
265 void (*read_int_callback)(struct urb *urb); 270 void (*read_int_callback)(struct urb *urb);
266 void (*write_int_callback)(struct urb *urb); 271 void (*write_int_callback)(struct urb *urb);
@@ -300,7 +305,7 @@ static inline void usb_serial_console_disconnect(struct usb_serial *serial) {}
300extern struct usb_serial *usb_serial_get_by_index(unsigned int minor); 305extern struct usb_serial *usb_serial_get_by_index(unsigned int minor);
301extern void usb_serial_put(struct usb_serial *serial); 306extern void usb_serial_put(struct usb_serial *serial);
302extern int usb_serial_generic_open(struct tty_struct *tty, 307extern int usb_serial_generic_open(struct tty_struct *tty,
303 struct usb_serial_port *port, struct file *filp); 308 struct usb_serial_port *port);
304extern int usb_serial_generic_write(struct tty_struct *tty, 309extern int usb_serial_generic_write(struct tty_struct *tty,
305 struct usb_serial_port *port, const unsigned char *buf, int count); 310 struct usb_serial_port *port, const unsigned char *buf, int count);
306extern void usb_serial_generic_close(struct usb_serial_port *port); 311extern void usb_serial_generic_close(struct usb_serial_port *port);
diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h
index 310e18a880ff..f81473052059 100644
--- a/include/linux/usb/usbnet.h
+++ b/include/linux/usb/usbnet.h
@@ -53,6 +53,7 @@ struct usbnet {
53 struct sk_buff_head rxq; 53 struct sk_buff_head rxq;
54 struct sk_buff_head txq; 54 struct sk_buff_head txq;
55 struct sk_buff_head done; 55 struct sk_buff_head done;
56 struct sk_buff_head rxq_pause;
56 struct urb *interrupt; 57 struct urb *interrupt;
57 struct tasklet_struct bh; 58 struct tasklet_struct bh;
58 59
@@ -63,6 +64,7 @@ struct usbnet {
63# define EVENT_RX_MEMORY 2 64# define EVENT_RX_MEMORY 2
64# define EVENT_STS_SPLIT 3 65# define EVENT_STS_SPLIT 3
65# define EVENT_LINK_RESET 4 66# define EVENT_LINK_RESET 4
67# define EVENT_RX_PAUSED 5
66}; 68};
67 69
68static inline struct usb_driver *driver_of(struct usb_interface *intf) 70static inline struct usb_driver *driver_of(struct usb_interface *intf)
@@ -86,6 +88,8 @@ struct driver_info {
86 88
87#define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */ 89#define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */
88#define FLAG_WLAN 0x0080 /* use "wlan%d" names */ 90#define FLAG_WLAN 0x0080 /* use "wlan%d" names */
91#define FLAG_AVOID_UNLINK_URBS 0x0100 /* don't unlink urbs at usbnet_stop() */
92#define FLAG_SEND_ZLP 0x0200 /* hw requires ZLPs are sent */
89 93
90 94
91 /* init device ... can sleep, or cause probe() failure */ 95 /* init device ... can sleep, or cause probe() failure */
@@ -97,6 +101,9 @@ struct driver_info {
97 /* reset device ... can sleep */ 101 /* reset device ... can sleep */
98 int (*reset)(struct usbnet *); 102 int (*reset)(struct usbnet *);
99 103
104 /* stop device ... can sleep */
105 int (*stop)(struct usbnet *);
106
100 /* see if peer is connected ... can sleep */ 107 /* see if peer is connected ... can sleep */
101 int (*check_connect)(struct usbnet *); 108 int (*check_connect)(struct usbnet *);
102 109
@@ -118,9 +125,8 @@ struct driver_info {
118 * right after minidriver have initialized hardware. */ 125 * right after minidriver have initialized hardware. */
119 int (*early_init)(struct usbnet *dev); 126 int (*early_init)(struct usbnet *dev);
120 127
121 /* called by minidriver when link state changes, state: 0=disconnect, 128 /* called by minidriver when receiving indication */
122 * 1=connect */ 129 void (*indication)(struct usbnet *dev, void *ind, int indlen);
123 void (*link_change)(struct usbnet *dev, int state);
124 130
125 /* for new devices, use the descriptor-reading code instead */ 131 /* for new devices, use the descriptor-reading code instead */
126 int in; /* rx endpoint */ 132 int in; /* rx endpoint */
@@ -177,7 +183,8 @@ struct skb_data { /* skb->cb is one of these */
177 183
178extern int usbnet_open (struct net_device *net); 184extern int usbnet_open (struct net_device *net);
179extern int usbnet_stop (struct net_device *net); 185extern int usbnet_stop (struct net_device *net);
180extern int usbnet_start_xmit (struct sk_buff *skb, struct net_device *net); 186extern netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,
187 struct net_device *net);
181extern void usbnet_tx_timeout (struct net_device *net); 188extern void usbnet_tx_timeout (struct net_device *net);
182extern int usbnet_change_mtu (struct net_device *net, int new_mtu); 189extern int usbnet_change_mtu (struct net_device *net, int new_mtu);
183 190
@@ -187,6 +194,10 @@ extern void usbnet_defer_kevent (struct usbnet *, int);
187extern void usbnet_skb_return (struct usbnet *, struct sk_buff *); 194extern void usbnet_skb_return (struct usbnet *, struct sk_buff *);
188extern void usbnet_unlink_rx_urbs(struct usbnet *); 195extern void usbnet_unlink_rx_urbs(struct usbnet *);
189 196
197extern void usbnet_pause_rx(struct usbnet *);
198extern void usbnet_resume_rx(struct usbnet *);
199extern void usbnet_purge_paused_rxq(struct usbnet *);
200
190extern int usbnet_get_settings (struct net_device *net, struct ethtool_cmd *cmd); 201extern int usbnet_get_settings (struct net_device *net, struct ethtool_cmd *cmd);
191extern int usbnet_set_settings (struct net_device *net, struct ethtool_cmd *cmd); 202extern int usbnet_set_settings (struct net_device *net, struct ethtool_cmd *cmd);
192extern u32 usbnet_get_link (struct net_device *net); 203extern u32 usbnet_get_link (struct net_device *net);
diff --git a/include/linux/usb/video.h b/include/linux/usb/video.h
new file mode 100644
index 000000000000..be436d9ee479
--- /dev/null
+++ b/include/linux/usb/video.h
@@ -0,0 +1,164 @@
1/*
2 * USB Video Class definitions.
3 *
4 * Copyright (C) 2009 Laurent Pinchart <laurent.pinchart@skynet.be>
5 *
6 * This file holds USB constants and structures defined by the USB Device
7 * Class Definition for Video Devices. Unless otherwise stated, comments
8 * below reference relevant sections of the USB Video Class 1.1 specification
9 * available at
10 *
11 * http://www.usb.org/developers/devclass_docs/USB_Video_Class_1_1.zip
12 */
13
14#ifndef __LINUX_USB_VIDEO_H
15#define __LINUX_USB_VIDEO_H
16
17#include <linux/types.h>
18
19/* --------------------------------------------------------------------------
20 * UVC constants
21 */
22
23/* A.2. Video Interface Subclass Codes */
24#define UVC_SC_UNDEFINED 0x00
25#define UVC_SC_VIDEOCONTROL 0x01
26#define UVC_SC_VIDEOSTREAMING 0x02
27#define UVC_SC_VIDEO_INTERFACE_COLLECTION 0x03
28
29/* A.3. Video Interface Protocol Codes */
30#define UVC_PC_PROTOCOL_UNDEFINED 0x00
31
32/* A.5. Video Class-Specific VC Interface Descriptor Subtypes */
33#define UVC_VC_DESCRIPTOR_UNDEFINED 0x00
34#define UVC_VC_HEADER 0x01
35#define UVC_VC_INPUT_TERMINAL 0x02
36#define UVC_VC_OUTPUT_TERMINAL 0x03
37#define UVC_VC_SELECTOR_UNIT 0x04
38#define UVC_VC_PROCESSING_UNIT 0x05
39#define UVC_VC_EXTENSION_UNIT 0x06
40
41/* A.6. Video Class-Specific VS Interface Descriptor Subtypes */
42#define UVC_VS_UNDEFINED 0x00
43#define UVC_VS_INPUT_HEADER 0x01
44#define UVC_VS_OUTPUT_HEADER 0x02
45#define UVC_VS_STILL_IMAGE_FRAME 0x03
46#define UVC_VS_FORMAT_UNCOMPRESSED 0x04
47#define UVC_VS_FRAME_UNCOMPRESSED 0x05
48#define UVC_VS_FORMAT_MJPEG 0x06
49#define UVC_VS_FRAME_MJPEG 0x07
50#define UVC_VS_FORMAT_MPEG2TS 0x0a
51#define UVC_VS_FORMAT_DV 0x0c
52#define UVC_VS_COLORFORMAT 0x0d
53#define UVC_VS_FORMAT_FRAME_BASED 0x10
54#define UVC_VS_FRAME_FRAME_BASED 0x11
55#define UVC_VS_FORMAT_STREAM_BASED 0x12
56
57/* A.7. Video Class-Specific Endpoint Descriptor Subtypes */
58#define UVC_EP_UNDEFINED 0x00
59#define UVC_EP_GENERAL 0x01
60#define UVC_EP_ENDPOINT 0x02
61#define UVC_EP_INTERRUPT 0x03
62
63/* A.8. Video Class-Specific Request Codes */
64#define UVC_RC_UNDEFINED 0x00
65#define UVC_SET_CUR 0x01
66#define UVC_GET_CUR 0x81
67#define UVC_GET_MIN 0x82
68#define UVC_GET_MAX 0x83
69#define UVC_GET_RES 0x84
70#define UVC_GET_LEN 0x85
71#define UVC_GET_INFO 0x86
72#define UVC_GET_DEF 0x87
73
74/* A.9.1. VideoControl Interface Control Selectors */
75#define UVC_VC_CONTROL_UNDEFINED 0x00
76#define UVC_VC_VIDEO_POWER_MODE_CONTROL 0x01
77#define UVC_VC_REQUEST_ERROR_CODE_CONTROL 0x02
78
79/* A.9.2. Terminal Control Selectors */
80#define UVC_TE_CONTROL_UNDEFINED 0x00
81
82/* A.9.3. Selector Unit Control Selectors */
83#define UVC_SU_CONTROL_UNDEFINED 0x00
84#define UVC_SU_INPUT_SELECT_CONTROL 0x01
85
86/* A.9.4. Camera Terminal Control Selectors */
87#define UVC_CT_CONTROL_UNDEFINED 0x00
88#define UVC_CT_SCANNING_MODE_CONTROL 0x01
89#define UVC_CT_AE_MODE_CONTROL 0x02
90#define UVC_CT_AE_PRIORITY_CONTROL 0x03
91#define UVC_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x04
92#define UVC_CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x05
93#define UVC_CT_FOCUS_ABSOLUTE_CONTROL 0x06
94#define UVC_CT_FOCUS_RELATIVE_CONTROL 0x07
95#define UVC_CT_FOCUS_AUTO_CONTROL 0x08
96#define UVC_CT_IRIS_ABSOLUTE_CONTROL 0x09
97#define UVC_CT_IRIS_RELATIVE_CONTROL 0x0a
98#define UVC_CT_ZOOM_ABSOLUTE_CONTROL 0x0b
99#define UVC_CT_ZOOM_RELATIVE_CONTROL 0x0c
100#define UVC_CT_PANTILT_ABSOLUTE_CONTROL 0x0d
101#define UVC_CT_PANTILT_RELATIVE_CONTROL 0x0e
102#define UVC_CT_ROLL_ABSOLUTE_CONTROL 0x0f
103#define UVC_CT_ROLL_RELATIVE_CONTROL 0x10
104#define UVC_CT_PRIVACY_CONTROL 0x11
105
106/* A.9.5. Processing Unit Control Selectors */
107#define UVC_PU_CONTROL_UNDEFINED 0x00
108#define UVC_PU_BACKLIGHT_COMPENSATION_CONTROL 0x01
109#define UVC_PU_BRIGHTNESS_CONTROL 0x02
110#define UVC_PU_CONTRAST_CONTROL 0x03
111#define UVC_PU_GAIN_CONTROL 0x04
112#define UVC_PU_POWER_LINE_FREQUENCY_CONTROL 0x05
113#define UVC_PU_HUE_CONTROL 0x06
114#define UVC_PU_SATURATION_CONTROL 0x07
115#define UVC_PU_SHARPNESS_CONTROL 0x08
116#define UVC_PU_GAMMA_CONTROL 0x09
117#define UVC_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x0a
118#define UVC_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x0b
119#define UVC_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x0c
120#define UVC_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x0d
121#define UVC_PU_DIGITAL_MULTIPLIER_CONTROL 0x0e
122#define UVC_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x0f
123#define UVC_PU_HUE_AUTO_CONTROL 0x10
124#define UVC_PU_ANALOG_VIDEO_STANDARD_CONTROL 0x11
125#define UVC_PU_ANALOG_LOCK_STATUS_CONTROL 0x12
126
127/* A.9.7. VideoStreaming Interface Control Selectors */
128#define UVC_VS_CONTROL_UNDEFINED 0x00
129#define UVC_VS_PROBE_CONTROL 0x01
130#define UVC_VS_COMMIT_CONTROL 0x02
131#define UVC_VS_STILL_PROBE_CONTROL 0x03
132#define UVC_VS_STILL_COMMIT_CONTROL 0x04
133#define UVC_VS_STILL_IMAGE_TRIGGER_CONTROL 0x05
134#define UVC_VS_STREAM_ERROR_CODE_CONTROL 0x06
135#define UVC_VS_GENERATE_KEY_FRAME_CONTROL 0x07
136#define UVC_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x08
137#define UVC_VS_SYNC_DELAY_CONTROL 0x09
138
139/* B.1. USB Terminal Types */
140#define UVC_TT_VENDOR_SPECIFIC 0x0100
141#define UVC_TT_STREAMING 0x0101
142
143/* B.2. Input Terminal Types */
144#define UVC_ITT_VENDOR_SPECIFIC 0x0200
145#define UVC_ITT_CAMERA 0x0201
146#define UVC_ITT_MEDIA_TRANSPORT_INPUT 0x0202
147
148/* B.3. Output Terminal Types */
149#define UVC_OTT_VENDOR_SPECIFIC 0x0300
150#define UVC_OTT_DISPLAY 0x0301
151#define UVC_OTT_MEDIA_TRANSPORT_OUTPUT 0x0302
152
153/* B.4. External Terminal Types */
154#define UVC_EXTERNAL_VENDOR_SPECIFIC 0x0400
155#define UVC_COMPOSITE_CONNECTOR 0x0401
156#define UVC_SVIDEO_CONNECTOR 0x0402
157#define UVC_COMPONENT_CONNECTOR 0x0403
158
159/* 2.4.2.2. Status Packet Type */
160#define UVC_STATUS_TYPE_CONTROL 1
161#define UVC_STATUS_TYPE_STREAMING 2
162
163#endif /* __LINUX_USB_VIDEO_H */
164
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 20:05:37 -0500