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Diffstat (limited to 'include/linux/usb/net2280.h')
-rw-r--r--include/linux/usb/net2280.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/include/linux/usb/net2280.h b/include/linux/usb/net2280.h
index c602f884f182..ec897cb844ab 100644
--- a/include/linux/usb/net2280.h
+++ b/include/linux/usb/net2280.h
@@ -37,7 +37,7 @@
37 37
38/* main registers, BAR0 + 0x0000 */ 38/* main registers, BAR0 + 0x0000 */
39struct net2280_regs { 39struct net2280_regs {
40 // offset 0x0000 40 /* offset 0x0000 */
41 u32 devinit; 41 u32 devinit;
42#define LOCAL_CLOCK_FREQUENCY 8 42#define LOCAL_CLOCK_FREQUENCY 8
43#define FORCE_PCI_RESET 7 43#define FORCE_PCI_RESET 7
@@ -61,7 +61,7 @@ struct net2280_regs {
61#define EEPROM_WRITE_DATA 0 61#define EEPROM_WRITE_DATA 0
62 u32 eeclkfreq; 62 u32 eeclkfreq;
63 u32 _unused0; 63 u32 _unused0;
64 // offset 0x0010 64 /* offset 0x0010 */
65 65
66 u32 pciirqenb0; /* interrupt PCI master ... */ 66 u32 pciirqenb0; /* interrupt PCI master ... */
67#define SETUP_PACKET_INTERRUPT_ENABLE 7 67#define SETUP_PACKET_INTERRUPT_ENABLE 7
@@ -131,7 +131,7 @@ struct net2280_regs {
131#define RESUME_INTERRUPT_ENABLE 1 131#define RESUME_INTERRUPT_ENABLE 1
132#define SOF_INTERRUPT_ENABLE 0 132#define SOF_INTERRUPT_ENABLE 0
133 133
134 // offset 0x0020 134 /* offset 0x0020 */
135 u32 _unused1; 135 u32 _unused1;
136 u32 usbirqenb1; 136 u32 usbirqenb1;
137#define USB_INTERRUPT_ENABLE 31 137#define USB_INTERRUPT_ENABLE 31
@@ -195,7 +195,7 @@ struct net2280_regs {
195#define SUSPEND_REQUEST_CHANGE_INTERRUPT 2 195#define SUSPEND_REQUEST_CHANGE_INTERRUPT 2
196#define RESUME_INTERRUPT 1 196#define RESUME_INTERRUPT 1
197#define SOF_INTERRUPT 0 197#define SOF_INTERRUPT 0
198 // offset 0x0030 198 /* offset 0x0030 */
199 u32 idxaddr; 199 u32 idxaddr;
200 u32 idxdata; 200 u32 idxdata;
201 u32 fifoctl; 201 u32 fifoctl;
@@ -204,7 +204,7 @@ struct net2280_regs {
204#define PCI_BASE2_SELECT 2 204#define PCI_BASE2_SELECT 2
205#define FIFO_CONFIGURATION_SELECT 0 205#define FIFO_CONFIGURATION_SELECT 0
206 u32 _unused2; 206 u32 _unused2;
207 // offset 0x0040 207 /* offset 0x0040 */
208 u32 memaddr; 208 u32 memaddr;
209#define START 28 209#define START 28
210#define DIRECTION 27 210#define DIRECTION 27
@@ -213,7 +213,7 @@ struct net2280_regs {
213 u32 memdata0; 213 u32 memdata0;
214 u32 memdata1; 214 u32 memdata1;
215 u32 _unused3; 215 u32 _unused3;
216 // offset 0x0050 216 /* offset 0x0050 */
217 u32 gpioctl; 217 u32 gpioctl;
218#define GPIO3_LED_SELECT 12 218#define GPIO3_LED_SELECT 12
219#define GPIO3_INTERRUPT_ENABLE 11 219#define GPIO3_INTERRUPT_ENABLE 11
@@ -237,7 +237,7 @@ struct net2280_regs {
237 237
238/* usb control, BAR0 + 0x0080 */ 238/* usb control, BAR0 + 0x0080 */
239struct net2280_usb_regs { 239struct net2280_usb_regs {
240 // offset 0x0080 240 /* offset 0x0080 */
241 u32 stdrsp; 241 u32 stdrsp;
242#define STALL_UNSUPPORTED_REQUESTS 31 242#define STALL_UNSUPPORTED_REQUESTS 31
243#define SET_TEST_MODE 16 243#define SET_TEST_MODE 16
@@ -275,7 +275,7 @@ struct net2280_usb_regs {
275#define PME_WAKEUP_ENABLE 2 275#define PME_WAKEUP_ENABLE 2
276#define DEVICE_REMOTE_WAKEUP_ENABLE 1 276#define DEVICE_REMOTE_WAKEUP_ENABLE 1
277#define SELF_POWERED_STATUS 0 277#define SELF_POWERED_STATUS 0
278 // offset 0x0090 278 /* offset 0x0090 */
279 u32 usbstat; 279 u32 usbstat;
280#define HIGH_SPEED 7 280#define HIGH_SPEED 7
281#define FULL_SPEED 6 281#define FULL_SPEED 6
@@ -291,7 +291,7 @@ struct net2280_usb_regs {
291#define TERMINATION_SELECT 0 291#define TERMINATION_SELECT 0
292 u32 setup0123; 292 u32 setup0123;
293 u32 setup4567; 293 u32 setup4567;
294 // offset 0x0090 294 /* offset 0x0090 */
295 u32 _unused0; 295 u32 _unused0;
296 u32 ouraddr; 296 u32 ouraddr;
297#define FORCE_IMMEDIATE 7 297#define FORCE_IMMEDIATE 7
@@ -301,7 +301,7 @@ struct net2280_usb_regs {
301 301
302/* pci control, BAR0 + 0x0100 */ 302/* pci control, BAR0 + 0x0100 */
303struct net2280_pci_regs { 303struct net2280_pci_regs {
304 // offset 0x0100 304 /* offset 0x0100 */
305 u32 pcimstctl; 305 u32 pcimstctl;
306#define PCI_ARBITER_PARK_SELECT 13 306#define PCI_ARBITER_PARK_SELECT 13
307#define PCI_MULTI LEVEL_ARBITER 12 307#define PCI_MULTI LEVEL_ARBITER 12
@@ -331,7 +331,7 @@ struct net2280_pci_regs {
331 * that can be loaded into some of these registers. 331 * that can be loaded into some of these registers.
332 */ 332 */
333struct net2280_dma_regs { /* [11.7] */ 333struct net2280_dma_regs { /* [11.7] */
334 // offset 0x0180, 0x01a0, 0x01c0, 0x01e0, 334 /* offset 0x0180, 0x01a0, 0x01c0, 0x01e0, */
335 u32 dmactl; 335 u32 dmactl;
336#define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25 336#define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25
337#define DMA_CLEAR_COUNT_ENABLE 21 337#define DMA_CLEAR_COUNT_ENABLE 21
@@ -355,7 +355,7 @@ struct net2280_dma_regs { /* [11.7] */
355#define DMA_ABORT 1 355#define DMA_ABORT 1
356#define DMA_START 0 356#define DMA_START 0
357 u32 _unused0 [2]; 357 u32 _unused0 [2];
358 // offset 0x0190, 0x01b0, 0x01d0, 0x01f0, 358 /* offset 0x0190, 0x01b0, 0x01d0, 0x01f0, */
359 u32 dmacount; 359 u32 dmacount;
360#define VALID_BIT 31 360#define VALID_BIT 31
361#define DMA_DIRECTION 30 361#define DMA_DIRECTION 30
@@ -371,9 +371,9 @@ struct net2280_dma_regs { /* [11.7] */
371/* dedicated endpoint registers, BAR0 + 0x0200 */ 371/* dedicated endpoint registers, BAR0 + 0x0200 */
372 372
373struct net2280_dep_regs { /* [11.8] */ 373struct net2280_dep_regs { /* [11.8] */
374 // offset 0x0200, 0x0210, 0x220, 0x230, 0x240 374 /* offset 0x0200, 0x0210, 0x220, 0x230, 0x240 */
375 u32 dep_cfg; 375 u32 dep_cfg;
376 // offset 0x0204, 0x0214, 0x224, 0x234, 0x244 376 /* offset 0x0204, 0x0214, 0x224, 0x234, 0x244 */
377 u32 dep_rsp; 377 u32 dep_rsp;
378 u32 _unused [2]; 378 u32 _unused [2];
379} __attribute__ ((packed)); 379} __attribute__ ((packed));
@@ -383,7 +383,7 @@ struct net2280_dep_regs { /* [11.8] */
383 * ep0 reserved for control; E and F have only 64 bytes of fifo 383 * ep0 reserved for control; E and F have only 64 bytes of fifo
384 */ 384 */
385struct net2280_ep_regs { /* [11.9] */ 385struct net2280_ep_regs { /* [11.9] */
386 // offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0 386 /* offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0 */
387 u32 ep_cfg; 387 u32 ep_cfg;
388#define ENDPOINT_BYTE_COUNT 16 388#define ENDPOINT_BYTE_COUNT 16
389#define ENDPOINT_ENABLE 10 389#define ENDPOINT_ENABLE 10
@@ -435,7 +435,7 @@ struct net2280_ep_regs { /* [11.9] */
435#define DATA_PACKET_TRANSMITTED_INTERRUPT 2 435#define DATA_PACKET_TRANSMITTED_INTERRUPT 2
436#define DATA_OUT_PING_TOKEN_INTERRUPT 1 436#define DATA_OUT_PING_TOKEN_INTERRUPT 1
437#define DATA_IN_TOKEN_INTERRUPT 0 437#define DATA_IN_TOKEN_INTERRUPT 0
438 // offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0 438 /* offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0 */
439 u32 ep_avail; 439 u32 ep_avail;
440 u32 ep_data; 440 u32 ep_data;
441 u32 _unused0 [2]; 441 u32 _unused0 [2];