diff options
Diffstat (limited to 'include/linux/ssb')
-rw-r--r-- | include/linux/ssb/ssb.h | 32 | ||||
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 32 |
2 files changed, 58 insertions, 6 deletions
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h index 2b5c312c4960..cdd8a2fd4a69 100644 --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h | |||
@@ -78,13 +78,34 @@ struct ssb_sprom_r3 { | |||
78 | u32 ofdmgpo; /* G-PHY OFDM Power Offset */ | 78 | u32 ofdmgpo; /* G-PHY OFDM Power Offset */ |
79 | }; | 79 | }; |
80 | 80 | ||
81 | struct ssb_sprom_r4 { | ||
82 | /* TODO */ | ||
83 | }; | ||
84 | |||
85 | struct ssb_sprom { | 81 | struct ssb_sprom { |
86 | u8 revision; | 82 | u8 revision; |
87 | u8 crc; | 83 | u8 temp_fill[2 * sizeof(struct ssb_sprom_r1)]; |
84 | u8 il0mac[6]; /* MAC address for 802.11b/g */ | ||
85 | u8 et0mac[6]; /* MAC address for Ethernet */ | ||
86 | u8 et1mac[6]; /* MAC address for 802.11a */ | ||
87 | u8 et0phyaddr; /* MII address for enet0 */ | ||
88 | u8 et1phyaddr; /* MII address for enet1 */ | ||
89 | u8 country_code; /* Country Code */ | ||
90 | u16 pa0b0; | ||
91 | u16 pa0b1; | ||
92 | u16 pa0b2; | ||
93 | u16 pa1b0; | ||
94 | u16 pa1b1; | ||
95 | u16 pa1b2; | ||
96 | u8 gpio0; /* GPIO pin 0 */ | ||
97 | u8 gpio1; /* GPIO pin 1 */ | ||
98 | u8 gpio2; /* GPIO pin 2 */ | ||
99 | u8 gpio3; /* GPIO pin 3 */ | ||
100 | u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */ | ||
101 | u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */ | ||
102 | u8 itssi_a; /* Idle TSSI Target for A-PHY */ | ||
103 | u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ | ||
104 | u16 boardflags_lo; /* Boardflags (low 16 bits) */ | ||
105 | u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */ | ||
106 | u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */ | ||
107 | |||
108 | /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */ | ||
88 | /* The valid r# fields are selected by the "revision". | 109 | /* The valid r# fields are selected by the "revision". |
89 | * Revision 3 and lower inherit from lower revisions. | 110 | * Revision 3 and lower inherit from lower revisions. |
90 | */ | 111 | */ |
@@ -94,7 +115,6 @@ struct ssb_sprom { | |||
94 | struct ssb_sprom_r2 r2; | 115 | struct ssb_sprom_r2 r2; |
95 | struct ssb_sprom_r3 r3; | 116 | struct ssb_sprom_r3 r3; |
96 | }; | 117 | }; |
97 | struct ssb_sprom_r4 r4; | ||
98 | }; | 118 | }; |
99 | }; | 119 | }; |
100 | 120 | ||
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 47c7c71a5acf..bcebcffd448b 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -250,6 +250,38 @@ | |||
250 | #define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */ | 250 | #define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */ |
251 | #define SSB_SPROM3_CCKPO_11M_SHIFT 12 | 251 | #define SSB_SPROM3_CCKPO_11M_SHIFT 12 |
252 | #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ | 252 | #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ |
253 | /* SPROM Revision 4 */ | ||
254 | #define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for b/g */ | ||
255 | #define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings */ | ||
256 | #define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ | ||
257 | #define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ | ||
258 | #define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5 | ||
259 | #define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */ | ||
260 | #define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */ | ||
261 | #define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */ | ||
262 | #define SSB_SPROM4_ANT_A 0x105D /* A Antennas */ | ||
263 | #define SSB_SPROM4_ANT_BG 0x105C /* B/G Antennas */ | ||
264 | #define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */ | ||
265 | #define SSB_SPROM4_AGAIN 0x105E /* Antenna Gain (in dBm Q5.2) */ | ||
266 | #define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ | ||
267 | #define SSB_SPROM4_MAXP_A 0x1000 /* Max Power A */ | ||
268 | #define SSB_SPROM4_MAXP_A_HI 0x00FF /* Mask for Hi */ | ||
269 | #define SSB_SPROM4_MAXP_A_LO 0xFF00 /* Mask for Lo */ | ||
270 | #define SSB_SPROM4_MAXP_A_LO_SHIFT 16 /* Shift for Lo */ | ||
271 | #define SSB_SPROM4_PA1LOB0 0x1000 | ||
272 | #define SSB_SPROM4_PA1LOB1 0x1000 | ||
273 | #define SSB_SPROM4_PA1LOB2 0x1000 | ||
274 | #define SSB_SPROM4_PA1HIB0 0x1000 | ||
275 | #define SSB_SPROM4_PA1HIB1 0x1000 | ||
276 | #define SSB_SPROM4_PA1HIB2 0x1000 | ||
277 | #define SSB_SPROM4_OPO 0x1000 | ||
278 | #define SSB_SPROM4_OPO_VALUE 0x0000 | ||
279 | #define SSB_SPROM4_GPIOLDC 0x105A /* LED Powersave Duty Cycle */ | ||
280 | #define SSB_SPROM4_GPIOLDC_OFF 0x0000FF00 /* Off Count */ | ||
281 | #define SSB_SPROM4_GPIOLDC_OFF_SHIFT 8 | ||
282 | #define SSB_SPROM4_GPIOLDC_ON 0x00FF0000 /* On Count */ | ||
283 | #define SSB_SPROM4_GPIOLDC_ON_SHIFT 16 | ||
284 | |||
253 | 285 | ||
254 | /* Values for SSB_SPROM1_BINF_CCODE */ | 286 | /* Values for SSB_SPROM1_BINF_CCODE */ |
255 | enum { | 287 | enum { |