3 files changed, 55 insertions, 6 deletions

diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 623b704fdc42..9659eff52ca2 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -55,6 +55,10 @@ struct ssb_sprom {
         u8 tri5gl;              /* 5.2GHz TX isolation */
         u8 tri5g;               /* 5.3GHz TX isolation */
         u8 tri5gh;              /* 5.8GHz TX isolation */
+        u8 txpid2g[4];          /* 2GHz TX power index */
+        u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
+        u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
+        u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
         u8 rxpo2g;              /* 2GHz RX power offset */
         u8 rxpo5g;              /* 5GHz RX power offset */
         u8 rssisav2g;           /* 2GHz RSSI params */
diff --git a/include/linux/ssb/ssb_driver_gige.h b/include/linux/ssb/ssb_driver_gige.h
index 942e38736901..eba52a100533 100644
--- a/include/linux/ssb/ssb_driver_gige.h
+++ b/include/linux/ssb/ssb_driver_gige.h
@@ -96,16 +96,21 @@ static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
         return 0;
 }
 
-extern char * nvram_get(const char *name);
+#ifdef CONFIG_BCM47XX
+#include <asm/mach-bcm47xx/nvram.h>
 /* Get the device MAC address */
 static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
 {
-#ifdef CONFIG_BCM47XX
-        char *res = nvram_get("et0macaddr");
-        if (res)
-                memcpy(macaddr, res, 6);
-#endif
+        char buf[20];
+        if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
+                return;
+        nvram_parse_macaddr(buf, macaddr);
 }
+#else
+static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
+{
+}
+#endif
 
 extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
                                           struct pci_dev *pdev);
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 11daf9c140e7..489f7b6d61c5 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -299,6 +299,46 @@
 #define  SSB_SPROM4_AGAIN2_SHIFT        0
 #define  SSB_SPROM4_AGAIN3              0xFF00  /* Antenna 3 */
 #define  SSB_SPROM4_AGAIN3_SHIFT        8
+#define SSB_SPROM4_TXPID2G01            0x0062  /* TX Power Index 2GHz */
+#define  SSB_SPROM4_TXPID2G0            0x00FF
+#define  SSB_SPROM4_TXPID2G0_SHIFT      0
+#define  SSB_SPROM4_TXPID2G1            0xFF00
+#define  SSB_SPROM4_TXPID2G1_SHIFT      8
+#define SSB_SPROM4_TXPID2G23            0x0064  /* TX Power Index 2GHz */
+#define  SSB_SPROM4_TXPID2G2            0x00FF
+#define  SSB_SPROM4_TXPID2G2_SHIFT      0
+#define  SSB_SPROM4_TXPID2G3            0xFF00
+#define  SSB_SPROM4_TXPID2G3_SHIFT      8
+#define SSB_SPROM4_TXPID5G01            0x0066  /* TX Power Index 5GHz middle subband */
+#define  SSB_SPROM4_TXPID5G0            0x00FF
+#define  SSB_SPROM4_TXPID5G0_SHIFT      0
+#define  SSB_SPROM4_TXPID5G1            0xFF00
+#define  SSB_SPROM4_TXPID5G1_SHIFT      8
+#define SSB_SPROM4_TXPID5G23            0x0068  /* TX Power Index 5GHz middle subband */
+#define  SSB_SPROM4_TXPID5G2            0x00FF
+#define  SSB_SPROM4_TXPID5G2_SHIFT      0
+#define  SSB_SPROM4_TXPID5G3            0xFF00
+#define  SSB_SPROM4_TXPID5G3_SHIFT      8
+#define SSB_SPROM4_TXPID5GL01           0x006A  /* TX Power Index 5GHz low subband */
+#define  SSB_SPROM4_TXPID5GL0           0x00FF
+#define  SSB_SPROM4_TXPID5GL0_SHIFT     0
+#define  SSB_SPROM4_TXPID5GL1           0xFF00
+#define  SSB_SPROM4_TXPID5GL1_SHIFT     8
+#define SSB_SPROM4_TXPID5GL23           0x006C  /* TX Power Index 5GHz low subband */
+#define  SSB_SPROM4_TXPID5GL2           0x00FF
+#define  SSB_SPROM4_TXPID5GL2_SHIFT     0
+#define  SSB_SPROM4_TXPID5GL3           0xFF00
+#define  SSB_SPROM4_TXPID5GL3_SHIFT     8
+#define SSB_SPROM4_TXPID5GH01           0x006E  /* TX Power Index 5GHz high subband */
+#define  SSB_SPROM4_TXPID5GH0           0x00FF
+#define  SSB_SPROM4_TXPID5GH0_SHIFT     0
+#define  SSB_SPROM4_TXPID5GH1           0xFF00
+#define  SSB_SPROM4_TXPID5GH1_SHIFT     8
+#define SSB_SPROM4_TXPID5GH23           0x0070  /* TX Power Index 5GHz high subband */
+#define  SSB_SPROM4_TXPID5GH2           0x00FF
+#define  SSB_SPROM4_TXPID5GH2_SHIFT     0
+#define  SSB_SPROM4_TXPID5GH3           0xFF00
+#define  SSB_SPROM4_TXPID5GH3_SHIFT     8
 #define SSB_SPROM4_MAXP_BG              0x0080  /* Max Power BG in path 1 */
 #define  SSB_SPROM4_MAXP_BG_MASK        0x00FF  /* Mask for Max Power BG */
 #define  SSB_SPROM4_ITSSI_BG            0xFF00  /* Mask for path 1 itssi_bg */