diff options
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 30222e89ad16..ebad0bac9801 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -193,10 +193,10 @@ | |||
193 | #define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */ | 193 | #define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */ |
194 | #define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */ | 194 | #define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */ |
195 | #define SSB_SPROM1_BINF_CCODE_SHIFT 8 | 195 | #define SSB_SPROM1_BINF_CCODE_SHIFT 8 |
196 | #define SSB_SPROM1_BINF_ANTA 0x3000 /* Available A-PHY antennas */ | 196 | #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */ |
197 | #define SSB_SPROM1_BINF_ANTA_SHIFT 12 | 197 | #define SSB_SPROM1_BINF_ANTBG_SHIFT 12 |
198 | #define SSB_SPROM1_BINF_ANTBG 0xC000 /* Available B-PHY antennas */ | 198 | #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */ |
199 | #define SSB_SPROM1_BINF_ANTBG_SHIFT 14 | 199 | #define SSB_SPROM1_BINF_ANTA_SHIFT 14 |
200 | #define SSB_SPROM1_PA0B0 0x105E | 200 | #define SSB_SPROM1_PA0B0 0x105E |
201 | #define SSB_SPROM1_PA0B1 0x1060 | 201 | #define SSB_SPROM1_PA0B1 0x1060 |
202 | #define SSB_SPROM1_PA0B2 0x1062 | 202 | #define SSB_SPROM1_PA0B2 0x1062 |
@@ -221,9 +221,10 @@ | |||
221 | #define SSB_SPROM1_ITSSI_A_SHIFT 8 | 221 | #define SSB_SPROM1_ITSSI_A_SHIFT 8 |
222 | #define SSB_SPROM1_BFLLO 0x1072 /* Boardflags (low 16 bits) */ | 222 | #define SSB_SPROM1_BFLLO 0x1072 /* Boardflags (low 16 bits) */ |
223 | #define SSB_SPROM1_AGAIN 0x1074 /* Antenna Gain (in dBm Q5.2) */ | 223 | #define SSB_SPROM1_AGAIN 0x1074 /* Antenna Gain (in dBm Q5.2) */ |
224 | #define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */ | 224 | #define SSB_SPROM1_AGAIN_BG 0x00FF /* B-PHY and G-PHY */ |
225 | #define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */ | 225 | #define SSB_SPROM1_AGAIN_BG_SHIFT 0 |
226 | #define SSB_SPROM1_AGAIN_BG_SHIFT 8 | 226 | #define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */ |
227 | #define SSB_SPROM1_AGAIN_A_SHIFT 8 | ||
227 | 228 | ||
228 | /* SPROM Revision 2 (inherits from rev 1) */ | 229 | /* SPROM Revision 2 (inherits from rev 1) */ |
229 | #define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */ | 230 | #define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */ |
@@ -264,7 +265,7 @@ | |||
264 | #define SSB_SPROM3_CCKPO_11M_SHIFT 12 | 265 | #define SSB_SPROM3_CCKPO_11M_SHIFT 12 |
265 | #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ | 266 | #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ |
266 | 267 | ||
267 | /* SPROM Revision 4 entries with ?? in comment are unknown */ | 268 | /* SPROM Revision 4 */ |
268 | #define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ | 269 | #define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ |
269 | #define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */ | 270 | #define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */ |
270 | #define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */ | 271 | #define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */ |
@@ -275,13 +276,22 @@ | |||
275 | #define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */ | 276 | #define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */ |
276 | #define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */ | 277 | #define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */ |
277 | #define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */ | 278 | #define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */ |
278 | #define SSB_SPROM4_ANT_A 0x105D /* A Antennas */ | 279 | #define SSB_SPROM4_ANTAVAIL 0x105D /* Antenna available bitfields */ |
279 | #define SSB_SPROM4_ANT_BG 0x105C /* B/G Antennas */ | 280 | #define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */ |
281 | #define SSB_SPROM4_ANTAVAIL_A_SHIFT 0 | ||
282 | #define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */ | ||
283 | #define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8 | ||
280 | #define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */ | 284 | #define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */ |
281 | #define SSB_SPROM4_AGAIN 0x105E /* Antenna Gain (in dBm Q5.2) */ | 285 | #define SSB_SPROM4_AGAIN01 0x105E /* Antenna Gain (in dBm Q5.2) */ |
282 | #define SSB_SPROM4_AGAIN_0 0x00FF /* Antenna 0 */ | 286 | #define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */ |
283 | #define SSB_SPROM4_AGAIN_1 0xFF00 /* Antenna 1 */ | 287 | #define SSB_SPROM4_AGAIN0_SHIFT 0 |
284 | #define SSB_SPROM4_AGAIN_1_SHIFT 8 | 288 | #define SSB_SPROM4_AGAIN1 0xFF00 /* Antenna 1 */ |
289 | #define SSB_SPROM4_AGAIN1_SHIFT 8 | ||
290 | #define SSB_SPROM4_AGAIN23 0x1060 | ||
291 | #define SSB_SPROM4_AGAIN2 0x00FF /* Antenna 2 */ | ||
292 | #define SSB_SPROM4_AGAIN2_SHIFT 0 | ||
293 | #define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */ | ||
294 | #define SSB_SPROM4_AGAIN3_SHIFT 8 | ||
285 | #define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ | 295 | #define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ |
286 | #define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */ | 296 | #define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */ |
287 | #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ | 297 | #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ |