diff options
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 66 |
1 files changed, 59 insertions, 7 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index a01b982b5783..9ae9082eaeb4 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -162,7 +162,7 @@ | |||
162 | 162 | ||
163 | /* SPROM shadow area. If not otherwise noted, fields are | 163 | /* SPROM shadow area. If not otherwise noted, fields are |
164 | * two bytes wide. Note that the SPROM can _only_ be read | 164 | * two bytes wide. Note that the SPROM can _only_ be read |
165 | * in two-byte quantinies. | 165 | * in two-byte quantities. |
166 | */ | 166 | */ |
167 | #define SSB_SPROMSIZE_WORDS 64 | 167 | #define SSB_SPROMSIZE_WORDS 64 |
168 | #define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16)) | 168 | #define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16)) |
@@ -327,8 +327,11 @@ | |||
327 | #define SSB_SPROM5_GPIOB_P3_SHIFT 8 | 327 | #define SSB_SPROM5_GPIOB_P3_SHIFT 8 |
328 | 328 | ||
329 | /* SPROM Revision 8 */ | 329 | /* SPROM Revision 8 */ |
330 | #define SSB_SPROM8_BFLLO 0x1084 /* Boardflags (low 16 bits) */ | 330 | #define SSB_SPROM8_BOARDREV 0x1082 /* Board revision */ |
331 | #define SSB_SPROM8_BFLHI 0x1086 /* Boardflags Hi */ | 331 | #define SSB_SPROM8_BFLLO 0x1084 /* Board flags (bits 0-15) */ |
332 | #define SSB_SPROM8_BFLHI 0x1086 /* Board flags (bits 16-31) */ | ||
333 | #define SSB_SPROM8_BFL2LO 0x1088 /* Board flags (bits 32-47) */ | ||
334 | #define SSB_SPROM8_BFL2HI 0x108A /* Board flags (bits 48-63) */ | ||
332 | #define SSB_SPROM8_IL0MAC 0x108C /* 6 byte MAC address */ | 335 | #define SSB_SPROM8_IL0MAC 0x108C /* 6 byte MAC address */ |
333 | #define SSB_SPROM8_CCODE 0x1092 /* 2 byte country code */ | 336 | #define SSB_SPROM8_CCODE 0x1092 /* 2 byte country code */ |
334 | #define SSB_SPROM8_ANTAVAIL 0x109C /* Antenna available bitfields*/ | 337 | #define SSB_SPROM8_ANTAVAIL 0x109C /* Antenna available bitfields*/ |
@@ -354,14 +357,63 @@ | |||
354 | #define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */ | 357 | #define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */ |
355 | #define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */ | 358 | #define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */ |
356 | #define SSB_SPROM8_GPIOB_P3_SHIFT 8 | 359 | #define SSB_SPROM8_GPIOB_P3_SHIFT 8 |
357 | #define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power BG in path 1 */ | 360 | #define SSB_SPROM8_RSSIPARM2G 0x10A4 /* RSSI params for 2GHz */ |
358 | #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ | 361 | #define SSB_SPROM8_RSSISMF2G 0x000F |
362 | #define SSB_SPROM8_RSSISMC2G 0x00F0 | ||
363 | #define SSB_SPROM8_RSSISMC2G_SHIFT 4 | ||
364 | #define SSB_SPROM8_RSSISAV2G 0x0700 | ||
365 | #define SSB_SPROM8_RSSISAV2G_SHIFT 8 | ||
366 | #define SSB_SPROM8_BXA2G 0x1800 | ||
367 | #define SSB_SPROM8_BXA2G_SHIFT 11 | ||
368 | #define SSB_SPROM8_RSSIPARM5G 0x10A6 /* RSSI params for 5GHz */ | ||
369 | #define SSB_SPROM8_RSSISMF5G 0x000F | ||
370 | #define SSB_SPROM8_RSSISMC5G 0x00F0 | ||
371 | #define SSB_SPROM8_RSSISMC5G_SHIFT 4 | ||
372 | #define SSB_SPROM8_RSSISAV5G 0x0700 | ||
373 | #define SSB_SPROM8_RSSISAV5G_SHIFT 8 | ||
374 | #define SSB_SPROM8_BXA5G 0x1800 | ||
375 | #define SSB_SPROM8_BXA5G_SHIFT 11 | ||
376 | #define SSB_SPROM8_TRI25G 0x10A8 /* TX isolation 2.4&5.3GHz */ | ||
377 | #define SSB_SPROM8_TRI2G 0x00FF /* TX isolation 2.4GHz */ | ||
378 | #define SSB_SPROM8_TRI5G 0xFF00 /* TX isolation 5.3GHz */ | ||
379 | #define SSB_SPROM8_TRI5G_SHIFT 8 | ||
380 | #define SSB_SPROM8_TRI5GHL 0x10AA /* TX isolation 5.2/5.8GHz */ | ||
381 | #define SSB_SPROM8_TRI5GL 0x00FF /* TX isolation 5.2GHz */ | ||
382 | #define SSB_SPROM8_TRI5GH 0xFF00 /* TX isolation 5.8GHz */ | ||
383 | #define SSB_SPROM8_TRI5GH_SHIFT 8 | ||
384 | #define SSB_SPROM8_RXPO 0x10AC /* RX power offsets */ | ||
385 | #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ | ||
386 | #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ | ||
387 | #define SSB_SPROM8_RXPO5G_SHIFT 8 | ||
388 | #define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power 2GHz in path 1 */ | ||
389 | #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ | ||
359 | #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ | 390 | #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ |
360 | #define SSB_SPROM8_ITSSI_BG_SHIFT 8 | 391 | #define SSB_SPROM8_ITSSI_BG_SHIFT 8 |
361 | #define SSB_SPROM8_MAXP_A 0x10C8 /* Max Power A in path 1 */ | 392 | #define SSB_SPROM8_PA0B0 0x10C2 /* 2GHz power amp settings */ |
362 | #define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power A */ | 393 | #define SSB_SPROM8_PA0B1 0x10C4 |
394 | #define SSB_SPROM8_PA0B2 0x10C6 | ||
395 | #define SSB_SPROM8_MAXP_A 0x10C8 /* Max Power 5.3GHz */ | ||
396 | #define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power 5.3GHz */ | ||
363 | #define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */ | 397 | #define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */ |
364 | #define SSB_SPROM8_ITSSI_A_SHIFT 8 | 398 | #define SSB_SPROM8_ITSSI_A_SHIFT 8 |
399 | #define SSB_SPROM8_MAXP_AHL 0x10CA /* Max Power 5.2/5.8GHz */ | ||
400 | #define SSB_SPROM8_MAXP_AH_MASK 0x00FF /* Mask for Max Power 5.8GHz */ | ||
401 | #define SSB_SPROM8_MAXP_AL_MASK 0xFF00 /* Mask for Max Power 5.2GHz */ | ||
402 | #define SSB_SPROM8_MAXP_AL_SHIFT 8 | ||
403 | #define SSB_SPROM8_PA1B0 0x10CC /* 5.3GHz power amp settings */ | ||
404 | #define SSB_SPROM8_PA1B1 0x10CE | ||
405 | #define SSB_SPROM8_PA1B2 0x10D0 | ||
406 | #define SSB_SPROM8_PA1LOB0 0x10D2 /* 5.2GHz power amp settings */ | ||
407 | #define SSB_SPROM8_PA1LOB1 0x10D4 | ||
408 | #define SSB_SPROM8_PA1LOB2 0x10D6 | ||
409 | #define SSB_SPROM8_PA1HIB0 0x10D8 /* 5.8GHz power amp settings */ | ||
410 | #define SSB_SPROM8_PA1HIB1 0x10DA | ||
411 | #define SSB_SPROM8_PA1HIB2 0x10DC | ||
412 | #define SSB_SPROM8_CCK2GPO 0x1140 /* CCK power offset */ | ||
413 | #define SSB_SPROM8_OFDM2GPO 0x1142 /* 2.4GHz OFDM power offset */ | ||
414 | #define SSB_SPROM8_OFDM5GPO 0x1146 /* 5.3GHz OFDM power offset */ | ||
415 | #define SSB_SPROM8_OFDM5GLPO 0x114A /* 5.2GHz OFDM power offset */ | ||
416 | #define SSB_SPROM8_OFDM5GHPO 0x114E /* 5.8GHz OFDM power offset */ | ||
365 | 417 | ||
366 | /* Values for SSB_SPROM1_BINF_CCODE */ | 418 | /* Values for SSB_SPROM1_BINF_CCODE */ |
367 | enum { | 419 | enum { |