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-rw-r--r--include/linux/spi/spi.h36
-rw-r--r--include/linux/spi/spi_bitbang.h5
2 files changed, 33 insertions, 8 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 28e440be1c07..887116dbce2c 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -74,7 +74,7 @@ struct spi_device {
74 struct spi_master *master; 74 struct spi_master *master;
75 u32 max_speed_hz; 75 u32 max_speed_hz;
76 u8 chip_select; 76 u8 chip_select;
77 u8 mode; 77 u16 mode;
78#define SPI_CPHA 0x01 /* clock phase */ 78#define SPI_CPHA 0x01 /* clock phase */
79#define SPI_CPOL 0x02 /* clock polarity */ 79#define SPI_CPOL 0x02 /* clock polarity */
80#define SPI_MODE_0 (0|0) /* (original MicroWire) */ 80#define SPI_MODE_0 (0|0) /* (original MicroWire) */
@@ -87,6 +87,10 @@ struct spi_device {
87#define SPI_LOOP 0x20 /* loopback mode */ 87#define SPI_LOOP 0x20 /* loopback mode */
88#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 88#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
89#define SPI_READY 0x80 /* slave pulls low to pause */ 89#define SPI_READY 0x80 /* slave pulls low to pause */
90#define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
91#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
92#define SPI_RX_DUAL 0x400 /* receive with 2 wires */
93#define SPI_RX_QUAD 0x800 /* receive with 4 wires */
90 u8 bits_per_word; 94 u8 bits_per_word;
91 int irq; 95 int irq;
92 void *controller_state; 96 void *controller_state;
@@ -233,6 +237,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
233 * suported. If set, the SPI core will reject any transfer with an 237 * suported. If set, the SPI core will reject any transfer with an
234 * unsupported bits_per_word. If not set, this value is simply ignored, 238 * unsupported bits_per_word. If not set, this value is simply ignored,
235 * and it's up to the individual driver to perform any validation. 239 * and it's up to the individual driver to perform any validation.
240 * @min_speed_hz: Lowest supported transfer speed
241 * @max_speed_hz: Highest supported transfer speed
236 * @flags: other constraints relevant to this driver 242 * @flags: other constraints relevant to this driver
237 * @bus_lock_spinlock: spinlock for SPI bus locking 243 * @bus_lock_spinlock: spinlock for SPI bus locking
238 * @bus_lock_mutex: mutex for SPI bus locking 244 * @bus_lock_mutex: mutex for SPI bus locking
@@ -254,6 +260,9 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
254 * @busy: message pump is busy 260 * @busy: message pump is busy
255 * @running: message pump is running 261 * @running: message pump is running
256 * @rt: whether this queue is set to run as a realtime task 262 * @rt: whether this queue is set to run as a realtime task
263 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
264 * while the hardware is prepared, using the parent
265 * device for the spidev
257 * @prepare_transfer_hardware: a message will soon arrive from the queue 266 * @prepare_transfer_hardware: a message will soon arrive from the queue
258 * so the subsystem requests the driver to prepare the transfer hardware 267 * so the subsystem requests the driver to prepare the transfer hardware
259 * by issuing this call 268 * by issuing this call
@@ -309,9 +318,13 @@ struct spi_master {
309 /* bitmask of supported bits_per_word for transfers */ 318 /* bitmask of supported bits_per_word for transfers */
310 u32 bits_per_word_mask; 319 u32 bits_per_word_mask;
311#define SPI_BPW_MASK(bits) BIT((bits) - 1) 320#define SPI_BPW_MASK(bits) BIT((bits) - 1)
312#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0UL : (BIT(bits) - 1)) 321#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
313#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1)) 322#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
314 323
324 /* limits on transfer speed */
325 u32 min_speed_hz;
326 u32 max_speed_hz;
327
315 /* other constraints relevant to this driver */ 328 /* other constraints relevant to this driver */
316 u16 flags; 329 u16 flags;
317#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 330#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
@@ -374,11 +387,13 @@ struct spi_master {
374 bool busy; 387 bool busy;
375 bool running; 388 bool running;
376 bool rt; 389 bool rt;
390 bool auto_runtime_pm;
377 391
378 int (*prepare_transfer_hardware)(struct spi_master *master); 392 int (*prepare_transfer_hardware)(struct spi_master *master);
379 int (*transfer_one_message)(struct spi_master *master, 393 int (*transfer_one_message)(struct spi_master *master,
380 struct spi_message *mesg); 394 struct spi_message *mesg);
381 int (*unprepare_transfer_hardware)(struct spi_master *master); 395 int (*unprepare_transfer_hardware)(struct spi_master *master);
396
382 /* gpio chip select */ 397 /* gpio chip select */
383 int *cs_gpios; 398 int *cs_gpios;
384}; 399};
@@ -448,6 +463,10 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
448 * @rx_buf: data to be read (dma-safe memory), or NULL 463 * @rx_buf: data to be read (dma-safe memory), or NULL
449 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 464 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
450 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 465 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
466 * @tx_nbits: number of bits used for writting. If 0 the default
467 * (SPI_NBITS_SINGLE) is used.
468 * @rx_nbits: number of bits used for reading. If 0 the default
469 * (SPI_NBITS_SINGLE) is used.
451 * @len: size of rx and tx buffers (in bytes) 470 * @len: size of rx and tx buffers (in bytes)
452 * @speed_hz: Select a speed other than the device default for this 471 * @speed_hz: Select a speed other than the device default for this
453 * transfer. If 0 the default (from @spi_device) is used. 472 * transfer. If 0 the default (from @spi_device) is used.
@@ -502,6 +521,11 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
502 * by the results of previous messages and where the whole transaction 521 * by the results of previous messages and where the whole transaction
503 * ends when the chipselect goes intactive. 522 * ends when the chipselect goes intactive.
504 * 523 *
524 * When SPI can transfer in 1x,2x or 4x. It can get this tranfer information
525 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
526 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
527 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
528 *
505 * The code that submits an spi_message (and its spi_transfers) 529 * The code that submits an spi_message (and its spi_transfers)
506 * to the lower layers is responsible for managing its memory. 530 * to the lower layers is responsible for managing its memory.
507 * Zero-initialize every field you don't set up explicitly, to 531 * Zero-initialize every field you don't set up explicitly, to
@@ -522,6 +546,11 @@ struct spi_transfer {
522 dma_addr_t rx_dma; 546 dma_addr_t rx_dma;
523 547
524 unsigned cs_change:1; 548 unsigned cs_change:1;
549 u8 tx_nbits;
550 u8 rx_nbits;
551#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
552#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
553#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
525 u8 bits_per_word; 554 u8 bits_per_word;
526 u16 delay_usecs; 555 u16 delay_usecs;
527 u32 speed_hz; 556 u32 speed_hz;
@@ -578,6 +607,7 @@ struct spi_message {
578 /* completion is reported through a callback */ 607 /* completion is reported through a callback */
579 void (*complete)(void *context); 608 void (*complete)(void *context);
580 void *context; 609 void *context;
610 unsigned frame_length;
581 unsigned actual_length; 611 unsigned actual_length;
582 int status; 612 int status;
583 613
@@ -869,7 +899,7 @@ struct spi_board_info {
869 /* mode becomes spi_device.mode, and is essential for chips 899 /* mode becomes spi_device.mode, and is essential for chips
870 * where the default of SPI_CS_HIGH = 0 is wrong. 900 * where the default of SPI_CS_HIGH = 0 is wrong.
871 */ 901 */
872 u8 mode; 902 u16 mode;
873 903
874 /* ... may need additional spi_device chip config data here. 904 /* ... may need additional spi_device chip config data here.
875 * avoid stuff protocol drivers can set; but include stuff 905 * avoid stuff protocol drivers can set; but include stuff
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
index f987a2bee16a..daebaba886aa 100644
--- a/include/linux/spi/spi_bitbang.h
+++ b/include/linux/spi/spi_bitbang.h
@@ -4,11 +4,7 @@
4#include <linux/workqueue.h> 4#include <linux/workqueue.h>
5 5
6struct spi_bitbang { 6struct spi_bitbang {
7 struct workqueue_struct *workqueue;
8 struct work_struct work;
9
10 spinlock_t lock; 7 spinlock_t lock;
11 struct list_head queue;
12 u8 busy; 8 u8 busy;
13 u8 use_dma; 9 u8 use_dma;
14 u8 flags; /* extra spi->mode support */ 10 u8 flags; /* extra spi->mode support */
@@ -41,7 +37,6 @@ struct spi_bitbang {
41 */ 37 */
42extern int spi_bitbang_setup(struct spi_device *spi); 38extern int spi_bitbang_setup(struct spi_device *spi);
43extern void spi_bitbang_cleanup(struct spi_device *spi); 39extern void spi_bitbang_cleanup(struct spi_device *spi);
44extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
45extern int spi_bitbang_setup_transfer(struct spi_device *spi, 40extern int spi_bitbang_setup_transfer(struct spi_device *spi,
46 struct spi_transfer *t); 41 struct spi_transfer *t);
47 42