diff options
Diffstat (limited to 'include/linux/serial_s3c.h')
| -rw-r--r-- | include/linux/serial_s3c.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h index e6fc9567690b..a7f004a3c177 100644 --- a/include/linux/serial_s3c.h +++ b/include/linux/serial_s3c.h | |||
| @@ -104,6 +104,31 @@ | |||
| 104 | S3C2410_UCON_RXIRQMODE | \ | 104 | S3C2410_UCON_RXIRQMODE | \ |
| 105 | S3C2410_UCON_RXFIFO_TOI) | 105 | S3C2410_UCON_RXFIFO_TOI) |
| 106 | 106 | ||
| 107 | #define S3C64XX_UCON_TXBURST_1 (0<<20) | ||
| 108 | #define S3C64XX_UCON_TXBURST_4 (1<<20) | ||
| 109 | #define S3C64XX_UCON_TXBURST_8 (2<<20) | ||
| 110 | #define S3C64XX_UCON_TXBURST_16 (3<<20) | ||
| 111 | #define S3C64XX_UCON_TXBURST_MASK (0xf<<20) | ||
| 112 | #define S3C64XX_UCON_RXBURST_1 (0<<16) | ||
| 113 | #define S3C64XX_UCON_RXBURST_4 (1<<16) | ||
| 114 | #define S3C64XX_UCON_RXBURST_8 (2<<16) | ||
| 115 | #define S3C64XX_UCON_RXBURST_16 (3<<16) | ||
| 116 | #define S3C64XX_UCON_RXBURST_MASK (0xf<<16) | ||
| 117 | #define S3C64XX_UCON_TIMEOUT_SHIFT (12) | ||
| 118 | #define S3C64XX_UCON_TIMEOUT_MASK (0xf<<12) | ||
| 119 | #define S3C64XX_UCON_EMPTYINT_EN (1<<11) | ||
| 120 | #define S3C64XX_UCON_DMASUS_EN (1<<10) | ||
| 121 | #define S3C64XX_UCON_TXINT_LEVEL (1<<9) | ||
| 122 | #define S3C64XX_UCON_RXINT_LEVEL (1<<8) | ||
| 123 | #define S3C64XX_UCON_TIMEOUT_EN (1<<7) | ||
| 124 | #define S3C64XX_UCON_ERRINT_EN (1<<6) | ||
| 125 | #define S3C64XX_UCON_TXMODE_DMA (2<<2) | ||
| 126 | #define S3C64XX_UCON_TXMODE_CPU (1<<2) | ||
| 127 | #define S3C64XX_UCON_TXMODE_MASK (3<<2) | ||
| 128 | #define S3C64XX_UCON_RXMODE_DMA (2<<0) | ||
| 129 | #define S3C64XX_UCON_RXMODE_CPU (1<<0) | ||
| 130 | #define S3C64XX_UCON_RXMODE_MASK (3<<0) | ||
| 131 | |||
| 107 | #define S3C2410_UFCON_FIFOMODE (1<<0) | 132 | #define S3C2410_UFCON_FIFOMODE (1<<0) |
| 108 | #define S3C2410_UFCON_TXTRIG0 (0<<6) | 133 | #define S3C2410_UFCON_TXTRIG0 (0<<6) |
| 109 | #define S3C2410_UFCON_RXTRIG8 (1<<4) | 134 | #define S3C2410_UFCON_RXTRIG8 (1<<4) |
| @@ -155,6 +180,7 @@ | |||
| 155 | #define S3C2440_UFSTAT_TXMASK (63<<8) | 180 | #define S3C2440_UFSTAT_TXMASK (63<<8) |
| 156 | #define S3C2440_UFSTAT_RXMASK (63) | 181 | #define S3C2440_UFSTAT_RXMASK (63) |
| 157 | 182 | ||
| 183 | #define S3C2410_UTRSTAT_TIMEOUT (1<<3) | ||
| 158 | #define S3C2410_UTRSTAT_TXE (1<<2) | 184 | #define S3C2410_UTRSTAT_TXE (1<<2) |
| 159 | #define S3C2410_UTRSTAT_TXFE (1<<1) | 185 | #define S3C2410_UTRSTAT_TXFE (1<<1) |
| 160 | #define S3C2410_UTRSTAT_RXDR (1<<0) | 186 | #define S3C2410_UTRSTAT_RXDR (1<<0) |
| @@ -179,8 +205,10 @@ | |||
| 179 | #define S3C64XX_UINTM 0x38 | 205 | #define S3C64XX_UINTM 0x38 |
| 180 | 206 | ||
| 181 | #define S3C64XX_UINTM_RXD (0) | 207 | #define S3C64XX_UINTM_RXD (0) |
| 208 | #define S3C64XX_UINTM_ERROR (1) | ||
| 182 | #define S3C64XX_UINTM_TXD (2) | 209 | #define S3C64XX_UINTM_TXD (2) |
| 183 | #define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) | 210 | #define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) |
| 211 | #define S3C64XX_UINTM_ERR_MSK (1 << S3C64XX_UINTM_ERROR) | ||
| 184 | #define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) | 212 | #define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) |
| 185 | 213 | ||
| 186 | /* Following are specific to S5PV210 */ | 214 | /* Following are specific to S5PV210 */ |
