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-rw-r--r--include/linux/platform_data/ad7303.h21
-rw-r--r--include/linux/platform_data/clk-ux500.h6
-rw-r--r--include/linux/platform_data/cyttsp4.h76
-rw-r--r--include/linux/platform_data/dma-ste-dma40.h41
-rw-r--r--include/linux/platform_data/edma.h183
-rw-r--r--include/linux/platform_data/g762.h37
-rw-r--r--include/linux/platform_data/gpio-rcar.h5
-rw-r--r--include/linux/platform_data/keypad-pxa27x.h3
-rw-r--r--include/linux/platform_data/mailbox-omap.h58
-rw-r--r--include/linux/platform_data/omap_ocp2scp.h31
-rw-r--r--include/linux/platform_data/pinctrl-coh901.h22
-rw-r--r--include/linux/platform_data/si5351.h18
-rw-r--r--include/linux/platform_data/spi-davinci.h2
-rw-r--r--include/linux/platform_data/ssm2518.h22
-rw-r--r--include/linux/platform_data/usb-musb-ux500.h5
-rw-r--r--include/linux/platform_data/usb-rcar-phy.h28
-rw-r--r--include/linux/platform_data/usb3503.h5
17 files changed, 466 insertions, 97 deletions
diff --git a/include/linux/platform_data/ad7303.h b/include/linux/platform_data/ad7303.h
new file mode 100644
index 000000000000..de6a7a6b4bbf
--- /dev/null
+++ b/include/linux/platform_data/ad7303.h
@@ -0,0 +1,21 @@
1/*
2 * Analog Devices AD7303 DAC driver
3 *
4 * Copyright 2013 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#ifndef __IIO_ADC_AD7303_H__
10#define __IIO_ADC_AD7303_H__
11
12/**
13 * struct ad7303_platform_data - AD7303 platform data
14 * @use_external_ref: If set to true use an external voltage reference connected
15 * to the REF pin, otherwise use the internal reference derived from Vdd.
16 */
17struct ad7303_platform_data {
18 bool use_external_ref;
19};
20
21#endif
diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h
index 320d9c39ea0a..9d98f3aaa16c 100644
--- a/include/linux/platform_data/clk-ux500.h
+++ b/include/linux/platform_data/clk-ux500.h
@@ -12,7 +12,9 @@
12 12
13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base); 14 u32 clkrst5_base, u32 clkrst6_base);
15void u9540_clk_init(void); 15void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
16void u8540_clk_init(void); 16 u32 clkrst5_base, u32 clkrst6_base);
17void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
18 u32 clkrst5_base, u32 clkrst6_base);
17 19
18#endif /* __CLK_UX500_H */ 20#endif /* __CLK_UX500_H */
diff --git a/include/linux/platform_data/cyttsp4.h b/include/linux/platform_data/cyttsp4.h
new file mode 100644
index 000000000000..6eba54aff1dc
--- /dev/null
+++ b/include/linux/platform_data/cyttsp4.h
@@ -0,0 +1,76 @@
1/*
2 * Header file for:
3 * Cypress TrueTouch(TM) Standard Product (TTSP) touchscreen drivers.
4 * For use with Cypress Txx3xx parts.
5 * Supported parts include:
6 * CY8CTST341
7 * CY8CTMA340
8 *
9 * Copyright (C) 2009, 2010, 2011 Cypress Semiconductor, Inc.
10 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2, and only version 2, as published by the
15 * Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
25 *
26 * Contact Cypress Semiconductor at www.cypress.com (kev@cypress.com)
27 *
28 */
29#ifndef _CYTTSP4_H_
30#define _CYTTSP4_H_
31
32#define CYTTSP4_MT_NAME "cyttsp4_mt"
33#define CYTTSP4_I2C_NAME "cyttsp4_i2c_adapter"
34#define CYTTSP4_SPI_NAME "cyttsp4_spi_adapter"
35
36#define CY_TOUCH_SETTINGS_MAX 32
37
38struct touch_framework {
39 const uint16_t *abs;
40 uint8_t size;
41 uint8_t enable_vkeys;
42} __packed;
43
44struct cyttsp4_mt_platform_data {
45 struct touch_framework *frmwrk;
46 unsigned short flags;
47 char const *inp_dev_name;
48};
49
50struct touch_settings {
51 const uint8_t *data;
52 uint32_t size;
53 uint8_t tag;
54} __packed;
55
56struct cyttsp4_core_platform_data {
57 int irq_gpio;
58 int rst_gpio;
59 int level_irq_udelay;
60 int (*xres)(struct cyttsp4_core_platform_data *pdata,
61 struct device *dev);
62 int (*init)(struct cyttsp4_core_platform_data *pdata,
63 int on, struct device *dev);
64 int (*power)(struct cyttsp4_core_platform_data *pdata,
65 int on, struct device *dev, atomic_t *ignore_irq);
66 int (*irq_stat)(struct cyttsp4_core_platform_data *pdata,
67 struct device *dev);
68 struct touch_settings *sett[CY_TOUCH_SETTINGS_MAX];
69};
70
71struct cyttsp4_platform_data {
72 struct cyttsp4_core_platform_data *core_pdata;
73 struct cyttsp4_mt_platform_data *mt_pdata;
74};
75
76#endif /* _CYTTSP4_H_ */
diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h
index 4b781014b0a0..1bb9b1852256 100644
--- a/include/linux/platform_data/dma-ste-dma40.h
+++ b/include/linux/platform_data/dma-ste-dma40.h
@@ -70,23 +70,8 @@ enum stedma40_flow_ctrl {
70 STEDMA40_FLOW_CTRL, 70 STEDMA40_FLOW_CTRL,
71}; 71};
72 72
73enum stedma40_periph_data_width {
74 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
75 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
76 STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
77 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
78};
79
80enum stedma40_xfer_dir {
81 STEDMA40_MEM_TO_MEM = 1,
82 STEDMA40_MEM_TO_PERIPH,
83 STEDMA40_PERIPH_TO_MEM,
84 STEDMA40_PERIPH_TO_PERIPH
85};
86
87
88/** 73/**
89 * struct stedma40_chan_cfg - dst/src channel configuration 74 * struct stedma40_half_channel_info - dst/src channel configuration
90 * 75 *
91 * @big_endian: true if the src/dst should be read as big endian 76 * @big_endian: true if the src/dst should be read as big endian
92 * @data_width: Data width of the src/dst hardware 77 * @data_width: Data width of the src/dst hardware
@@ -95,7 +80,7 @@ enum stedma40_xfer_dir {
95 */ 80 */
96struct stedma40_half_channel_info { 81struct stedma40_half_channel_info {
97 bool big_endian; 82 bool big_endian;
98 enum stedma40_periph_data_width data_width; 83 enum dma_slave_buswidth data_width;
99 int psize; 84 int psize;
100 enum stedma40_flow_ctrl flow_ctrl; 85 enum stedma40_flow_ctrl flow_ctrl;
101}; 86};
@@ -109,8 +94,7 @@ struct stedma40_half_channel_info {
109 * version 3+, i.e DB8500v2+ 94 * version 3+, i.e DB8500v2+
110 * @mode: channel mode: physical, logical, or operation 95 * @mode: channel mode: physical, logical, or operation
111 * @mode_opt: options for the chosen channel mode 96 * @mode_opt: options for the chosen channel mode
112 * @src_dev_type: Src device type 97 * @dev_type: src/dst device type (driver uses dir to figure out which)
113 * @dst_dev_type: Dst device type
114 * @src_info: Parameters for dst half channel 98 * @src_info: Parameters for dst half channel
115 * @dst_info: Parameters for dst half channel 99 * @dst_info: Parameters for dst half channel
116 * @use_fixed_channel: if true, use physical channel specified by phy_channel 100 * @use_fixed_channel: if true, use physical channel specified by phy_channel
@@ -121,13 +105,12 @@ struct stedma40_half_channel_info {
121 * 105 *
122 */ 106 */
123struct stedma40_chan_cfg { 107struct stedma40_chan_cfg {
124 enum stedma40_xfer_dir dir; 108 enum dma_transfer_direction dir;
125 bool high_priority; 109 bool high_priority;
126 bool realtime; 110 bool realtime;
127 enum stedma40_mode mode; 111 enum stedma40_mode mode;
128 enum stedma40_mode_opt mode_opt; 112 enum stedma40_mode_opt mode_opt;
129 int src_dev_type; 113 int dev_type;
130 int dst_dev_type;
131 struct stedma40_half_channel_info src_info; 114 struct stedma40_half_channel_info src_info;
132 struct stedma40_half_channel_info dst_info; 115 struct stedma40_half_channel_info dst_info;
133 116
@@ -138,13 +121,8 @@ struct stedma40_chan_cfg {
138/** 121/**
139 * struct stedma40_platform_data - Configuration struct for the dma device. 122 * struct stedma40_platform_data - Configuration struct for the dma device.
140 * 123 *
141 * @dev_len: length of dev_tx and dev_rx
142 * @dev_tx: mapping between destination event line and io address 124 * @dev_tx: mapping between destination event line and io address
143 * @dev_rx: mapping between source event line and io address 125 * @dev_rx: mapping between source event line and io address
144 * @memcpy: list of memcpy event lines
145 * @memcpy_len: length of memcpy
146 * @memcpy_conf_phy: default configuration of physical channel memcpy
147 * @memcpy_conf_log: default configuration of logical channel memcpy
148 * @disabled_channels: A vector, ending with -1, that marks physical channels 126 * @disabled_channels: A vector, ending with -1, that marks physical channels
149 * that are for different reasons not available for the driver. 127 * that are for different reasons not available for the driver.
150 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW 128 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
@@ -154,22 +132,17 @@ struct stedma40_chan_cfg {
154 * @num_of_soft_lli_chans: The number of channels that needs to be configured 132 * @num_of_soft_lli_chans: The number of channels that needs to be configured
155 * to use SoftLLI. 133 * to use SoftLLI.
156 * @use_esram_lcla: flag for mapping the lcla into esram region 134 * @use_esram_lcla: flag for mapping the lcla into esram region
135 * @num_of_memcpy_chans: The number of channels reserved for memcpy.
157 * @num_of_phy_chans: The number of physical channels implemented in HW. 136 * @num_of_phy_chans: The number of physical channels implemented in HW.
158 * 0 means reading the number of channels from DMA HW but this is only valid 137 * 0 means reading the number of channels from DMA HW but this is only valid
159 * for 'multiple of 4' channels, like 8. 138 * for 'multiple of 4' channels, like 8.
160 */ 139 */
161struct stedma40_platform_data { 140struct stedma40_platform_data {
162 u32 dev_len;
163 const dma_addr_t *dev_tx;
164 const dma_addr_t *dev_rx;
165 int *memcpy;
166 u32 memcpy_len;
167 struct stedma40_chan_cfg *memcpy_conf_phy;
168 struct stedma40_chan_cfg *memcpy_conf_log;
169 int disabled_channels[STEDMA40_MAX_PHYS]; 141 int disabled_channels[STEDMA40_MAX_PHYS];
170 int *soft_lli_chans; 142 int *soft_lli_chans;
171 int num_of_soft_lli_chans; 143 int num_of_soft_lli_chans;
172 bool use_esram_lcla; 144 bool use_esram_lcla;
145 int num_of_memcpy_chans;
173 int num_of_phy_chans; 146 int num_of_phy_chans;
174}; 147};
175 148
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
new file mode 100644
index 000000000000..57300fd7cc03
--- /dev/null
+++ b/include/linux/platform_data/edma.h
@@ -0,0 +1,183 @@
1/*
2 * TI EDMA definitions
3 *
4 * Copyright (C) 2006-2013 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/*
13 * This EDMA3 programming framework exposes two basic kinds of resource:
14 *
15 * Channel Triggers transfers, usually from a hardware event but
16 * also manually or by "chaining" from DMA completions.
17 * Each channel is coupled to a Parameter RAM (PaRAM) slot.
18 *
19 * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
20 * "set"), source and destination addresses, a link to a
21 * next PaRAM slot (if any), options for the transfer, and
22 * instructions for updating those addresses. There are
23 * more than twice as many slots as event channels.
24 *
25 * Each PaRAM set describes a sequence of transfers, either for one large
26 * buffer or for several discontiguous smaller buffers. An EDMA transfer
27 * is driven only from a channel, which performs the transfers specified
28 * in its PaRAM slot until there are no more transfers. When that last
29 * transfer completes, the "link" field may be used to reload the channel's
30 * PaRAM slot with a new transfer descriptor.
31 *
32 * The EDMA Channel Controller (CC) maps requests from channels into physical
33 * Transfer Controller (TC) requests when the channel triggers (by hardware
34 * or software events, or by chaining). The two physical DMA channels provided
35 * by the TCs are thus shared by many logical channels.
36 *
37 * DaVinci hardware also has a "QDMA" mechanism which is not currently
38 * supported through this interface. (DSP firmware uses it though.)
39 */
40
41#ifndef EDMA_H_
42#define EDMA_H_
43
44/* PaRAM slots are laid out like this */
45struct edmacc_param {
46 unsigned int opt;
47 unsigned int src;
48 unsigned int a_b_cnt;
49 unsigned int dst;
50 unsigned int src_dst_bidx;
51 unsigned int link_bcntrld;
52 unsigned int src_dst_cidx;
53 unsigned int ccnt;
54};
55
56/* fields in edmacc_param.opt */
57#define SAM BIT(0)
58#define DAM BIT(1)
59#define SYNCDIM BIT(2)
60#define STATIC BIT(3)
61#define EDMA_FWID (0x07 << 8)
62#define TCCMODE BIT(11)
63#define EDMA_TCC(t) ((t) << 12)
64#define TCINTEN BIT(20)
65#define ITCINTEN BIT(21)
66#define TCCHEN BIT(22)
67#define ITCCHEN BIT(23)
68
69/*ch_status paramater of callback function possible values*/
70#define DMA_COMPLETE 1
71#define DMA_CC_ERROR 2
72#define DMA_TC1_ERROR 3
73#define DMA_TC2_ERROR 4
74
75enum address_mode {
76 INCR = 0,
77 FIFO = 1
78};
79
80enum fifo_width {
81 W8BIT = 0,
82 W16BIT = 1,
83 W32BIT = 2,
84 W64BIT = 3,
85 W128BIT = 4,
86 W256BIT = 5
87};
88
89enum dma_event_q {
90 EVENTQ_0 = 0,
91 EVENTQ_1 = 1,
92 EVENTQ_2 = 2,
93 EVENTQ_3 = 3,
94 EVENTQ_DEFAULT = -1
95};
96
97enum sync_dimension {
98 ASYNC = 0,
99 ABSYNC = 1
100};
101
102#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
103#define EDMA_CTLR(i) ((i) >> 16)
104#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
105
106#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
107#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
108#define EDMA_CONT_PARAMS_ANY 1001
109#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
110#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
111
112#define EDMA_MAX_CC 2
113
114/* alloc/free DMA channels and their dedicated parameter RAM slots */
115int edma_alloc_channel(int channel,
116 void (*callback)(unsigned channel, u16 ch_status, void *data),
117 void *data, enum dma_event_q);
118void edma_free_channel(unsigned channel);
119
120/* alloc/free parameter RAM slots */
121int edma_alloc_slot(unsigned ctlr, int slot);
122void edma_free_slot(unsigned slot);
123
124/* alloc/free a set of contiguous parameter RAM slots */
125int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
126int edma_free_cont_slots(unsigned slot, int count);
127
128/* calls that operate on part of a parameter RAM slot */
129void edma_set_src(unsigned slot, dma_addr_t src_port,
130 enum address_mode mode, enum fifo_width);
131void edma_set_dest(unsigned slot, dma_addr_t dest_port,
132 enum address_mode mode, enum fifo_width);
133void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
134void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
135void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
136void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
137 u16 bcnt_rld, enum sync_dimension sync_mode);
138void edma_link(unsigned from, unsigned to);
139void edma_unlink(unsigned from);
140
141/* calls that operate on an entire parameter RAM slot */
142void edma_write_slot(unsigned slot, const struct edmacc_param *params);
143void edma_read_slot(unsigned slot, struct edmacc_param *params);
144
145/* channel control operations */
146int edma_start(unsigned channel);
147void edma_stop(unsigned channel);
148void edma_clean_channel(unsigned channel);
149void edma_clear_event(unsigned channel);
150void edma_pause(unsigned channel);
151void edma_resume(unsigned channel);
152
153struct edma_rsv_info {
154
155 const s16 (*rsv_chans)[2];
156 const s16 (*rsv_slots)[2];
157};
158
159/* platform_data for EDMA driver */
160struct edma_soc_info {
161
162 /* how many dma resources of each type */
163 unsigned n_channel;
164 unsigned n_region;
165 unsigned n_slot;
166 unsigned n_tc;
167 unsigned n_cc;
168 /*
169 * Default queue is expected to be a low-priority queue.
170 * This way, long transfers on the default queue started
171 * by the codec engine will not cause audio defects.
172 */
173 enum dma_event_q default_queue;
174
175 /* Resource reservation for other cores */
176 struct edma_rsv_info *rsv;
177
178 s8 (*queue_tc_mapping)[2];
179 s8 (*queue_priority_mapping)[2];
180 const s16 (*xbar_chans)[2];
181};
182
183#endif
diff --git a/include/linux/platform_data/g762.h b/include/linux/platform_data/g762.h
new file mode 100644
index 000000000000..d3c51283764d
--- /dev/null
+++ b/include/linux/platform_data/g762.h
@@ -0,0 +1,37 @@
1/*
2 * Platform data structure for g762 fan controller driver
3 *
4 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __LINUX_PLATFORM_DATA_G762_H__
21#define __LINUX_PLATFORM_DATA_G762_H__
22
23/*
24 * Following structure can be used to set g762 driver platform specific data
25 * during board init. Note that passing a sparse structure is possible but
26 * will result in non-specified attributes to be set to default value, hence
27 * overloading those installed during boot (e.g. by u-boot).
28 */
29
30struct g762_platform_data {
31 u32 fan_startv;
32 u32 fan_gear_mode;
33 u32 pwm_polarity;
34 u32 clk_freq;
35};
36
37#endif /* __LINUX_PLATFORM_DATA_G762_H__ */
diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h
index b253f77a7ddf..2d8d69432813 100644
--- a/include/linux/platform_data/gpio-rcar.h
+++ b/include/linux/platform_data/gpio-rcar.h
@@ -17,10 +17,13 @@
17#define __GPIO_RCAR_H__ 17#define __GPIO_RCAR_H__
18 18
19struct gpio_rcar_config { 19struct gpio_rcar_config {
20 unsigned int gpio_base; 20 int gpio_base;
21 unsigned int irq_base; 21 unsigned int irq_base;
22 unsigned int number_of_pins; 22 unsigned int number_of_pins;
23 const char *pctl_name; 23 const char *pctl_name;
24 unsigned has_both_edge_trigger:1;
24}; 25};
25 26
27#define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin))
28
26#endif /* __GPIO_RCAR_H__ */ 29#endif /* __GPIO_RCAR_H__ */
diff --git a/include/linux/platform_data/keypad-pxa27x.h b/include/linux/platform_data/keypad-pxa27x.h
index 5ce8d5e6ea51..24625569d16d 100644
--- a/include/linux/platform_data/keypad-pxa27x.h
+++ b/include/linux/platform_data/keypad-pxa27x.h
@@ -36,10 +36,9 @@
36struct pxa27x_keypad_platform_data { 36struct pxa27x_keypad_platform_data {
37 37
38 /* code map for the matrix keys */ 38 /* code map for the matrix keys */
39 const struct matrix_keymap_data *matrix_keymap_data;
39 unsigned int matrix_key_rows; 40 unsigned int matrix_key_rows;
40 unsigned int matrix_key_cols; 41 unsigned int matrix_key_cols;
41 unsigned int *matrix_key_map;
42 int matrix_key_map_size;
43 42
44 /* direct keys */ 43 /* direct keys */
45 int direct_key_num; 44 int direct_key_num;
diff --git a/include/linux/platform_data/mailbox-omap.h b/include/linux/platform_data/mailbox-omap.h
new file mode 100644
index 000000000000..4631dbb4255e
--- /dev/null
+++ b/include/linux/platform_data/mailbox-omap.h
@@ -0,0 +1,58 @@
1/*
2 * mailbox-omap.h
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _PLAT_MAILBOX_H
17#define _PLAT_MAILBOX_H
18
19/* Interrupt register configuration types */
20#define MBOX_INTR_CFG_TYPE1 (0)
21#define MBOX_INTR_CFG_TYPE2 (1)
22
23/**
24 * struct omap_mbox_dev_info - OMAP mailbox device attribute info
25 * @name: name of the mailbox device
26 * @tx_id: mailbox queue id used for transmitting messages
27 * @rx_id: mailbox queue id on which messages are received
28 * @irq_id: irq identifier number to use from the hwmod data
29 * @usr_id: mailbox user id for identifying the interrupt into
30 * the MPU interrupt controller.
31 */
32struct omap_mbox_dev_info {
33 const char *name;
34 u32 tx_id;
35 u32 rx_id;
36 u32 irq_id;
37 u32 usr_id;
38};
39
40/**
41 * struct omap_mbox_pdata - OMAP mailbox platform data
42 * @intr_type: type of interrupt configuration registers used
43 while programming mailbox queue interrupts
44 * @num_users: number of users (processor devices) that the mailbox
45 * h/w block can interrupt
46 * @num_fifos: number of h/w fifos within the mailbox h/w block
47 * @info_cnt: number of mailbox devices for the platform
48 * @info: array of mailbox device attributes
49 */
50struct omap_mbox_pdata {
51 u32 intr_type;
52 u32 num_users;
53 u32 num_fifos;
54 u32 info_cnt;
55 struct omap_mbox_dev_info *info;
56};
57
58#endif /* _PLAT_MAILBOX_H */
diff --git a/include/linux/platform_data/omap_ocp2scp.h b/include/linux/platform_data/omap_ocp2scp.h
deleted file mode 100644
index 5c6c3939355f..000000000000
--- a/include/linux/platform_data/omap_ocp2scp.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * omap_ocp2scp.h -- ocp2scp header file
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * Author: Kishon Vijay Abraham I <kishon@ti.com>
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __DRIVERS_OMAP_OCP2SCP_H
20#define __DRIVERS_OMAP_OCP2SCP_H
21
22struct omap_ocp2scp_dev {
23 const char *drv_name;
24 struct resource *res;
25};
26
27struct omap_ocp2scp_platform_data {
28 int dev_cnt;
29 struct omap_ocp2scp_dev **devices;
30};
31#endif /* __DRIVERS_OMAP_OCP2SCP_H */
diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h
deleted file mode 100644
index dfbc65d10484..000000000000
--- a/include/linux/platform_data/pinctrl-coh901.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2007-2012 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * GPIO block resgister definitions and inline macros for
5 * U300 GPIO COH 901 335 or COH 901 571/3
6 * Author: Linus Walleij <linus.walleij@stericsson.com>
7 */
8
9#ifndef __MACH_U300_GPIO_U300_H
10#define __MACH_U300_GPIO_U300_H
11
12/**
13 * struct u300_gpio_platform - U300 GPIO platform data
14 * @ports: number of GPIO block ports
15 * @gpio_base: first GPIO number for this block (use a free range)
16 */
17struct u300_gpio_platform {
18 u8 ports;
19 int gpio_base;
20};
21
22#endif /* __MACH_U300_GPIO_U300_H */
diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h
index 92dabcaf6499..54334393ab92 100644
--- a/include/linux/platform_data/si5351.h
+++ b/include/linux/platform_data/si5351.h
@@ -79,6 +79,23 @@ enum si5351_drive_strength {
79}; 79};
80 80
81/** 81/**
82 * enum si5351_disable_state - Si5351 clock output disable state
83 * @SI5351_DISABLE_DEFAULT: default, do not change eeprom config
84 * @SI5351_DISABLE_LOW: CLKx is set to a LOW state when disabled
85 * @SI5351_DISABLE_HIGH: CLKx is set to a HIGH state when disabled
86 * @SI5351_DISABLE_FLOATING: CLKx is set to a FLOATING state when
87 * disabled
88 * @SI5351_DISABLE_NEVER: CLKx is NEVER disabled
89 */
90enum si5351_disable_state {
91 SI5351_DISABLE_DEFAULT = 0,
92 SI5351_DISABLE_LOW,
93 SI5351_DISABLE_HIGH,
94 SI5351_DISABLE_FLOATING,
95 SI5351_DISABLE_NEVER,
96};
97
98/**
82 * struct si5351_clkout_config - Si5351 clock output configuration 99 * struct si5351_clkout_config - Si5351 clock output configuration
83 * @clkout: clkout number 100 * @clkout: clkout number
84 * @multisynth_src: multisynth source clock 101 * @multisynth_src: multisynth source clock
@@ -91,6 +108,7 @@ struct si5351_clkout_config {
91 enum si5351_multisynth_src multisynth_src; 108 enum si5351_multisynth_src multisynth_src;
92 enum si5351_clkout_src clkout_src; 109 enum si5351_clkout_src clkout_src;
93 enum si5351_drive_strength drive; 110 enum si5351_drive_strength drive;
111 enum si5351_disable_state disable_state;
94 bool pll_master; 112 bool pll_master;
95 unsigned long rate; 113 unsigned long rate;
96}; 114};
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b37868..8dc2fa47a2aa 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
19#ifndef __ARCH_ARM_DAVINCI_SPI_H 19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H 20#define __ARCH_ARM_DAVINCI_SPI_H
21 21
22#include <mach/edma.h> 22#include <linux/platform_data/edma.h>
23 23
24#define SPI_INTERN_CS 0xFF 24#define SPI_INTERN_CS 0xFF
25 25
diff --git a/include/linux/platform_data/ssm2518.h b/include/linux/platform_data/ssm2518.h
new file mode 100644
index 000000000000..9a8e3ea287e3
--- /dev/null
+++ b/include/linux/platform_data/ssm2518.h
@@ -0,0 +1,22 @@
1/*
2 * SSM2518 amplifier audio driver
3 *
4 * Copyright 2013 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2.
8 */
9
10#ifndef __LINUX_PLATFORM_DATA_SSM2518_H__
11#define __LINUX_PLATFORM_DATA_SSM2518_H__
12
13/**
14 * struct ssm2518_platform_data - Platform data for the ssm2518 driver
15 * @enable_gpio: GPIO connected to the nSD pin. Set to -1 if the nSD pin is
16 * hardwired.
17 */
18struct ssm2518_platform_data {
19 int enable_gpio;
20};
21
22#endif
diff --git a/include/linux/platform_data/usb-musb-ux500.h b/include/linux/platform_data/usb-musb-ux500.h
index 4c1cc50a595a..dd9c83ac7de0 100644
--- a/include/linux/platform_data/usb-musb-ux500.h
+++ b/include/linux/platform_data/usb-musb-ux500.h
@@ -9,14 +9,11 @@
9 9
10#include <linux/dmaengine.h> 10#include <linux/dmaengine.h>
11 11
12#define UX500_MUSB_DMA_NUM_RX_CHANNELS 8 12#define UX500_MUSB_DMA_NUM_RX_TX_CHANNELS 8
13#define UX500_MUSB_DMA_NUM_TX_CHANNELS 8
14 13
15struct ux500_musb_board_data { 14struct ux500_musb_board_data {
16 void **dma_rx_param_array; 15 void **dma_rx_param_array;
17 void **dma_tx_param_array; 16 void **dma_tx_param_array;
18 u32 num_rx_channels;
19 u32 num_tx_channels;
20 bool (*dma_filter)(struct dma_chan *chan, void *filter_param); 17 bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
21}; 18};
22 19
diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h
new file mode 100644
index 000000000000..8ec6964a32a5
--- /dev/null
+++ b/include/linux/platform_data/usb-rcar-phy.h
@@ -0,0 +1,28 @@
1/*
2 * Copyright (C) 2013 Renesas Solutions Corp.
3 * Copyright (C) 2013 Cogent Embedded, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#ifndef __USB_RCAR_PHY_H
11#define __USB_RCAR_PHY_H
12
13#include <linux/types.h>
14
15struct rcar_phy_platform_data {
16 bool ferrite_bead:1; /* (R8A7778 only) */
17
18 bool port1_func:1; /* true: port 1 used by function, false: host */
19 unsigned penc1:1; /* Output of the PENC1 pin in function mode */
20 struct { /* Overcurrent pin control for ports 0..2 */
21 bool select_3_3v:1; /* true: USB_OVCn pin, false: OVCn pin */
22 /* Set to false on port 1 in function mode */
23 bool active_high:1; /* true: active high, false: active low */
24 /* Set to true on port 1 in function mode */
25 } ovc_pin[3]; /* (R8A7778 only has 2 ports) */
26};
27
28#endif /* __USB_RCAR_PHY_H */
diff --git a/include/linux/platform_data/usb3503.h b/include/linux/platform_data/usb3503.h
index 85dcc709f7e9..1d1b6ef871f6 100644
--- a/include/linux/platform_data/usb3503.h
+++ b/include/linux/platform_data/usb3503.h
@@ -3,6 +3,10 @@
3 3
4#define USB3503_I2C_NAME "usb3503" 4#define USB3503_I2C_NAME "usb3503"
5 5
6#define USB3503_OFF_PORT1 (1 << 1)
7#define USB3503_OFF_PORT2 (1 << 2)
8#define USB3503_OFF_PORT3 (1 << 3)
9
6enum usb3503_mode { 10enum usb3503_mode {
7 USB3503_MODE_UNKNOWN, 11 USB3503_MODE_UNKNOWN,
8 USB3503_MODE_HUB, 12 USB3503_MODE_HUB,
@@ -11,6 +15,7 @@ enum usb3503_mode {
11 15
12struct usb3503_platform_data { 16struct usb3503_platform_data {
13 enum usb3503_mode initial_mode; 17 enum usb3503_mode initial_mode;
18 u8 port_off_mask;
14 int gpio_intn; 19 int gpio_intn;
15 int gpio_connect; 20 int gpio_connect;
16 int gpio_reset; 21 int gpio_reset;
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-27 14:21:15 -0400