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-rw-r--r--include/linux/perf_counter.h73
1 files changed, 60 insertions, 13 deletions
diff --git a/include/linux/perf_counter.h b/include/linux/perf_counter.h
index bd15d7a5f5ce..b53f7006cc4e 100644
--- a/include/linux/perf_counter.h
+++ b/include/linux/perf_counter.h
@@ -115,27 +115,44 @@ enum perf_counter_sample_format {
115 PERF_SAMPLE_TID = 1U << 1, 115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2, 116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3, 117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_GROUP = 1U << 4, 118 PERF_SAMPLE_READ = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5, 119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6, 120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7, 121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8, 122 PERF_SAMPLE_PERIOD = 1U << 8,
123 PERF_SAMPLE_STREAM_ID = 1U << 9, 123 PERF_SAMPLE_STREAM_ID = 1U << 9,
124 PERF_SAMPLE_RAW = 1U << 10,
124 125
125 PERF_SAMPLE_MAX = 1U << 10, /* non-ABI */ 126 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
126}; 127};
127 128
128/* 129/*
129 * Bits that can be set in attr.read_format to request that 130 * The format of the data returned by read() on a perf counter fd,
130 * reads on the counter should return the indicated quantities, 131 * as specified by attr.read_format:
131 * in increasing order of bit value, after the counter value. 132 *
133 * struct read_format {
134 * { u64 value;
135 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
136 * { u64 time_running; } && PERF_FORMAT_RUNNING
137 * { u64 id; } && PERF_FORMAT_ID
138 * } && !PERF_FORMAT_GROUP
139 *
140 * { u64 nr;
141 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
142 * { u64 time_running; } && PERF_FORMAT_RUNNING
143 * { u64 value;
144 * { u64 id; } && PERF_FORMAT_ID
145 * } cntr[nr];
146 * } && PERF_FORMAT_GROUP
147 * };
132 */ 148 */
133enum perf_counter_read_format { 149enum perf_counter_read_format {
134 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 150 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
135 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 151 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
136 PERF_FORMAT_ID = 1U << 2, 152 PERF_FORMAT_ID = 1U << 2,
153 PERF_FORMAT_GROUP = 1U << 3,
137 154
138 PERF_FORMAT_MAX = 1U << 3, /* non-ABI */ 155 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
139}; 156};
140 157
141#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 158#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
@@ -181,8 +198,9 @@ struct perf_counter_attr {
181 freq : 1, /* use freq, not period */ 198 freq : 1, /* use freq, not period */
182 inherit_stat : 1, /* per task counts */ 199 inherit_stat : 1, /* per task counts */
183 enable_on_exec : 1, /* next exec enables */ 200 enable_on_exec : 1, /* next exec enables */
201 task : 1, /* trace fork/exit */
184 202
185 __reserved_1 : 51; 203 __reserved_1 : 50;
186 204
187 __u32 wakeup_events; /* wakeup every n events */ 205 __u32 wakeup_events; /* wakeup every n events */
188 __u32 __reserved_2; 206 __u32 __reserved_2;
@@ -311,6 +329,15 @@ enum perf_event_type {
311 /* 329 /*
312 * struct { 330 * struct {
313 * struct perf_event_header header; 331 * struct perf_event_header header;
332 * u32 pid, ppid;
333 * u32 tid, ptid;
334 * };
335 */
336 PERF_EVENT_EXIT = 4,
337
338 /*
339 * struct {
340 * struct perf_event_header header;
314 * u64 time; 341 * u64 time;
315 * u64 id; 342 * u64 id;
316 * u64 stream_id; 343 * u64 stream_id;
@@ -323,6 +350,7 @@ enum perf_event_type {
323 * struct { 350 * struct {
324 * struct perf_event_header header; 351 * struct perf_event_header header;
325 * u32 pid, ppid; 352 * u32 pid, ppid;
353 * u32 tid, ptid;
326 * }; 354 * };
327 */ 355 */
328 PERF_EVENT_FORK = 7, 356 PERF_EVENT_FORK = 7,
@@ -331,10 +359,8 @@ enum perf_event_type {
331 * struct { 359 * struct {
332 * struct perf_event_header header; 360 * struct perf_event_header header;
333 * u32 pid, tid; 361 * u32 pid, tid;
334 * u64 value; 362 *
335 * { u64 time_enabled; } && PERF_FORMAT_ENABLED 363 * struct read_format values;
336 * { u64 time_running; } && PERF_FORMAT_RUNNING
337 * { u64 parent_id; } && PERF_FORMAT_ID
338 * }; 364 * };
339 */ 365 */
340 PERF_EVENT_READ = 8, 366 PERF_EVENT_READ = 8,
@@ -352,11 +378,24 @@ enum perf_event_type {
352 * { u32 cpu, res; } && PERF_SAMPLE_CPU 378 * { u32 cpu, res; } && PERF_SAMPLE_CPU
353 * { u64 period; } && PERF_SAMPLE_PERIOD 379 * { u64 period; } && PERF_SAMPLE_PERIOD
354 * 380 *
355 * { u64 nr; 381 * { struct read_format values; } && PERF_SAMPLE_READ
356 * { u64 id, val; } cnt[nr]; } && PERF_SAMPLE_GROUP
357 * 382 *
358 * { u64 nr, 383 * { u64 nr,
359 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 384 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
385 *
386 * #
387 * # The RAW record below is opaque data wrt the ABI
388 * #
389 * # That is, the ABI doesn't make any promises wrt to
390 * # the stability of its content, it may vary depending
391 * # on event, hardware, kernel version and phase of
392 * # the moon.
393 * #
394 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
395 * #
396 *
397 * { u32 size;
398 * char data[size];}&& PERF_SAMPLE_RAW
360 * }; 399 * };
361 */ 400 */
362 PERF_EVENT_SAMPLE = 9, 401 PERF_EVENT_SAMPLE = 9,
@@ -402,6 +441,11 @@ struct perf_callchain_entry {
402 __u64 ip[PERF_MAX_STACK_DEPTH]; 441 __u64 ip[PERF_MAX_STACK_DEPTH];
403}; 442};
404 443
444struct perf_raw_record {
445 u32 size;
446 void *data;
447};
448
405struct task_struct; 449struct task_struct;
406 450
407/** 451/**
@@ -670,10 +714,13 @@ struct perf_sample_data {
670 struct pt_regs *regs; 714 struct pt_regs *regs;
671 u64 addr; 715 u64 addr;
672 u64 period; 716 u64 period;
717 struct perf_raw_record *raw;
673}; 718};
674 719
675extern int perf_counter_overflow(struct perf_counter *counter, int nmi, 720extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
676 struct perf_sample_data *data); 721 struct perf_sample_data *data);
722extern void perf_counter_output(struct perf_counter *counter, int nmi,
723 struct perf_sample_data *data);
677 724
678/* 725/*
679 * Return 1 for a software counter, 0 for a hardware counter 726 * Return 1 for a software counter, 0 for a hardware counter