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-rw-r--r--include/linux/pci_regs.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index aa420261843d..e8840964aca1 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -508,6 +508,7 @@
508#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */ 508#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
509#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ 509#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
510#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ 510#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
511#define PCI_EXP_DEVCAP2_LTR 0x800 /* Latency tolerance reporting */
511#define PCI_EXP_OBFF_MASK 0xc0000 /* OBFF support mechanism */ 512#define PCI_EXP_OBFF_MASK 0xc0000 /* OBFF support mechanism */
512#define PCI_EXP_OBFF_MSG 0x40000 /* New message signaling */ 513#define PCI_EXP_OBFF_MSG 0x40000 /* New message signaling */
513#define PCI_EXP_OBFF_WAKE 0x80000 /* Re-use WAKE# for OBFF */ 514#define PCI_EXP_OBFF_WAKE 0x80000 /* Re-use WAKE# for OBFF */
@@ -515,6 +516,7 @@
515#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ 516#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
516#define PCI_EXP_IDO_REQ_EN 0x100 /* ID-based ordering request enable */ 517#define PCI_EXP_IDO_REQ_EN 0x100 /* ID-based ordering request enable */
517#define PCI_EXP_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */ 518#define PCI_EXP_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */
519#define PCI_EXP_LTR_EN 0x400 /* Latency tolerance reporting */
518#define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */ 520#define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */
519#define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */ 521#define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */
520#define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ 522#define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */
@@ -535,6 +537,7 @@
535#define PCI_EXT_CAP_ID_ARI 14 537#define PCI_EXT_CAP_ID_ARI 14
536#define PCI_EXT_CAP_ID_ATS 15 538#define PCI_EXT_CAP_ID_ATS 15
537#define PCI_EXT_CAP_ID_SRIOV 16 539#define PCI_EXT_CAP_ID_SRIOV 16
540#define PCI_EXT_CAP_ID_LTR 24
538 541
539/* Advanced Error Reporting */ 542/* Advanced Error Reporting */
540#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ 543#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
@@ -691,6 +694,12 @@
691#define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */ 694#define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */
692#define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */ 695#define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */
693 696
697#define PCI_LTR_MAX_SNOOP_LAT 0x4
698#define PCI_LTR_MAX_NOSNOOP_LAT 0x6
699#define PCI_LTR_VALUE_MASK 0x000003ff
700#define PCI_LTR_SCALE_MASK 0x00001c00
701#define PCI_LTR_SCALE_SHIFT 10
702
694/* Access Control Service */ 703/* Access Control Service */
695#define PCI_ACS_CAP 0x04 /* ACS Capability Register */ 704#define PCI_ACS_CAP 0x04 /* ACS Capability Register */
696#define PCI_ACS_SV 0x01 /* Source Validation */ 705#define PCI_ACS_SV 0x01 /* Source Validation */