17 files changed, 602 insertions, 127 deletions

diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
new file mode 100644
index 000000000000..7a7fbe87fef0
--- /dev/null
+++ b/include/linux/mtd/bbm.h
@@ -0,0 +1,122 @@
+/*
+ *  linux/include/linux/mtd/bbm.h
+ *
+ *  NAND family Bad Block Management (BBM) header file
+ *    - Bad Block Table (BBT) implementation
+ *
+ *  Copyright (c) 2005 Samsung Electronics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ *  Copyright (c) 2000-2005
+ *  Thomas Gleixner <tglx@linuxtronix.de>
+ *
+ */
+#ifndef __LINUX_MTD_BBM_H
+#define __LINUX_MTD_BBM_H
+
+/* The maximum number of NAND chips in an array */
+#define NAND_MAX_CHIPS          8
+
+/**
+ * struct nand_bbt_descr - bad block table descriptor
+ * @param options       options for this descriptor
+ * @param pages         the page(s) where we find the bbt, used with
+ *                      option BBT_ABSPAGE when bbt is searched,
+ *                      then we store the found bbts pages here.
+ *                      Its an array and supports up to 8 chips now
+ * @param offs          offset of the pattern in the oob area of the page
+ * @param veroffs       offset of the bbt version counter in the oob are of the page
+ * @param version       version read from the bbt page during scan
+ * @param len           length of the pattern, if 0 no pattern check is performed
+ * @param maxblocks     maximum number of blocks to search for a bbt. This number of
+ *                      blocks is reserved at the end of the device
+ *                      where the tables are written.
+ * @param reserved_block_code   if non-0, this pattern denotes a reserved
+ *                      (rather than bad) block in the stored bbt
+ * @param pattern       pattern to identify bad block table or factory marked
+ *                      good / bad blocks, can be NULL, if len = 0
+ *
+ * Descriptor for the bad block table marker and the descriptor for the
+ * pattern which identifies good and bad blocks. The assumption is made
+ * that the pattern and the version count are always located in the oob area
+ * of the first block.
+ */
+struct nand_bbt_descr {
+        int options;
+        int pages[NAND_MAX_CHIPS];
+        int offs;
+        int veroffs;
+        uint8_t version[NAND_MAX_CHIPS];
+        int len;
+        int maxblocks;
+        int reserved_block_code;
+        uint8_t *pattern;
+};
+
+/* Options for the bad block table descriptors */
+
+/* The number of bits used per block in the bbt on the device */
+#define NAND_BBT_NRBITS_MSK     0x0000000F
+#define NAND_BBT_1BIT           0x00000001
+#define NAND_BBT_2BIT           0x00000002
+#define NAND_BBT_4BIT           0x00000004
+#define NAND_BBT_8BIT           0x00000008
+/* The bad block table is in the last good block of the device */
+#define NAND_BBT_LASTBLOCK      0x00000010
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_ABSPAGE        0x00000020
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_SEARCH         0x00000040
+/* bbt is stored per chip on multichip devices */
+#define NAND_BBT_PERCHIP        0x00000080
+/* bbt has a version counter at offset veroffs */
+#define NAND_BBT_VERSION        0x00000100
+/* Create a bbt if none axists */
+#define NAND_BBT_CREATE         0x00000200
+/* Search good / bad pattern through all pages of a block */
+#define NAND_BBT_SCANALLPAGES   0x00000400
+/* Scan block empty during good / bad block scan */
+#define NAND_BBT_SCANEMPTY      0x00000800
+/* Write bbt if neccecary */
+#define NAND_BBT_WRITE          0x00001000
+/* Read and write back block contents when writing bbt */
+#define NAND_BBT_SAVECONTENT    0x00002000
+/* Search good / bad pattern on the first and the second page */
+#define NAND_BBT_SCAN2NDPAGE    0x00004000
+
+/* The maximum number of blocks to scan for a bbt */
+#define NAND_BBT_SCAN_MAXBLOCKS 4
+
+/*
+ * Constants for oob configuration
+ */
+#define ONENAND_BADBLOCK_POS    0
+
+/**
+ * struct bbt_info - [GENERIC] Bad Block Table data structure
+ * @param bbt_erase_shift       [INTERN] number of address bits in a bbt entry
+ * @param badblockpos           [INTERN] position of the bad block marker in the oob area
+ * @param bbt                   [INTERN] bad block table pointer
+ * @param badblock_pattern      [REPLACEABLE] bad block scan pattern used for initial bad block scan
+ * @param priv                  [OPTIONAL] pointer to private bbm date
+ */
+struct bbm_info {
+        int bbt_erase_shift;
+        int badblockpos;
+        int options;
+
+        uint8_t *bbt;
+
+        int (*isbad_bbt)(struct mtd_info *mtd, loff_t ofs, int allowbbt);
+
+        /* TODO Add more NAND specific fileds */
+        struct nand_bbt_descr *badblock_pattern;
+
+        void *priv;
+};
+
+/* OneNAND BBT interface */
+extern int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
+extern int onenand_default_bbt(struct mtd_info *mtd);
+
+#endif  /* __LINUX_MTD_BBM_H */
diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h
index 4ebc2e5a16e2..f46afec6fbf8 100644
--- a/include/linux/mtd/blktrans.h
+++ b/include/linux/mtd/blktrans.h
@@ -1,5 +1,5 @@
 /*
- * $Id: blktrans.h,v 1.5 2003/06/23 12:00:08 dwmw2 Exp $
+ * $Id: blktrans.h,v 1.6 2005/11/07 11:14:54 gleixner Exp $
  *
  * (C) 2003 David Woodhouse <dwmw2@infradead.org>
  *
@@ -67,6 +67,6 @@ extern int register_mtd_blktrans(struct mtd_blktrans_ops *tr);
 extern int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr);
 extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
 extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
-                                 
+
 
 #endif /* __MTD_TRANS_H__ */
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index e6b6a1c66bd5..3c9ea4b7adda 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -1,14 +1,13 @@
 
-/* Common Flash Interface structures 
+/* Common Flash Interface structures
  * See http://support.intel.com/design/flash/technote/index.htm
- * $Id: cfi.h,v 1.54 2005/06/06 23:04:36 tpoynor Exp $
+ * $Id: cfi.h,v 1.56 2005/11/07 11:14:54 gleixner Exp $
  */
 
 #ifndef __MTD_CFI_H__
 #define __MTD_CFI_H__
 
 #include <linux/config.h>
-#include <linux/version.h>
 #include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -82,8 +81,8 @@ static inline int cfi_interleave_supported(int i)
 }
 
 
-/* NB: these values must represents the number of bytes needed to meet the 
- *     device type (x8, x16, x32).  Eg. a 32 bit device is 4 x 8 bytes. 
+/* NB: these values must represents the number of bytes needed to meet the
+ *     device type (x8, x16, x32).  Eg. a 32 bit device is 4 x 8 bytes.
  *     These numbers are used in calculations.
  */
 #define CFI_DEVICETYPE_X8  (8 / 8)
@@ -173,6 +172,15 @@ struct cfi_intelext_regioninfo {
         struct cfi_intelext_blockinfo BlockTypes[1];
 } __attribute__((packed));
 
+struct cfi_intelext_programming_regioninfo {
+        uint8_t  ProgRegShift;
+        uint8_t  Reserved1;
+        uint8_t  ControlValid;
+        uint8_t  Reserved2;
+        uint8_t  ControlInvalid;
+        uint8_t  Reserved3;
+} __attribute__((packed));
+
 /* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */
 
 struct cfi_pri_amdstd {
@@ -250,7 +258,7 @@ static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, int interleave, int
 /*
  * Transforms the CFI command for the given geometry (bus width & interleave).
  * It looks too long to be inline, but in the common case it should almost all
- * get optimised away. 
+ * get optimised away.
  */
 static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cfi_private *cfi)
 {
@@ -259,7 +267,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
         unsigned long onecmd;
         int i;
 
-        /* We do it this way to give the compiler a fighting chance 
+        /* We do it this way to give the compiler a fighting chance
            of optimising away all the crap for 'bankwidth' larger than
            an unsigned long, in the common case where that support is
            disabled */
@@ -270,7 +278,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
                 wordwidth = map_bankwidth(map);
                 words_per_bus = 1;
         }
-        
+
         chip_mode = map_bankwidth(map) / cfi_interleave(cfi);
         chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map);
 
@@ -289,7 +297,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
                 break;
         }
 
-        /* Now replicate it across the size of an unsigned long, or 
+        /* Now replicate it across the size of an unsigned long, or
            just to the bus width as appropriate */
         switch (chips_per_word) {
         default: BUG();
@@ -305,7 +313,7 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
                 ;
         }
 
-        /* And finally, for the multi-word case, replicate it 
+        /* And finally, for the multi-word case, replicate it
            in all words in the structure */
         for (i=0; i < words_per_bus; i++) {
                 val.x[i] = onecmd;
@@ -316,14 +324,14 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
 #define CMD(x)  cfi_build_cmd((x), map, cfi)
 
 
-static inline unsigned char cfi_merge_status(map_word val, struct map_info *map, 
+static inline unsigned long cfi_merge_status(map_word val, struct map_info *map,
                                            struct cfi_private *cfi)
 {
         int wordwidth, words_per_bus, chip_mode, chips_per_word;
         unsigned long onestat, res = 0;
         int i;
 
-        /* We do it this way to give the compiler a fighting chance 
+        /* We do it this way to give the compiler a fighting chance
            of optimising away all the crap for 'bankwidth' larger than
            an unsigned long, in the common case where that support is
            disabled */
@@ -334,7 +342,7 @@ static inline unsigned char cfi_merge_status(map_word val, struct map_info *map,
                 wordwidth = map_bankwidth(map);
                 words_per_bus = 1;
         }
-        
+
         chip_mode = map_bankwidth(map) / cfi_interleave(cfi);
         chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map);
 
diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h
index 953e64fb8ac5..386a52cf8b1b 100644
--- a/include/linux/mtd/doc2000.h
+++ b/include/linux/mtd/doc2000.h
@@ -1,12 +1,12 @@
-/* 
+/*
  * Linux driver for Disk-On-Chip devices
  *
- * Copyright (C) 1999 Machine Vision Holdings, Inc.   
+ * Copyright (C) 1999 Machine Vision Holdings, Inc.
  * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org>
  * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com>
  * Copyright (C) 2002-2003 SnapGear Inc
  *
- * $Id: doc2000.h,v 1.24 2005/01/05 12:40:38 dwmw2 Exp $ 
+ * $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $
  *
  * Released under GPL
  */
@@ -75,10 +75,10 @@
 #define DoC_Mplus_CtrlConfirm           0x1076
 #define DoC_Mplus_Power                 0x1fff
 
-/* How to access the device? 
- * On ARM, it'll be mmap'd directly with 32-bit wide accesses. 
+/* How to access the device?
+ * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
  * On PPC, it's mmap'd and 16-bit wide.
- * Others use readb/writeb 
+ * Others use readb/writeb
  */
 #if defined(__arm__)
 #define ReadDOC_(adr, reg)      ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
@@ -172,7 +172,7 @@ struct DiskOnChip {
         unsigned long totlen;
         unsigned char ChipID; /* Type of DiskOnChip */
         int ioreg;
-        
+
         unsigned long mfr; /* Flash IDs - only one type of flash per device */
         unsigned long id;
         int chipshift;
@@ -180,10 +180,10 @@ struct DiskOnChip {
         char pageadrlen;
         char interleave; /* Internal interleaving - Millennium Plus style */
         unsigned long erasesize;
-        
+
         int curfloor;
         int curchip;
-        
+
         int numchips;
         struct Nand *chips;
         struct mtd_info *nextdoc;
diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h
index 675776fa3e27..a293a3b78e05 100644
--- a/include/linux/mtd/flashchip.h
+++ b/include/linux/mtd/flashchip.h
@@ -1,12 +1,12 @@
 
-/* 
+/*
  * struct flchip definition
- * 
- * Contains information about the location and state of a given flash device 
+ *
+ * Contains information about the location and state of a given flash device
  *
  * (C) 2000 Red Hat. GPLd.
  *
- * $Id: flashchip.h,v 1.17 2005/03/14 18:27:15 bjd Exp $
+ * $Id: flashchip.h,v 1.18 2005/11/07 11:14:54 gleixner Exp $
  *
  */
 
@@ -15,11 +15,11 @@
 
 /* For spinlocks. sched.h includes spinlock.h from whichever directory it
  * happens to be in - so we don't have to care whether we're on 2.2, which
- * has asm/spinlock.h, or 2.4, which has linux/spinlock.h 
+ * has asm/spinlock.h, or 2.4, which has linux/spinlock.h
  */
 #include <linux/sched.h>
 
-typedef enum { 
+typedef enum {
         FL_READY,
         FL_STATUS,
         FL_CFI_QUERY,
@@ -45,7 +45,7 @@ typedef enum {
 
 
 
-/* NOTE: confusingly, this can be used to refer to more than one chip at a time, 
+/* NOTE: confusingly, this can be used to refer to more than one chip at a time,
    if they're interleaved.  This can even refer to individual partitions on
    the same physical chip when present. */
 
diff --git a/include/linux/mtd/ftl.h b/include/linux/mtd/ftl.h
index 3678459b4535..d99609113307 100644
--- a/include/linux/mtd/ftl.h
+++ b/include/linux/mtd/ftl.h
@@ -1,6 +1,6 @@
 /*
- * $Id: ftl.h,v 1.6 2003/01/24 13:20:04 dwmw2 Exp $
- * 
+ * $Id: ftl.h,v 1.7 2005/11/07 11:14:54 gleixner Exp $
+ *
  * Derived from (and probably identical to):
  * ftl.h 1.7 1999/10/25 20:23:17
  *
@@ -12,7 +12,7 @@
  * Software distributed under the License is distributed on an "AS IS"
  * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
  * the License for the specific language governing rights and
- * limitations under the License. 
+ * limitations under the License.
  *
  * The initial developer of the original code is David A. Hinds
  * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
diff --git a/include/linux/mtd/gen_probe.h b/include/linux/mtd/gen_probe.h
index 3d7bdec14f97..256e7342ed1e 100644
--- a/include/linux/mtd/gen_probe.h
+++ b/include/linux/mtd/gen_probe.h
@@ -1,14 +1,14 @@
 /*
  * (C) 2001, 2001 Red Hat, Inc.
  * GPL'd
- * $Id: gen_probe.h,v 1.3 2004/10/20 22:10:33 dwmw2 Exp $
+ * $Id: gen_probe.h,v 1.4 2005/11/07 11:14:54 gleixner Exp $
  */
 
 #ifndef __LINUX_MTD_GEN_PROBE_H__
 #define __LINUX_MTD_GEN_PROBE_H__
 
 #include <linux/mtd/flashchip.h>
-#include <linux/mtd/map.h> 
+#include <linux/mtd/map.h>
 #include <linux/mtd/cfi.h>
 #include <linux/bitops.h>
 
diff --git a/include/linux/mtd/jedec.h b/include/linux/mtd/jedec.h
index 2ba0f700ddbc..9006feb218b9 100644
--- a/include/linux/mtd/jedec.h
+++ b/include/linux/mtd/jedec.h
@@ -1,13 +1,13 @@
 
 /* JEDEC Flash Interface.
- * This is an older type of interface for self programming flash. It is 
+ * This is an older type of interface for self programming flash. It is
  * commonly use in older AMD chips and is obsolete compared with CFI.
  * It is called JEDEC because the JEDEC association distributes the ID codes
  * for the chips.
  *
  * See the AMD flash databook for information on how to operate the interface.
  *
- * $Id: jedec.h,v 1.3 2003/05/21 11:51:01 dwmw2 Exp $
+ * $Id: jedec.h,v 1.4 2005/11/07 11:14:54 gleixner Exp $
  */
 
 #ifndef __LINUX_MTD_JEDEC_H__
@@ -33,16 +33,16 @@ struct jedec_flash_chip
    __u16 jedec;
    unsigned long size;
    unsigned long sectorsize;
-   
+
    // *(__u8*)(base + (adder << addrshift)) = data << datashift
    // Address size = size << addrshift
    unsigned long base;           // Byte 0 of the flash, will be unaligned
    unsigned int datashift;       // Useful for 32bit/16bit accesses
    unsigned int addrshift;
    unsigned long offset;         // linerized start. base==offset for unbanked, uninterleaved flash
-   
+
    __u32 capabilities;
-   
+
    // These markers are filled in by the flash_chip_scan function
    unsigned long start;
    unsigned long length;
@@ -51,16 +51,16 @@ struct jedec_flash_chip
 struct jedec_private
 {
    unsigned long size;         // Total size of all the devices
-   
+
    /* Bank handling. If sum(bank_fill) == size then this is linear flash.
       Otherwise the mapping has holes in it. bank_fill may be used to
-      find the holes, but in the common symetric case 
-      bank_fill[0] == bank_fill[*], thus addresses may be computed 
+      find the holes, but in the common symetric case
+      bank_fill[0] == bank_fill[*], thus addresses may be computed
       mathmatically. bank_fill must be powers of two */
    unsigned is_banked;
    unsigned long bank_fill[MAX_JEDEC_CHIPS];
-   
-   struct jedec_flash_chip chips[MAX_JEDEC_CHIPS];  
+
+   struct jedec_flash_chip chips[MAX_JEDEC_CHIPS];
 };
 
 #endif
diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h
index fc28841f3409..fedfbc8a287f 100644
--- a/include/linux/mtd/map.h
+++ b/include/linux/mtd/map.h
@@ -1,6 +1,6 @@
 
 /* Overhauled routines for dealing with different mmap regions of flash */
-/* $Id: map.h,v 1.52 2005/05/25 10:29:41 gleixner Exp $ */
+/* $Id: map.h,v 1.54 2005/11/07 11:14:54 gleixner Exp $ */
 
 #ifndef __LINUX_MTD_MAP_H__
 #define __LINUX_MTD_MAP_H__
@@ -170,14 +170,14 @@ typedef union {
    to a chip probe routine -- either JEDEC or CFI probe or both -- via
    do_map_probe(). If a chip is recognised, the probe code will invoke the
    appropriate chip driver (if present) and return a struct mtd_info.
-   At which point, you fill in the mtd->module with your own module 
+   At which point, you fill in the mtd->module with your own module
    address, and register it with the MTD core code. Or you could partition
    it and register the partitions instead, or keep it for your own private
    use; whatever.
-   
+
    The mtd->priv field will point to the struct map_info, and any further
-   private data required by the chip driver is linked from the 
-   mtd->priv->fldrv_priv field. This allows the map driver to get at 
+   private data required by the chip driver is linked from the
+   mtd->priv->fldrv_priv field. This allows the map driver to get at
    the destructor function map->fldrv_destroy() when it's tired
    of living.
 */
@@ -214,7 +214,7 @@ struct map_info {
            If there is no cache to care about this can be set to NULL. */
         void (*inval_cache)(struct map_info *, unsigned long, ssize_t);
 
-        /* set_vpp() must handle being reentered -- enable, enable, disable 
+        /* set_vpp() must handle being reentered -- enable, enable, disable
            must leave it enabled. */
         void (*set_vpp)(struct map_info *, int);
 
@@ -353,7 +353,7 @@ static inline map_word map_word_ff(struct map_info *map)
 {
         map_word r;
         int i;
-        
+
         if (map_bankwidth(map) < MAP_FF_LIMIT) {
                 int bw = 8 * map_bankwidth(map);
                 r.x[0] = (1 << bw) - 1;
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index c50c3f3927d9..b6f2fdae65c6 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -1,5 +1,5 @@
-/* 
- * $Id: mtd.h,v 1.59 2005/04/11 10:19:02 gleixner Exp $
+/*
+ * $Id: mtd.h,v 1.61 2005/11/07 11:14:54 gleixner Exp $
  *
  * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al.
  *
@@ -14,7 +14,6 @@
 #endif
 
 #include <linux/config.h>
-#include <linux/version.h>
 #include <linux/types.h>
 #include <linux/module.h>
 #include <linux/uio.h>
@@ -72,7 +71,17 @@ struct mtd_info {
         u_int32_t oobsize;   // Amount of OOB data per block (e.g. 16)
         u_int32_t ecctype;
         u_int32_t eccsize;
-        
+
+        /*
+         * Reuse some of the above unused fields in the case of NOR flash
+         * with configurable programming regions to avoid modifying the
+         * user visible structure layout/size.  Only valid when the
+         * MTD_PROGRAM_REGIONS flag is set.
+         * (Maybe we should have an union for those?)
+         */
+#define MTD_PROGREGION_SIZE(mtd)  (mtd)->oobblock
+#define MTD_PROGREGION_CTRLMODE_VALID(mtd)  (mtd)->oobsize
+#define MTD_PROGREGION_CTRLMODE_INVALID(mtd)  (mtd)->ecctype
 
         // Kernel-only stuff starts here.
         char *name;
@@ -80,13 +89,13 @@ struct mtd_info {
 
         // oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO)
         struct nand_oobinfo oobinfo;
-        u_int32_t oobavail;  // Number of bytes in OOB area available for fs 
+        u_int32_t oobavail;  // Number of bytes in OOB area available for fs
 
         /* Data for variable erase regions. If numeraseregions is zero,
-         * it means that the whole device has erasesize as given above. 
+         * it means that the whole device has erasesize as given above.
          */
         int numeraseregions;
-        struct mtd_erase_region_info *eraseregions; 
+        struct mtd_erase_region_info *eraseregions;
 
         /* This really shouldn't be here. It can go away in 2.5 */
         u_int32_t bank_size;
@@ -109,10 +118,10 @@ struct mtd_info {
         int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
         int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
 
-        /* 
-         * Methods to access the protection register area, present in some 
+        /*
+         * Methods to access the protection register area, present in some
          * flash devices. The user data is one time programmable but the
-         * factory data is read only. 
+         * factory data is read only.
          */
         int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
         int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
@@ -123,14 +132,14 @@ struct mtd_info {
 
         /* kvec-based read/write methods. We need these especially for NAND flash,
            with its limited number of write cycles per erase.
-           NB: The 'count' parameter is the number of _vectors_, each of 
+           NB: The 'count' parameter is the number of _vectors_, each of
            which contains an (ofs, len) tuple.
         */
         int (*readv) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen);
-        int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, 
+        int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from,
                 size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
         int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
-        int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, 
+        int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to,
                 size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
 
         /* Sync */
@@ -194,7 +203,7 @@ int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
 #define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args)
 #define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args)
 #define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args)
-#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd);  } while (0) 
+#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd);  } while (0)
 
 
 #ifdef CONFIG_MTD_PARTITIONS
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 9b5b76217584..da5e67b3fc70 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -5,7 +5,7 @@
  *                     Steven J. Hill <sjhill@realitydiluted.com>
  *                     Thomas Gleixner <tglx@linutronix.de>
  *
- * $Id: nand.h,v 1.73 2005/05/31 19:39:17 gleixner Exp $
+ * $Id: nand.h,v 1.74 2005/09/15 13:58:50 vwool Exp $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -24,7 +24,7 @@
  *                      bat later if I did something naughty.
  *   10-11-2000 SJH     Added private NAND flash structure for driver
  *   10-24-2000 SJH     Added prototype for 'nand_scan' function
- *   10-29-2001 TG      changed nand_chip structure to support 
+ *   10-29-2001 TG      changed nand_chip structure to support
  *                      hardwarespecific function for accessing control lines
  *   02-21-2002 TG      added support for different read/write adress and
  *                      ready/busy line access function
@@ -36,21 +36,21 @@
  *                      CONFIG_MTD_NAND_ECC_JFFS2 is not set
  *   08-10-2002 TG      extensions to nand_chip structure to support HW-ECC
  *
- *   08-29-2002 tglx    nand_chip structure: data_poi for selecting 
+ *   08-29-2002 tglx    nand_chip structure: data_poi for selecting
  *                      internal / fs-driver buffer
  *                      support for 6byte/512byte hardware ECC
  *                      read_ecc, write_ecc extended for different oob-layout
  *                      oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
  *                      NAND_YAFFS_OOB
  *  11-25-2002 tglx     Added Manufacturer code FUJITSU, NATIONAL
- *                      Split manufacturer and device ID structures 
+ *                      Split manufacturer and device ID structures
  *
  *  02-08-2004 tglx     added option field to nand structure for chip anomalities
  *  05-25-2004 tglx     added bad block table support, ST-MICRO manufacturer id
  *                      update of nand_chip structure description
- *  01-17-2005 dmarlin  added extended commands for AG-AND device and added option 
+ *  01-17-2005 dmarlin  added extended commands for AG-AND device and added option
  *                      for BBT_AUTO_REFRESH.
- *  01-20-2005 dmarlin  added optional pointer to hardware specific callback for 
+ *  01-20-2005 dmarlin  added optional pointer to hardware specific callback for
  *                      extra error status checks.
  */
 #ifndef __LINUX_MTD_NAND_H
@@ -120,8 +120,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
 #define NAND_CMD_CACHEDPROG     0x15
 
 /* Extended commands for AG-AND device */
-/* 
- * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but 
+/*
+ * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
  *       there is no way to distinguish that from NAND_CMD_READ0
  *       until the remaining sequence of commands has been completed
  *       so add a high order bit and mask it off in the command.
@@ -145,7 +145,7 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
 #define NAND_STATUS_READY       0x40
 #define NAND_STATUS_WP          0x80
 
-/* 
+/*
  * Constants for ECC_MODES
  */
 
@@ -191,12 +191,12 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
 #define NAND_CACHEPRG           0x00000008
 /* Chip has copy back function */
 #define NAND_COPYBACK           0x00000010
-/* AND Chip which has 4 banks and a confusing page / block 
+/* AND Chip which has 4 banks and a confusing page / block
  * assignment. See Renesas datasheet for further information */
 #define NAND_IS_AND             0x00000020
 /* Chip has a array of 4 pages which can be read without
  * additional ready /busy waits */
-#define NAND_4PAGE_ARRAY        0x00000040 
+#define NAND_4PAGE_ARRAY        0x00000040
 /* Chip requires that BBT is periodically rewritten to prevent
  * bits from adjacent blocks from 'leaking' in altering data.
  * This happens with the Renesas AG-AND chips, possibly others.  */
@@ -219,8 +219,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
 /* Use a flash based bad block table. This option is passed to the
  * default bad block table function. */
 #define NAND_USE_FLASH_BBT      0x00010000
-/* The hw ecc generator provides a syndrome instead a ecc value on read 
- * This can only work if we have the ecc bytes directly behind the 
+/* The hw ecc generator provides a syndrome instead a ecc value on read
+ * This can only work if we have the ecc bytes directly behind the
  * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
 #define NAND_HWECC_SYNDROME     0x00020000
 /* This option skips the bbt scan during initialization. */
@@ -244,6 +244,7 @@ typedef enum {
         FL_ERASING,
         FL_SYNCING,
         FL_CACHEDPRG,
+        FL_PM_SUSPENDED,
 } nand_state_t;
 
 /* Keep gcc happy */
@@ -251,7 +252,7 @@ struct nand_chip;
 
 /**
  * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
- * @lock:               protection lock  
+ * @lock:               protection lock
  * @active:             the mtd device which holds the controller currently
  * @wq:                 wait queue to sleep on if a NAND operation is in progress
  *                      used instead of the per chip wait queue when a hw controller is available
@@ -264,8 +265,8 @@ struct nand_hw_control {
 
 /**
  * struct nand_chip - NAND Private Flash Chip Data
- * @IO_ADDR_R:          [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device 
- * @IO_ADDR_W:          [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device 
+ * @IO_ADDR_R:          [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
+ * @IO_ADDR_W:          [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
  * @read_byte:          [REPLACEABLE] read one byte from the chip
  * @write_byte:         [REPLACEABLE] write one byte to the chip
  * @read_word:          [REPLACEABLE] read one word from the chip
@@ -288,7 +289,7 @@ struct nand_hw_control {
  *                      be provided if a hardware ECC is available
  * @erase_cmd:          [INTERN] erase command write function, selectable due to AND support
  * @scan_bbt:           [REPLACEABLE] function to scan bad block table
- * @eccmode:            [BOARDSPECIFIC] mode of ecc, see defines 
+ * @eccmode:            [BOARDSPECIFIC] mode of ecc, see defines
  * @eccsize:            [INTERN] databytes used per ecc-calculation
  * @eccbytes:           [INTERN] number of ecc bytes per ecc-calculation step
  * @eccsteps:           [INTERN] number of ecc calculation steps per page
@@ -300,7 +301,7 @@ struct nand_hw_control {
  * @phys_erase_shift:   [INTERN] number of address bits in a physical eraseblock
  * @bbt_erase_shift:    [INTERN] number of address bits in a bbt entry
  * @chip_shift:         [INTERN] number of address bits in one chip
- * @data_buf:           [INTERN] internal buffer for one page + oob 
+ * @data_buf:           [INTERN] internal buffer for one page + oob
  * @oob_buf:            [INTERN] oob buffer for one eraseblock
  * @oobdirty:           [INTERN] indicates that oob_buf must be reinitialized
  * @data_poi:           [INTERN] pointer to a data buffer
@@ -315,22 +316,22 @@ struct nand_hw_control {
  * @bbt:                [INTERN] bad block table pointer
  * @bbt_td:             [REPLACEABLE] bad block table descriptor for flash lookup
  * @bbt_md:             [REPLACEABLE] bad block table mirror descriptor
- * @badblock_pattern:   [REPLACEABLE] bad block scan pattern used for initial bad block scan 
+ * @badblock_pattern:   [REPLACEABLE] bad block scan pattern used for initial bad block scan
  * @controller:         [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
  * @priv:               [OPTIONAL] pointer to private chip date
- * @errstat:            [OPTIONAL] hardware specific function to perform additional error status checks 
+ * @errstat:            [OPTIONAL] hardware specific function to perform additional error status checks
  *                      (determine if errors are correctable)
  */
- 
+
 struct nand_chip {
         void  __iomem   *IO_ADDR_R;
         void  __iomem   *IO_ADDR_W;
-        
+
         u_char          (*read_byte)(struct mtd_info *mtd);
         void            (*write_byte)(struct mtd_info *mtd, u_char byte);
         u16             (*read_word)(struct mtd_info *mtd);
         void            (*write_word)(struct mtd_info *mtd, u16 word);
-        
+
         void            (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
         void            (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
         int             (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
@@ -395,7 +396,7 @@ struct nand_chip {
  * @name:       Identify the device type
  * @id:         device ID code
  * @pagesize:   Pagesize in bytes. Either 256 or 512 or 0
- *              If the pagesize is 0, then the real pagesize 
+ *              If the pagesize is 0, then the real pagesize
  *              and the eraseize are determined from the
  *              extended id bytes in the chip
  * @erasesize:  Size of an erase block in the flash device.
@@ -424,7 +425,7 @@ struct nand_manufacturers {
 extern struct nand_flash_dev nand_flash_ids[];
 extern struct nand_manufacturers nand_manuf_ids[];
 
-/** 
+/**
  * struct nand_bbt_descr - bad block table descriptor
  * @options:    options for this descriptor
  * @pages:      the page(s) where we find the bbt, used with option BBT_ABSPAGE
@@ -435,14 +436,14 @@ extern struct nand_manufacturers nand_manuf_ids[];
  * @version:    version read from the bbt page during scan
  * @len:        length of the pattern, if 0 no pattern check is performed
  * @maxblocks:  maximum number of blocks to search for a bbt. This number of
- *              blocks is reserved at the end of the device where the tables are 
+ *              blocks is reserved at the end of the device where the tables are
  *              written.
  * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
  *              bad) block in the stored bbt
- * @pattern:    pattern to identify bad block table or factory marked good / 
+ * @pattern:    pattern to identify bad block table or factory marked good /
  *              bad blocks, can be NULL, if len = 0
  *
- * Descriptor for the bad block table marker and the descriptor for the 
+ * Descriptor for the bad block table marker and the descriptor for the
  * pattern which identifies good and bad blocks. The assumption is made
  * that the pattern and the version count are always located in the oob area
  * of the first block.
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
new file mode 100644
index 000000000000..f1fd4215686a
--- /dev/null
+++ b/include/linux/mtd/onenand.h
@@ -0,0 +1,155 @@
+/*
+ *  linux/include/linux/mtd/onenand.h
+ *
+ *  Copyright (C) 2005 Samsung Electronics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MTD_ONENAND_H
+#define __LINUX_MTD_ONENAND_H
+
+#include <linux/spinlock.h>
+#include <linux/mtd/onenand_regs.h>
+#include <linux/mtd/bbm.h>
+
+#define MAX_BUFFERRAM           2
+#define MAX_ONENAND_PAGESIZE    (2048 + 64)
+
+/* Scan and identify a OneNAND device */
+extern int onenand_scan(struct mtd_info *mtd, int max_chips);
+/* Free resources held by the OneNAND device */
+extern void onenand_release(struct mtd_info *mtd);
+
+/**
+ * onenand_state_t - chip states
+ * Enumeration for OneNAND flash chip state
+ */
+typedef enum {
+        FL_READY,
+        FL_READING,
+        FL_WRITING,
+        FL_ERASING,
+        FL_SYNCING,
+        FL_UNLOCKING,
+        FL_LOCKING,
+        FL_PM_SUSPENDED,
+} onenand_state_t;
+
+/**
+ * struct onenand_bufferram - OneNAND BufferRAM Data
+ * @param block         block address in BufferRAM
+ * @param page          page address in BufferRAM
+ * @param valid         valid flag
+ */
+struct onenand_bufferram {
+        int block;
+        int page;
+        int valid;
+};
+
+/**
+ * struct onenand_chip - OneNAND Private Flash Chip Data
+ * @param base          [BOARDSPECIFIC] address to access OneNAND
+ * @param chipsize      [INTERN] the size of one chip for multichip arrays
+ * @param device_id     [INTERN] device ID
+ * @param verstion_id   [INTERN] version ID
+ * @param options       [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about
+ * @param erase_shift   [INTERN] number of address bits in a block
+ * @param page_shift    [INTERN] number of address bits in a page
+ * @param ppb_shift     [INTERN] number of address bits in a pages per block
+ * @param page_mask     [INTERN] a page per block mask
+ * @param bufferam_index        [INTERN] BufferRAM index
+ * @param bufferam      [INTERN] BufferRAM info
+ * @param readw         [REPLACEABLE] hardware specific function for read short
+ * @param writew        [REPLACEABLE] hardware specific function for write short
+ * @param command       [REPLACEABLE] hardware specific function for writing commands to the chip
+ * @param wait          [REPLACEABLE] hardware specific function for wait on ready
+ * @param read_bufferram        [REPLACEABLE] hardware specific function for BufferRAM Area
+ * @param write_bufferram       [REPLACEABLE] hardware specific function for BufferRAM Area
+ * @param read_word     [REPLACEABLE] hardware specific function for read register of OneNAND
+ * @param write_word    [REPLACEABLE] hardware specific function for write register of OneNAND
+ * @param scan_bbt      [REPLACEALBE] hardware specific function for scaning Bad block Table
+ * @param chip_lock     [INTERN] spinlock used to protect access to this structure and the chip
+ * @param wq            [INTERN] wait queue to sleep on if a OneNAND operation is in progress
+ * @param state         [INTERN] the current state of the OneNAND device
+ * @param autooob       [REPLACEABLE] the default (auto)placement scheme
+ * @param bbm           [REPLACEABLE] pointer to Bad Block Management
+ * @param priv          [OPTIONAL] pointer to private chip date
+ */
+struct onenand_chip {
+        void __iomem            *base;
+        unsigned int            chipsize;
+        unsigned int            device_id;
+        unsigned int            density_mask;
+        unsigned int            options;
+
+        unsigned int            erase_shift;
+        unsigned int            page_shift;
+        unsigned int            ppb_shift;      /* Pages per block shift */
+        unsigned int            page_mask;
+
+        unsigned int            bufferram_index;
+        struct onenand_bufferram        bufferram[MAX_BUFFERRAM];
+
+        int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len);
+        int (*wait)(struct mtd_info *mtd, int state);
+        int (*read_bufferram)(struct mtd_info *mtd, int area,
+                        unsigned char *buffer, int offset, size_t count);
+        int (*write_bufferram)(struct mtd_info *mtd, int area,
+                        const unsigned char *buffer, int offset, size_t count);
+        unsigned short (*read_word)(void __iomem *addr);
+        void (*write_word)(unsigned short value, void __iomem *addr);
+        void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
+        int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
+        int (*scan_bbt)(struct mtd_info *mtd);
+
+        spinlock_t              chip_lock;
+        wait_queue_head_t       wq;
+        onenand_state_t         state;
+
+        struct nand_oobinfo     *autooob;
+
+        void                    *bbm;
+
+        void                    *priv;
+};
+
+/*
+ * Helper macros
+ */
+#define ONENAND_CURRENT_BUFFERRAM(this)         (this->bufferram_index)
+#define ONENAND_NEXT_BUFFERRAM(this)            (this->bufferram_index ^ 1)
+#define ONENAND_SET_NEXT_BUFFERRAM(this)        (this->bufferram_index ^= 1)
+
+#define ONENAND_GET_SYS_CFG1(this)                                      \
+        (this->read_word(this->base + ONENAND_REG_SYS_CFG1))
+#define ONENAND_SET_SYS_CFG1(v, this)                                   \
+        (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
+
+/*
+ * Options bits
+ */
+#define ONENAND_CONT_LOCK               (0x0001)
+
+
+/*
+ * OneNAND Flash Manufacturer ID Codes
+ */
+#define ONENAND_MFR_SAMSUNG     0xec
+#define ONENAND_MFR_UNKNOWN     0x00
+
+/**
+ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
+ * @param name:         Manufacturer name
+ * @param id:           manufacturer ID code of device.
+*/
+struct onenand_manufacturers {
+        int id;
+        char *name;
+};
+
+#endif  /* __LINUX_MTD_ONENAND_H */
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
new file mode 100644
index 000000000000..d7832ef8ed63
--- /dev/null
+++ b/include/linux/mtd/onenand_regs.h
@@ -0,0 +1,180 @@
+/*
+ *  linux/include/linux/mtd/onenand_regs.h
+ *
+ *  OneNAND Register header file
+ *
+ *  Copyright (C) 2005 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ONENAND_REG_H
+#define __ONENAND_REG_H
+
+/* Memory Address Map Translation (Word order) */
+#define ONENAND_MEMORY_MAP(x)           ((x) << 1)
+
+/*
+ * External BufferRAM area
+ */
+#define ONENAND_BOOTRAM                 ONENAND_MEMORY_MAP(0x0000)
+#define ONENAND_DATARAM                 ONENAND_MEMORY_MAP(0x0200)
+#define ONENAND_SPARERAM                ONENAND_MEMORY_MAP(0x8010)
+
+/*
+ * OneNAND Registers
+ */
+#define ONENAND_REG_MANUFACTURER_ID     ONENAND_MEMORY_MAP(0xF000)
+#define ONENAND_REG_DEVICE_ID           ONENAND_MEMORY_MAP(0xF001)
+#define ONENAND_REG_VERSION_ID          ONENAND_MEMORY_MAP(0xF002)
+#define ONENAND_REG_DATA_BUFFER_SIZE    ONENAND_MEMORY_MAP(0xF003)
+#define ONENAND_REG_BOOT_BUFFER_SIZE    ONENAND_MEMORY_MAP(0xF004)
+#define ONENAND_REG_NUM_BUFFERS         ONENAND_MEMORY_MAP(0xF005)
+#define ONENAND_REG_TECHNOLOGY          ONENAND_MEMORY_MAP(0xF006)
+
+#define ONENAND_REG_START_ADDRESS1      ONENAND_MEMORY_MAP(0xF100)
+#define ONENAND_REG_START_ADDRESS2      ONENAND_MEMORY_MAP(0xF101)
+#define ONENAND_REG_START_ADDRESS3      ONENAND_MEMORY_MAP(0xF102)
+#define ONENAND_REG_START_ADDRESS4      ONENAND_MEMORY_MAP(0xF103)
+#define ONENAND_REG_START_ADDRESS5      ONENAND_MEMORY_MAP(0xF104)
+#define ONENAND_REG_START_ADDRESS6      ONENAND_MEMORY_MAP(0xF105)
+#define ONENAND_REG_START_ADDRESS7      ONENAND_MEMORY_MAP(0xF106)
+#define ONENAND_REG_START_ADDRESS8      ONENAND_MEMORY_MAP(0xF107)
+
+#define ONENAND_REG_START_BUFFER        ONENAND_MEMORY_MAP(0xF200)
+#define ONENAND_REG_COMMAND             ONENAND_MEMORY_MAP(0xF220)
+#define ONENAND_REG_SYS_CFG1            ONENAND_MEMORY_MAP(0xF221)
+#define ONENAND_REG_SYS_CFG2            ONENAND_MEMORY_MAP(0xF222)
+#define ONENAND_REG_CTRL_STATUS         ONENAND_MEMORY_MAP(0xF240)
+#define ONENAND_REG_INTERRUPT           ONENAND_MEMORY_MAP(0xF241)
+#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C)
+#define ONENAND_REG_END_BLOCK_ADDRESS   ONENAND_MEMORY_MAP(0xF24D)
+#define ONENAND_REG_WP_STATUS           ONENAND_MEMORY_MAP(0xF24E)
+
+#define ONENAND_REG_ECC_STATUS          ONENAND_MEMORY_MAP(0xFF00)
+#define ONENAND_REG_ECC_M0              ONENAND_MEMORY_MAP(0xFF01)
+#define ONENAND_REG_ECC_S0              ONENAND_MEMORY_MAP(0xFF02)
+#define ONENAND_REG_ECC_M1              ONENAND_MEMORY_MAP(0xFF03)
+#define ONENAND_REG_ECC_S1              ONENAND_MEMORY_MAP(0xFF04)
+#define ONENAND_REG_ECC_M2              ONENAND_MEMORY_MAP(0xFF05)
+#define ONENAND_REG_ECC_S2              ONENAND_MEMORY_MAP(0xFF06)
+#define ONENAND_REG_ECC_M3              ONENAND_MEMORY_MAP(0xFF07)
+#define ONENAND_REG_ECC_S3              ONENAND_MEMORY_MAP(0xFF08)
+
+/*
+ * Device ID Register F001h (R)
+ */
+#define ONENAND_DEVICE_DENSITY_SHIFT    (4)
+#define ONENAND_DEVICE_IS_DDP           (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX         (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK         (0x3)
+
+#define ONENAND_DEVICE_DENSITY_512Mb    (0x002)
+
+/*
+ * Version ID Register F002h (R)
+ */
+#define ONENAND_VERSION_PROCESS_SHIFT   (8)
+
+/*
+ * Start Address 1 F100h (R/W)
+ */
+#define ONENAND_DDP_SHIFT               (15)
+
+/*
+ * Start Address 8 F107h (R/W)
+ */
+#define ONENAND_FPA_MASK                (0x3f)
+#define ONENAND_FPA_SHIFT               (2)
+#define ONENAND_FSA_MASK                (0x03)
+
+/*
+ * Start Buffer Register F200h (R/W)
+ */
+#define ONENAND_BSA_MASK                (0x03)
+#define ONENAND_BSA_SHIFT               (8)
+#define ONENAND_BSA_BOOTRAM             (0 << 2)
+#define ONENAND_BSA_DATARAM0            (2 << 2)
+#define ONENAND_BSA_DATARAM1            (3 << 2)
+#define ONENAND_BSC_MASK                (0x03)
+
+/*
+ * Command Register F220h (R/W)
+ */
+#define ONENAND_CMD_READ                (0x00)
+#define ONENAND_CMD_READOOB             (0x13)
+#define ONENAND_CMD_PROG                (0x80)
+#define ONENAND_CMD_PROGOOB             (0x1A)
+#define ONENAND_CMD_UNLOCK              (0x23)
+#define ONENAND_CMD_LOCK                (0x2A)
+#define ONENAND_CMD_LOCK_TIGHT          (0x2C)
+#define ONENAND_CMD_ERASE               (0x94)
+#define ONENAND_CMD_RESET               (0xF0)
+#define ONENAND_CMD_READID              (0x90)
+
+/* NOTE: Those are not *REAL* commands */
+#define ONENAND_CMD_BUFFERRAM           (0x1978)
+
+/*
+ * System Configuration 1 Register F221h (R, R/W)
+ */
+#define ONENAND_SYS_CFG1_SYNC_READ      (1 << 15)
+#define ONENAND_SYS_CFG1_BRL_7          (7 << 12)
+#define ONENAND_SYS_CFG1_BRL_6          (6 << 12)
+#define ONENAND_SYS_CFG1_BRL_5          (5 << 12)
+#define ONENAND_SYS_CFG1_BRL_4          (4 << 12)
+#define ONENAND_SYS_CFG1_BRL_3          (3 << 12)
+#define ONENAND_SYS_CFG1_BRL_10         (2 << 12)
+#define ONENAND_SYS_CFG1_BRL_9          (1 << 12)
+#define ONENAND_SYS_CFG1_BRL_8          (0 << 12)
+#define ONENAND_SYS_CFG1_BRL_SHIFT      (12)
+#define ONENAND_SYS_CFG1_BL_32          (4 << 9)
+#define ONENAND_SYS_CFG1_BL_16          (3 << 9)
+#define ONENAND_SYS_CFG1_BL_8           (2 << 9)
+#define ONENAND_SYS_CFG1_BL_4           (1 << 9)
+#define ONENAND_SYS_CFG1_BL_CONT        (0 << 9)
+#define ONENAND_SYS_CFG1_BL_SHIFT       (9)
+#define ONENAND_SYS_CFG1_NO_ECC         (1 << 8)
+#define ONENAND_SYS_CFG1_RDY            (1 << 7)
+#define ONENAND_SYS_CFG1_INT            (1 << 6)
+#define ONENAND_SYS_CFG1_IOBE           (1 << 5)
+#define ONENAND_SYS_CFG1_RDY_CONF       (1 << 4)
+
+/*
+ * Controller Status Register F240h (R)
+ */
+#define ONENAND_CTRL_ONGO               (1 << 15)
+#define ONENAND_CTRL_LOCK               (1 << 14)
+#define ONENAND_CTRL_LOAD               (1 << 13)
+#define ONENAND_CTRL_PROGRAM            (1 << 12)
+#define ONENAND_CTRL_ERASE              (1 << 11)
+#define ONENAND_CTRL_ERROR              (1 << 10)
+#define ONENAND_CTRL_RSTB               (1 << 7)
+
+/*
+ * Interrupt Status Register F241h (R)
+ */
+#define ONENAND_INT_MASTER              (1 << 15)
+#define ONENAND_INT_READ                (1 << 7)
+#define ONENAND_INT_WRITE               (1 << 6)
+#define ONENAND_INT_ERASE               (1 << 5)
+#define ONENAND_INT_RESET               (1 << 4)
+#define ONENAND_INT_CLEAR               (0 << 0)
+
+/*
+ * NAND Flash Write Protection Status Register F24Eh (R)
+ */
+#define ONENAND_WP_US                   (1 << 2)
+#define ONENAND_WP_LS                   (1 << 1)
+#define ONENAND_WP_LTS                  (1 << 0)
+
+/*
+ * ECC Status Reigser FF00h (R)
+ */
+#define ONENAND_ECC_1BIT                (1 << 0)
+#define ONENAND_ECC_2BIT                (1 << 1)
+#define ONENAND_ECC_2BIT_ALL            (0xAAAA)
+
+#endif  /* __ONENAND_REG_H */
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 50b2edfc8f11..b03f512d51b9 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -5,7 +5,7 @@
  *
  * This code is GPL
  *
- * $Id: partitions.h,v 1.16 2004/11/16 18:34:40 dwmw2 Exp $
+ * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $
  */
 
 #ifndef MTD_PARTITIONS_H
@@ -16,25 +16,25 @@
 
 /*
  * Partition definition structure:
- * 
+ *
  * An array of struct partition is passed along with a MTD object to
  * add_mtd_partitions() to create them.
  *
  * For each partition, these fields are available:
  * name: string that will be used to label the partition's MTD device.
- * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition 
+ * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition
  *      will extend to the end of the master MTD device.
- * offset: absolute starting position within the master MTD device; if 
- *      defined as MTDPART_OFS_APPEND, the partition will start where the 
+ * offset: absolute starting position within the master MTD device; if
+ *      defined as MTDPART_OFS_APPEND, the partition will start where the
  *      previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block.
- * mask_flags: contains flags that have to be masked (removed) from the 
+ * mask_flags: contains flags that have to be masked (removed) from the
  *      master MTD flag set for the corresponding MTD partition.
- *      For example, to force a read-only partition, simply adding 
+ *      For example, to force a read-only partition, simply adding
  *      MTD_WRITEABLE to the mask_flags will do the trick.
  *
- * Note: writeable partitions require their size and offset be 
+ * Note: writeable partitions require their size and offset be
  * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK).
- */ 
+ */
 
 struct mtd_partition {
         char *name;                     /* identifier string */
@@ -66,7 +66,7 @@ struct mtd_part_parser {
 
 extern int register_mtd_parser(struct mtd_part_parser *parser);
 extern int deregister_mtd_parser(struct mtd_part_parser *parser);
-extern int parse_mtd_partitions(struct mtd_info *master, const char **types, 
+extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
                                 struct mtd_partition **pparts, unsigned long origin);
 
 #define put_partition_parser(p) do { module_put((p)->owner); } while(0)
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index 05aa4970677f..c7b8bcdef013 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -1,8 +1,8 @@
 /*
- * For boards with physically mapped flash and using 
+ * For boards with physically mapped flash and using
  * drivers/mtd/maps/physmap.c mapping driver.
  *
- * $Id: physmap.h,v 1.3 2004/07/21 00:16:15 jwboyer Exp $
+ * $Id: physmap.h,v 1.4 2005/11/07 11:14:55 gleixner Exp $
  *
  * Copyright (C) 2003 MontaVista Software Inc.
  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
@@ -18,7 +18,7 @@
 
 #include <linux/config.h>
 
-#if defined(CONFIG_MTD_PHYSMAP) 
+#if defined(CONFIG_MTD_PHYSMAP)
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
@@ -44,12 +44,12 @@ static inline void physmap_configure(unsigned long addr, unsigned long size, int
 #if defined(CONFIG_MTD_PARTITIONS)
 
 /*
- * Machines that wish to do flash partition may want to call this function in 
- * their setup routine.  
+ * Machines that wish to do flash partition may want to call this function in
+ * their setup routine.
  *
  *      physmap_set_partitions(mypartitions, num_parts);
  *
- * Note that one can always override this hard-coded partition with 
+ * Note that one can always override this hard-coded partition with
  * command line partition (you need to enable CONFIG_MTD_CMDLINE_PARTS).
  */
 void physmap_set_partitions(struct mtd_partition *parts, int num_parts);
diff --git a/include/linux/mtd/pmc551.h b/include/linux/mtd/pmc551.h
index 113e3087f68a..a7f6d20ad407 100644
--- a/include/linux/mtd/pmc551.h
+++ b/include/linux/mtd/pmc551.h
@@ -1,5 +1,5 @@
 /*
- * $Id: pmc551.h,v 1.5 2003/01/24 16:49:53 dwmw2 Exp $
+ * $Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $
  *
  * PMC551 PCI Mezzanine Ram Device
  *
@@ -7,7 +7,7 @@
  *       Mark Ferrell
  *       Copyright 1999,2000 Nortel Networks
  *
- * License: 
+ * License:
  *       As part of this driver was derrived from the slram.c driver it falls
  *       under the same license, which is GNU General Public License v2
  */
@@ -17,7 +17,7 @@
 
 #include <linux/mtd/mtd.h>
 
-#define PMC551_VERSION "$Id: pmc551.h,v 1.5 2003/01/24 16:49:53 dwmw2 Exp $\n"\
+#define PMC551_VERSION "$Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $\n"\
        "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
 
 /*
@@ -30,7 +30,7 @@ struct mypriv {
         u32    curr_map0;
         u32    asize;
         struct mtd_info *nextpmc551;
-};                       
+};
 
 /*
  * Function Prototypes
@@ -39,7 +39,7 @@ static int pmc551_erase(struct mtd_info *, struct erase_info *);
 static void pmc551_unpoint(struct mtd_info *, u_char *, loff_t, size_t);
 static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf);
 static int pmc551_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *);
-static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);        
+static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
 
 
 /*
@@ -50,7 +50,7 @@ static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_cha
 #endif
 
 #ifndef PCI_DEVICE_ID_V3_SEMI_V370PDC
-#define PCI_DEVICE_ID_V3_SEMI_V370PDC     0x0200  
+#define PCI_DEVICE_ID_V3_SEMI_V370PDC     0x0200
 #endif
 
 
diff --git a/include/linux/mtd/xip.h b/include/linux/mtd/xip.h
index 7b7deef6b180..220d50bb71cd 100644
--- a/include/linux/mtd/xip.h
+++ b/include/linux/mtd/xip.h
@@ -12,7 +12,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $
+ * $Id: xip.h,v 1.5 2005/11/07 11:14:55 gleixner Exp $
  */
 
 #ifndef __LINUX_MTD_XIP_H__
@@ -23,19 +23,19 @@
 #ifdef CONFIG_MTD_XIP
 
 /*
- * Function that are modifying the flash state away from array mode must
- * obviously not be running from flash.  The __xipram is therefore marking
- * those functions so they get relocated to ram.
- */
-#define __xipram __attribute__ ((__section__ (".data")))
-
-/*
  * We really don't want gcc to guess anything.
  * We absolutely _need_ proper inlining.
  */
 #include <linux/compiler.h>
 
 /*
+ * Function that are modifying the flash state away from array mode must
+ * obviously not be running from flash.  The __xipram is therefore marking
+ * those functions so they get relocated to ram.
+ */
+#define __xipram noinline __attribute__ ((__section__ (".data")))
+
+/*
  * Each architecture has to provide the following macros.  They must access
  * the hardware directly and not rely on any other (XIP) functions since they
  * won't be available when used (flash not in array mode).
@@ -60,9 +60,9 @@
  *              overflowing.
  *
  * xip_iprefetch()
- *  
+ *
  *      Macro to fill instruction prefetch
- *      e.g. a series of nops:  asm volatile (".rep 8; nop; .endr"); 
+ *      e.g. a series of nops:  asm volatile (".rep 8; nop; .endr");
  */
 
 #include <asm/mtd-xip.h>