diff options
Diffstat (limited to 'include/linux/mtd/nand.h')
-rw-r--r-- | include/linux/mtd/nand.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index c300db3ae285..e4d451e4600b 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
@@ -587,6 +587,11 @@ struct nand_buffers { | |||
587 | * @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds, | 587 | * @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds, |
588 | * also from the datasheet. It is the recommended ECC step | 588 | * also from the datasheet. It is the recommended ECC step |
589 | * size, if known; if unknown, set to zero. | 589 | * size, if known; if unknown, set to zero. |
590 | * @onfi_timing_mode_default: [INTERN] default ONFI timing mode. This field is | ||
591 | * either deduced from the datasheet if the NAND | ||
592 | * chip is not ONFI compliant or set to 0 if it is | ||
593 | * (an ONFI chip is always configured in mode 0 | ||
594 | * after a NAND reset) | ||
590 | * @numchips: [INTERN] number of physical chips | 595 | * @numchips: [INTERN] number of physical chips |
591 | * @chipsize: [INTERN] the size of one chip for multichip arrays | 596 | * @chipsize: [INTERN] the size of one chip for multichip arrays |
592 | * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 | 597 | * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 |
@@ -671,6 +676,7 @@ struct nand_chip { | |||
671 | uint8_t bits_per_cell; | 676 | uint8_t bits_per_cell; |
672 | uint16_t ecc_strength_ds; | 677 | uint16_t ecc_strength_ds; |
673 | uint16_t ecc_step_ds; | 678 | uint16_t ecc_step_ds; |
679 | int onfi_timing_mode_default; | ||
674 | int badblockpos; | 680 | int badblockpos; |
675 | int badblockbits; | 681 | int badblockbits; |
676 | 682 | ||
@@ -766,12 +772,17 @@ struct nand_chip { | |||
766 | * @options: stores various chip bit options | 772 | * @options: stores various chip bit options |
767 | * @id_len: The valid length of the @id. | 773 | * @id_len: The valid length of the @id. |
768 | * @oobsize: OOB size | 774 | * @oobsize: OOB size |
775 | * @ecc: ECC correctability and step information from the datasheet. | ||
769 | * @ecc.strength_ds: The ECC correctability from the datasheet, same as the | 776 | * @ecc.strength_ds: The ECC correctability from the datasheet, same as the |
770 | * @ecc_strength_ds in nand_chip{}. | 777 | * @ecc_strength_ds in nand_chip{}. |
771 | * @ecc.step_ds: The ECC step required by the @ecc.strength_ds, same as the | 778 | * @ecc.step_ds: The ECC step required by the @ecc.strength_ds, same as the |
772 | * @ecc_step_ds in nand_chip{}, also from the datasheet. | 779 | * @ecc_step_ds in nand_chip{}, also from the datasheet. |
773 | * For example, the "4bit ECC for each 512Byte" can be set with | 780 | * For example, the "4bit ECC for each 512Byte" can be set with |
774 | * NAND_ECC_INFO(4, 512). | 781 | * NAND_ECC_INFO(4, 512). |
782 | * @onfi_timing_mode_default: the default ONFI timing mode entered after a NAND | ||
783 | * reset. Should be deduced from timings described | ||
784 | * in the datasheet. | ||
785 | * | ||
775 | */ | 786 | */ |
776 | struct nand_flash_dev { | 787 | struct nand_flash_dev { |
777 | char *name; | 788 | char *name; |
@@ -792,6 +803,7 @@ struct nand_flash_dev { | |||
792 | uint16_t strength_ds; | 803 | uint16_t strength_ds; |
793 | uint16_t step_ds; | 804 | uint16_t step_ds; |
794 | } ecc; | 805 | } ecc; |
806 | int onfi_timing_mode_default; | ||
795 | }; | 807 | }; |
796 | 808 | ||
797 | /** | 809 | /** |