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-rw-r--r--include/linux/mtd/nand.h433
1 files changed, 272 insertions, 161 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 102e12c58cb3..c2b9ac4fbc4a 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -27,15 +27,17 @@
27struct mtd_info; 27struct mtd_info;
28struct nand_flash_dev; 28struct nand_flash_dev;
29/* Scan and identify a NAND device */ 29/* Scan and identify a NAND device */
30extern int nand_scan (struct mtd_info *mtd, int max_chips); 30extern int nand_scan(struct mtd_info *mtd, int max_chips);
31/* Separate phases of nand_scan(), allowing board driver to intervene 31/*
32 * and override command or ECC setup according to flash type */ 32 * Separate phases of nand_scan(), allowing board driver to intervene
33 * and override command or ECC setup according to flash type.
34 */
33extern int nand_scan_ident(struct mtd_info *mtd, int max_chips, 35extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
34 struct nand_flash_dev *table); 36 struct nand_flash_dev *table);
35extern int nand_scan_tail(struct mtd_info *mtd); 37extern int nand_scan_tail(struct mtd_info *mtd);
36 38
37/* Free resources held by the NAND device */ 39/* Free resources held by the NAND device */
38extern void nand_release (struct mtd_info *mtd); 40extern void nand_release(struct mtd_info *mtd);
39 41
40/* Internal helper for board drivers which need to override command function */ 42/* Internal helper for board drivers which need to override command function */
41extern void nand_wait_ready(struct mtd_info *mtd); 43extern void nand_wait_ready(struct mtd_info *mtd);
@@ -49,12 +51,13 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
49/* The maximum number of NAND chips in an array */ 51/* The maximum number of NAND chips in an array */
50#define NAND_MAX_CHIPS 8 52#define NAND_MAX_CHIPS 8
51 53
52/* This constant declares the max. oobsize / page, which 54/*
55 * This constant declares the max. oobsize / page, which
53 * is supported now. If you add a chip with bigger oobsize/page 56 * is supported now. If you add a chip with bigger oobsize/page
54 * adjust this accordingly. 57 * adjust this accordingly.
55 */ 58 */
56#define NAND_MAX_OOBSIZE 256 59#define NAND_MAX_OOBSIZE 576
57#define NAND_MAX_PAGESIZE 4096 60#define NAND_MAX_PAGESIZE 8192
58 61
59/* 62/*
60 * Constants for hardware specific CLE/ALE/NCE function 63 * Constants for hardware specific CLE/ALE/NCE function
@@ -88,6 +91,7 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
88#define NAND_CMD_RNDIN 0x85 91#define NAND_CMD_RNDIN 0x85
89#define NAND_CMD_READID 0x90 92#define NAND_CMD_READID 0x90
90#define NAND_CMD_ERASE2 0xd0 93#define NAND_CMD_ERASE2 0xd0
94#define NAND_CMD_PARAM 0xec
91#define NAND_CMD_RESET 0xff 95#define NAND_CMD_RESET 0xff
92 96
93#define NAND_CMD_LOCK 0x2a 97#define NAND_CMD_LOCK 0x2a
@@ -136,6 +140,7 @@ typedef enum {
136 NAND_ECC_HW, 140 NAND_ECC_HW,
137 NAND_ECC_HW_SYNDROME, 141 NAND_ECC_HW_SYNDROME,
138 NAND_ECC_HW_OOB_FIRST, 142 NAND_ECC_HW_OOB_FIRST,
143 NAND_ECC_SOFT_BCH,
139} nand_ecc_modes_t; 144} nand_ecc_modes_t;
140 145
141/* 146/*
@@ -152,9 +157,10 @@ typedef enum {
152#define NAND_GET_DEVICE 0x80 157#define NAND_GET_DEVICE 0x80
153 158
154 159
155/* Option constants for bizarre disfunctionality and real 160/*
156* features 161 * Option constants for bizarre disfunctionality and real
157*/ 162 * features.
163 */
158/* Chip can not auto increment pages */ 164/* Chip can not auto increment pages */
159#define NAND_NO_AUTOINCR 0x00000001 165#define NAND_NO_AUTOINCR 0x00000001
160/* Buswitdh is 16 bit */ 166/* Buswitdh is 16 bit */
@@ -165,19 +171,27 @@ typedef enum {
165#define NAND_CACHEPRG 0x00000008 171#define NAND_CACHEPRG 0x00000008
166/* Chip has copy back function */ 172/* Chip has copy back function */
167#define NAND_COPYBACK 0x00000010 173#define NAND_COPYBACK 0x00000010
168/* AND Chip which has 4 banks and a confusing page / block 174/*
169 * assignment. See Renesas datasheet for further information */ 175 * AND Chip which has 4 banks and a confusing page / block
176 * assignment. See Renesas datasheet for further information.
177 */
170#define NAND_IS_AND 0x00000020 178#define NAND_IS_AND 0x00000020
171/* Chip has a array of 4 pages which can be read without 179/*
172 * additional ready /busy waits */ 180 * Chip has a array of 4 pages which can be read without
181 * additional ready /busy waits.
182 */
173#define NAND_4PAGE_ARRAY 0x00000040 183#define NAND_4PAGE_ARRAY 0x00000040
174/* Chip requires that BBT is periodically rewritten to prevent 184/*
185 * Chip requires that BBT is periodically rewritten to prevent
175 * bits from adjacent blocks from 'leaking' in altering data. 186 * bits from adjacent blocks from 'leaking' in altering data.
176 * This happens with the Renesas AG-AND chips, possibly others. */ 187 * This happens with the Renesas AG-AND chips, possibly others.
188 */
177#define BBT_AUTO_REFRESH 0x00000080 189#define BBT_AUTO_REFRESH 0x00000080
178/* Chip does not require ready check on read. True 190/*
191 * Chip does not require ready check on read. True
179 * for all large page devices, as they do not support 192 * for all large page devices, as they do not support
180 * autoincrement.*/ 193 * autoincrement.
194 */
181#define NAND_NO_READRDY 0x00000100 195#define NAND_NO_READRDY 0x00000100
182/* Chip does not allow subpage writes */ 196/* Chip does not allow subpage writes */
183#define NAND_NO_SUBPAGE_WRITE 0x00000200 197#define NAND_NO_SUBPAGE_WRITE 0x00000200
@@ -205,16 +219,27 @@ typedef enum {
205#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) 219#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
206 220
207/* Non chip related options */ 221/* Non chip related options */
208/* Use a flash based bad block table. This option is passed to the 222/*
209 * default bad block table function. */ 223 * Use a flash based bad block table. OOB identifier is saved in OOB area.
224 * This option is passed to the default bad block table function.
225 */
210#define NAND_USE_FLASH_BBT 0x00010000 226#define NAND_USE_FLASH_BBT 0x00010000
211/* This option skips the bbt scan during initialization. */ 227/* This option skips the bbt scan during initialization. */
212#define NAND_SKIP_BBTSCAN 0x00020000 228#define NAND_SKIP_BBTSCAN 0x00020000
213/* This option is defined if the board driver allocates its own buffers 229/*
214 (e.g. because it needs them DMA-coherent */ 230 * This option is defined if the board driver allocates its own buffers
231 * (e.g. because it needs them DMA-coherent).
232 */
215#define NAND_OWN_BUFFERS 0x00040000 233#define NAND_OWN_BUFFERS 0x00040000
216/* Chip may not exist, so silence any errors in scan */ 234/* Chip may not exist, so silence any errors in scan */
217#define NAND_SCAN_SILENT_NODEV 0x00080000 235#define NAND_SCAN_SILENT_NODEV 0x00080000
236/*
237 * If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
238 * the OOB area.
239 */
240#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
241/* Create an empty BBT with no vendor information if the BBT is available */
242#define NAND_CREATE_EMPTY_BBT 0x01000000
218 243
219/* Options set by nand scan */ 244/* Options set by nand scan */
220/* Nand scan has allocated controller struct */ 245/* Nand scan has allocated controller struct */
@@ -227,15 +252,80 @@ typedef enum {
227/* Keep gcc happy */ 252/* Keep gcc happy */
228struct nand_chip; 253struct nand_chip;
229 254
255struct nand_onfi_params {
256 /* rev info and features block */
257 /* 'O' 'N' 'F' 'I' */
258 u8 sig[4];
259 __le16 revision;
260 __le16 features;
261 __le16 opt_cmd;
262 u8 reserved[22];
263
264 /* manufacturer information block */
265 char manufacturer[12];
266 char model[20];
267 u8 jedec_id;
268 __le16 date_code;
269 u8 reserved2[13];
270
271 /* memory organization block */
272 __le32 byte_per_page;
273 __le16 spare_bytes_per_page;
274 __le32 data_bytes_per_ppage;
275 __le16 spare_bytes_per_ppage;
276 __le32 pages_per_block;
277 __le32 blocks_per_lun;
278 u8 lun_count;
279 u8 addr_cycles;
280 u8 bits_per_cell;
281 __le16 bb_per_lun;
282 __le16 block_endurance;
283 u8 guaranteed_good_blocks;
284 __le16 guaranteed_block_endurance;
285 u8 programs_per_page;
286 u8 ppage_attr;
287 u8 ecc_bits;
288 u8 interleaved_bits;
289 u8 interleaved_ops;
290 u8 reserved3[13];
291
292 /* electrical parameter block */
293 u8 io_pin_capacitance_max;
294 __le16 async_timing_mode;
295 __le16 program_cache_timing_mode;
296 __le16 t_prog;
297 __le16 t_bers;
298 __le16 t_r;
299 __le16 t_ccs;
300 __le16 src_sync_timing_mode;
301 __le16 src_ssync_features;
302 __le16 clk_pin_capacitance_typ;
303 __le16 io_pin_capacitance_typ;
304 __le16 input_pin_capacitance_typ;
305 u8 input_pin_capacitance_max;
306 u8 driver_strenght_support;
307 __le16 t_int_r;
308 __le16 t_ald;
309 u8 reserved4[7];
310
311 /* vendor */
312 u8 reserved5[90];
313
314 __le16 crc;
315} __attribute__((packed));
316
317#define ONFI_CRC_BASE 0x4F4E
318
230/** 319/**
231 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices 320 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
232 * @lock: protection lock 321 * @lock: protection lock
233 * @active: the mtd device which holds the controller currently 322 * @active: the mtd device which holds the controller currently
234 * @wq: wait queue to sleep on if a NAND operation is in progress 323 * @wq: wait queue to sleep on if a NAND operation is in
235 * used instead of the per chip wait queue when a hw controller is available 324 * progress used instead of the per chip wait queue
325 * when a hw controller is available.
236 */ 326 */
237struct nand_hw_control { 327struct nand_hw_control {
238 spinlock_t lock; 328 spinlock_t lock;
239 struct nand_chip *active; 329 struct nand_chip *active;
240 wait_queue_head_t wq; 330 wait_queue_head_t wq;
241}; 331};
@@ -250,57 +340,50 @@ struct nand_hw_control {
250 * @prepad: padding information for syndrome based ecc generators 340 * @prepad: padding information for syndrome based ecc generators
251 * @postpad: padding information for syndrome based ecc generators 341 * @postpad: padding information for syndrome based ecc generators
252 * @layout: ECC layout control struct pointer 342 * @layout: ECC layout control struct pointer
343 * @priv: pointer to private ecc control data
253 * @hwctl: function to control hardware ecc generator. Must only 344 * @hwctl: function to control hardware ecc generator. Must only
254 * be provided if an hardware ECC is available 345 * be provided if an hardware ECC is available
255 * @calculate: function for ecc calculation or readback from ecc hardware 346 * @calculate: function for ecc calculation or readback from ecc hardware
256 * @correct: function for ecc correction, matching to ecc generator (sw/hw) 347 * @correct: function for ecc correction, matching to ecc generator (sw/hw)
257 * @read_page_raw: function to read a raw page without ECC 348 * @read_page_raw: function to read a raw page without ECC
258 * @write_page_raw: function to write a raw page without ECC 349 * @write_page_raw: function to write a raw page without ECC
259 * @read_page: function to read a page according to the ecc generator requirements 350 * @read_page: function to read a page according to the ecc generator
351 * requirements.
260 * @read_subpage: function to read parts of the page covered by ECC. 352 * @read_subpage: function to read parts of the page covered by ECC.
261 * @write_page: function to write a page according to the ecc generator requirements 353 * @write_page: function to write a page according to the ecc generator
354 * requirements.
262 * @read_oob: function to read chip OOB data 355 * @read_oob: function to read chip OOB data
263 * @write_oob: function to write chip OOB data 356 * @write_oob: function to write chip OOB data
264 */ 357 */
265struct nand_ecc_ctrl { 358struct nand_ecc_ctrl {
266 nand_ecc_modes_t mode; 359 nand_ecc_modes_t mode;
267 int steps; 360 int steps;
268 int size; 361 int size;
269 int bytes; 362 int bytes;
270 int total; 363 int total;
271 int prepad; 364 int prepad;
272 int postpad; 365 int postpad;
273 struct nand_ecclayout *layout; 366 struct nand_ecclayout *layout;
274 void (*hwctl)(struct mtd_info *mtd, int mode); 367 void *priv;
275 int (*calculate)(struct mtd_info *mtd, 368 void (*hwctl)(struct mtd_info *mtd, int mode);
276 const uint8_t *dat, 369 int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
277 uint8_t *ecc_code); 370 uint8_t *ecc_code);
278 int (*correct)(struct mtd_info *mtd, uint8_t *dat, 371 int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,
279 uint8_t *read_ecc, 372 uint8_t *calc_ecc);
280 uint8_t *calc_ecc); 373 int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
281 int (*read_page_raw)(struct mtd_info *mtd, 374 uint8_t *buf, int page);
282 struct nand_chip *chip, 375 void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
283 uint8_t *buf, int page); 376 const uint8_t *buf);
284 void (*write_page_raw)(struct mtd_info *mtd, 377 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
285 struct nand_chip *chip, 378 uint8_t *buf, int page);
286 const uint8_t *buf); 379 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
287 int (*read_page)(struct mtd_info *mtd, 380 uint32_t offs, uint32_t len, uint8_t *buf);
288 struct nand_chip *chip, 381 void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
289 uint8_t *buf, int page); 382 const uint8_t *buf);
290 int (*read_subpage)(struct mtd_info *mtd, 383 int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
291 struct nand_chip *chip, 384 int sndcmd);
292 uint32_t offs, uint32_t len, 385 int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
293 uint8_t *buf); 386 int page);
294 void (*write_page)(struct mtd_info *mtd,
295 struct nand_chip *chip,
296 const uint8_t *buf);
297 int (*read_oob)(struct mtd_info *mtd,
298 struct nand_chip *chip,
299 int page,
300 int sndcmd);
301 int (*write_oob)(struct mtd_info *mtd,
302 struct nand_chip *chip,
303 int page);
304}; 387};
305 388
306/** 389/**
@@ -320,102 +403,134 @@ struct nand_buffers {
320 403
321/** 404/**
322 * struct nand_chip - NAND Private Flash Chip Data 405 * struct nand_chip - NAND Private Flash Chip Data
323 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device 406 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
324 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device 407 * flash device
408 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
409 * flash device.
325 * @read_byte: [REPLACEABLE] read one byte from the chip 410 * @read_byte: [REPLACEABLE] read one byte from the chip
326 * @read_word: [REPLACEABLE] read one word from the chip 411 * @read_word: [REPLACEABLE] read one word from the chip
327 * @write_buf: [REPLACEABLE] write data from the buffer to the chip 412 * @write_buf: [REPLACEABLE] write data from the buffer to the chip
328 * @read_buf: [REPLACEABLE] read data from the chip into the buffer 413 * @read_buf: [REPLACEABLE] read data from the chip into the buffer
329 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data 414 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
415 * data.
330 * @select_chip: [REPLACEABLE] select chip nr 416 * @select_chip: [REPLACEABLE] select chip nr
331 * @block_bad: [REPLACEABLE] check, if the block is bad 417 * @block_bad: [REPLACEABLE] check, if the block is bad
332 * @block_markbad: [REPLACEABLE] mark the block bad 418 * @block_markbad: [REPLACEABLE] mark the block bad
333 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling 419 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific function for controlling
334 * ALE/CLE/nCE. Also used to write command and address 420 * ALE/CLE/nCE. Also used to write command and address
335 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line 421 * @init_size: [BOARDSPECIFIC] hardwarespecific function for setting
336 * If set to NULL no access to ready/busy is available and the ready/busy information 422 * mtd->oobsize, mtd->writesize and so on.
337 * is read from the chip status register 423 * @id_data contains the 8 bytes values of NAND_CMD_READID.
338 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip 424 * Return with the bus width.
339 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready 425 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
426 * device ready/busy line. If set to NULL no access to
427 * ready/busy is available and the ready/busy information
428 * is read from the chip status register.
429 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
430 * commands to the chip.
431 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
432 * ready.
340 * @ecc: [BOARDSPECIFIC] ecc control ctructure 433 * @ecc: [BOARDSPECIFIC] ecc control ctructure
341 * @buffers: buffer structure for read/write 434 * @buffers: buffer structure for read/write
342 * @hwcontrol: platform-specific hardware control structure 435 * @hwcontrol: platform-specific hardware control structure
343 * @ops: oob operation operands 436 * @ops: oob operation operands
344 * @erase_cmd: [INTERN] erase command write function, selectable due to AND support 437 * @erase_cmd: [INTERN] erase command write function, selectable due
438 * to AND support.
345 * @scan_bbt: [REPLACEABLE] function to scan bad block table 439 * @scan_bbt: [REPLACEABLE] function to scan bad block table
346 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) 440 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
441 * data from array to read regs (tR).
347 * @state: [INTERN] the current state of the NAND device 442 * @state: [INTERN] the current state of the NAND device
348 * @oob_poi: poison value buffer 443 * @oob_poi: poison value buffer
349 * @page_shift: [INTERN] number of address bits in a page (column address bits) 444 * @page_shift: [INTERN] number of address bits in a page (column
445 * address bits).
350 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 446 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
351 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry 447 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
352 * @chip_shift: [INTERN] number of address bits in one chip 448 * @chip_shift: [INTERN] number of address bits in one chip
353 * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about 449 * @options: [BOARDSPECIFIC] various chip options. They can partly
354 * special functionality. See the defines for further explanation 450 * be set to inform nand_scan about special functionality.
355 * @badblockpos: [INTERN] position of the bad block marker in the oob area 451 * See the defines for further explanation.
452 * @badblockpos: [INTERN] position of the bad block marker in the oob
453 * area.
454 * @badblockbits: [INTERN] number of bits to left-shift the bad block
455 * number
356 * @cellinfo: [INTERN] MLC/multichip data from chip ident 456 * @cellinfo: [INTERN] MLC/multichip data from chip ident
357 * @numchips: [INTERN] number of physical chips 457 * @numchips: [INTERN] number of physical chips
358 * @chipsize: [INTERN] the size of one chip for multichip arrays 458 * @chipsize: [INTERN] the size of one chip for multichip arrays
359 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 459 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
360 * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf 460 * @pagebuf: [INTERN] holds the pagenumber which is currently in
461 * data_buf.
361 * @subpagesize: [INTERN] holds the subpagesize 462 * @subpagesize: [INTERN] holds the subpagesize
463 * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
464 * non 0 if ONFI supported.
465 * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
466 * supported, 0 otherwise.
362 * @ecclayout: [REPLACEABLE] the default ecc placement scheme 467 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
363 * @bbt: [INTERN] bad block table pointer 468 * @bbt: [INTERN] bad block table pointer
364 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup 469 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
470 * lookup.
365 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor 471 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
366 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan 472 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
367 * @controller: [REPLACEABLE] a pointer to a hardware controller structure 473 * bad block scan.
368 * which is shared among multiple independend devices 474 * @controller: [REPLACEABLE] a pointer to a hardware controller
475 * structure which is shared among multiple independend
476 * devices.
369 * @priv: [OPTIONAL] pointer to private chip date 477 * @priv: [OPTIONAL] pointer to private chip date
370 * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks 478 * @errstat: [OPTIONAL] hardware specific function to perform
371 * (determine if errors are correctable) 479 * additional error status checks (determine if errors are
480 * correctable).
372 * @write_page: [REPLACEABLE] High-level page write function 481 * @write_page: [REPLACEABLE] High-level page write function
373 */ 482 */
374 483
375struct nand_chip { 484struct nand_chip {
376 void __iomem *IO_ADDR_R; 485 void __iomem *IO_ADDR_R;
377 void __iomem *IO_ADDR_W; 486 void __iomem *IO_ADDR_W;
378 487
379 uint8_t (*read_byte)(struct mtd_info *mtd); 488 uint8_t (*read_byte)(struct mtd_info *mtd);
380 u16 (*read_word)(struct mtd_info *mtd); 489 u16 (*read_word)(struct mtd_info *mtd);
381 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 490 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
382 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 491 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
383 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 492 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
384 void (*select_chip)(struct mtd_info *mtd, int chip); 493 void (*select_chip)(struct mtd_info *mtd, int chip);
385 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 494 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
386 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 495 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
387 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 496 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
388 unsigned int ctrl); 497 int (*init_size)(struct mtd_info *mtd, struct nand_chip *this,
389 int (*dev_ready)(struct mtd_info *mtd); 498 u8 *id_data);
390 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 499 int (*dev_ready)(struct mtd_info *mtd);
391 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); 500 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
392 void (*erase_cmd)(struct mtd_info *mtd, int page); 501 int page_addr);
393 int (*scan_bbt)(struct mtd_info *mtd); 502 int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
394 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); 503 void (*erase_cmd)(struct mtd_info *mtd, int page);
395 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, 504 int (*scan_bbt)(struct mtd_info *mtd);
396 const uint8_t *buf, int page, int cached, int raw); 505 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
397 506 int status, int page);
398 int chip_delay; 507 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
399 unsigned int options; 508 const uint8_t *buf, int page, int cached, int raw);
400 509
401 int page_shift; 510 int chip_delay;
402 int phys_erase_shift; 511 unsigned int options;
403 int bbt_erase_shift; 512
404 int chip_shift; 513 int page_shift;
405 int numchips; 514 int phys_erase_shift;
406 uint64_t chipsize; 515 int bbt_erase_shift;
407 int pagemask; 516 int chip_shift;
408 int pagebuf; 517 int numchips;
409 int subpagesize; 518 uint64_t chipsize;
410 uint8_t cellinfo; 519 int pagemask;
411 int badblockpos; 520 int pagebuf;
412 int badblockbits; 521 int subpagesize;
413 522 uint8_t cellinfo;
414 flstate_t state; 523 int badblockpos;
415 524 int badblockbits;
416 uint8_t *oob_poi; 525
417 struct nand_hw_control *controller; 526 int onfi_version;
418 struct nand_ecclayout *ecclayout; 527 struct nand_onfi_params onfi_params;
528
529 flstate_t state;
530
531 uint8_t *oob_poi;
532 struct nand_hw_control *controller;
533 struct nand_ecclayout *ecclayout;
419 534
420 struct nand_ecc_ctrl ecc; 535 struct nand_ecc_ctrl ecc;
421 struct nand_buffers *buffers; 536 struct nand_buffers *buffers;
@@ -423,13 +538,13 @@ struct nand_chip {
423 538
424 struct mtd_oob_ops ops; 539 struct mtd_oob_ops ops;
425 540
426 uint8_t *bbt; 541 uint8_t *bbt;
427 struct nand_bbt_descr *bbt_td; 542 struct nand_bbt_descr *bbt_td;
428 struct nand_bbt_descr *bbt_md; 543 struct nand_bbt_descr *bbt_md;
429 544
430 struct nand_bbt_descr *badblock_pattern; 545 struct nand_bbt_descr *badblock_pattern;
431 546
432 void *priv; 547 void *priv;
433}; 548};
434 549
435/* 550/*
@@ -473,7 +588,7 @@ struct nand_flash_dev {
473*/ 588*/
474struct nand_manufacturers { 589struct nand_manufacturers {
475 int id; 590 int id;
476 char * name; 591 char *name;
477}; 592};
478 593
479extern struct nand_flash_dev nand_flash_ids[]; 594extern struct nand_flash_dev nand_flash_ids[];
@@ -486,7 +601,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
486extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, 601extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
487 int allowbbt); 602 int allowbbt);
488extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, 603extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
489 size_t * retlen, uint8_t * buf); 604 size_t *retlen, uint8_t *buf);
490 605
491/** 606/**
492 * struct platform_nand_chip - chip level device structure 607 * struct platform_nand_chip - chip level device structure
@@ -502,17 +617,16 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
502 * @priv: hardware controller specific settings 617 * @priv: hardware controller specific settings
503 */ 618 */
504struct platform_nand_chip { 619struct platform_nand_chip {
505 int nr_chips; 620 int nr_chips;
506 int chip_offset; 621 int chip_offset;
507 int nr_partitions; 622 int nr_partitions;
508 struct mtd_partition *partitions; 623 struct mtd_partition *partitions;
509 struct nand_ecclayout *ecclayout; 624 struct nand_ecclayout *ecclayout;
510 int chip_delay; 625 int chip_delay;
511 unsigned int options; 626 unsigned int options;
512 const char **part_probe_types; 627 const char **part_probe_types;
513 void (*set_parts)(uint64_t size, 628 void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
514 struct platform_nand_chip *chip); 629 void *priv;
515 void *priv;
516}; 630};
517 631
518/* Keep gcc happy */ 632/* Keep gcc happy */
@@ -534,18 +648,15 @@ struct platform_device;
534 * All fields are optional and depend on the hardware driver requirements 648 * All fields are optional and depend on the hardware driver requirements
535 */ 649 */
536struct platform_nand_ctrl { 650struct platform_nand_ctrl {
537 int (*probe)(struct platform_device *pdev); 651 int (*probe)(struct platform_device *pdev);
538 void (*remove)(struct platform_device *pdev); 652 void (*remove)(struct platform_device *pdev);
539 void (*hwcontrol)(struct mtd_info *mtd, int cmd); 653 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
540 int (*dev_ready)(struct mtd_info *mtd); 654 int (*dev_ready)(struct mtd_info *mtd);
541 void (*select_chip)(struct mtd_info *mtd, int chip); 655 void (*select_chip)(struct mtd_info *mtd, int chip);
542 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 656 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
543 unsigned int ctrl); 657 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
544 void (*write_buf)(struct mtd_info *mtd, 658 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
545 const uint8_t *buf, int len); 659 void *priv;
546 void (*read_buf)(struct mtd_info *mtd,
547 uint8_t *buf, int len);
548 void *priv;
549}; 660};
550 661
551/** 662/**
@@ -554,8 +665,8 @@ struct platform_nand_ctrl {
554 * @ctrl: controller level device structure 665 * @ctrl: controller level device structure
555 */ 666 */
556struct platform_nand_data { 667struct platform_nand_data {
557 struct platform_nand_chip chip; 668 struct platform_nand_chip chip;
558 struct platform_nand_ctrl ctrl; 669 struct platform_nand_ctrl ctrl;
559}; 670};
560 671
561/* Some helpers to access the data structures */ 672/* Some helpers to access the data structures */