diff options
Diffstat (limited to 'include/linux/mtd/fsmc.h')
-rw-r--r-- | include/linux/mtd/fsmc.h | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h index 5d2556700ec2..6987995ad3cf 100644 --- a/include/linux/mtd/fsmc.h +++ b/include/linux/mtd/fsmc.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #ifndef __MTD_FSMC_H | 16 | #ifndef __MTD_FSMC_H |
17 | #define __MTD_FSMC_H | 17 | #define __MTD_FSMC_H |
18 | 18 | ||
19 | #include <linux/io.h> | ||
19 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
20 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
21 | #include <linux/types.h> | 22 | #include <linux/types.h> |
@@ -27,7 +28,7 @@ | |||
27 | 28 | ||
28 | /* | 29 | /* |
29 | * The placement of the Command Latch Enable (CLE) and | 30 | * The placement of the Command Latch Enable (CLE) and |
30 | * Address Latch Enable (ALE) is twised around in the | 31 | * Address Latch Enable (ALE) is twisted around in the |
31 | * SPEAR310 implementation. | 32 | * SPEAR310 implementation. |
32 | */ | 33 | */ |
33 | #if defined(CONFIG_MACH_SPEAR310) | 34 | #if defined(CONFIG_MACH_SPEAR310) |
@@ -62,7 +63,7 @@ struct fsmc_nor_bank_regs { | |||
62 | 63 | ||
63 | /* ctrl_tim register definitions */ | 64 | /* ctrl_tim register definitions */ |
64 | 65 | ||
65 | struct fsms_nand_bank_regs { | 66 | struct fsmc_nand_bank_regs { |
66 | uint32_t pc; | 67 | uint32_t pc; |
67 | uint32_t sts; | 68 | uint32_t sts; |
68 | uint32_t comm; | 69 | uint32_t comm; |
@@ -78,7 +79,7 @@ struct fsms_nand_bank_regs { | |||
78 | struct fsmc_regs { | 79 | struct fsmc_regs { |
79 | struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS]; | 80 | struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS]; |
80 | uint8_t reserved_1[0x40 - 0x20]; | 81 | uint8_t reserved_1[0x40 - 0x20]; |
81 | struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS]; | 82 | struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS]; |
82 | uint8_t reserved_2[0xfe0 - 0xc0]; | 83 | uint8_t reserved_2[0xfe0 - 0xc0]; |
83 | uint32_t peripid0; /* 0xfe0 */ | 84 | uint32_t peripid0; /* 0xfe0 */ |
84 | uint32_t peripid1; /* 0xfe4 */ | 85 | uint32_t peripid1; /* 0xfe4 */ |
@@ -114,25 +115,6 @@ struct fsmc_regs { | |||
114 | #define FSMC_THOLD_4 (4 << 16) | 115 | #define FSMC_THOLD_4 (4 << 16) |
115 | #define FSMC_THIZ_1 (1 << 24) | 116 | #define FSMC_THIZ_1 (1 << 24) |
116 | 117 | ||
117 | /* peripid2 register definitions */ | ||
118 | #define FSMC_REVISION_MSK (0xf) | ||
119 | #define FSMC_REVISION_SHFT (0x4) | ||
120 | |||
121 | #define FSMC_VER1 1 | ||
122 | #define FSMC_VER2 2 | ||
123 | #define FSMC_VER3 3 | ||
124 | #define FSMC_VER4 4 | ||
125 | #define FSMC_VER5 5 | ||
126 | #define FSMC_VER6 6 | ||
127 | #define FSMC_VER7 7 | ||
128 | #define FSMC_VER8 8 | ||
129 | |||
130 | static inline uint32_t get_fsmc_version(struct fsmc_regs *regs) | ||
131 | { | ||
132 | return (readl(®s->peripid2) >> FSMC_REVISION_SHFT) & | ||
133 | FSMC_REVISION_MSK; | ||
134 | } | ||
135 | |||
136 | /* | 118 | /* |
137 | * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 | 119 | * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 |
138 | * and it has to be read consecutively and immediately after the 512 | 120 | * and it has to be read consecutively and immediately after the 512 |