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Diffstat (limited to 'include/linux/mmc/sdhci.h')
-rw-r--r--include/linux/mmc/sdhci.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 83bd9f76709a..6a68c4eb4e44 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -85,6 +85,8 @@ struct sdhci_host {
85#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) 85#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29)
86/* Controller treats ADMA descriptors with length 0000h incorrectly */ 86/* Controller treats ADMA descriptors with length 0000h incorrectly */
87#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30) 87#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30)
88/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
89#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1<<31)
88 90
89 int irq; /* Device IRQ */ 91 int irq; /* Device IRQ */
90 void __iomem *ioaddr; /* Mapped address */ 92 void __iomem *ioaddr; /* Mapped address */
@@ -109,11 +111,16 @@ struct sdhci_host {
109#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */ 111#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */
110#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */ 112#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
111#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */ 113#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
114#define SDHCI_SDR50_NEEDS_TUNING (1<<4) /* SDR50 needs tuning */
115#define SDHCI_NEEDS_RETUNING (1<<5) /* Host needs retuning */
116#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
117#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
112 118
113 unsigned int version; /* SDHCI spec. version */ 119 unsigned int version; /* SDHCI spec. version */
114 120
115 unsigned int max_clk; /* Max possible freq (MHz) */ 121 unsigned int max_clk; /* Max possible freq (MHz) */
116 unsigned int timeout_clk; /* Timeout freq (KHz) */ 122 unsigned int timeout_clk; /* Timeout freq (KHz) */
123 unsigned int clk_mul; /* Clock Muliplier value */
117 124
118 unsigned int clock; /* Current clock (MHz) */ 125 unsigned int clock; /* Current clock (MHz) */
119 u8 pwr; /* Current voltage */ 126 u8 pwr; /* Current voltage */
@@ -145,6 +152,14 @@ struct sdhci_host {
145 unsigned int ocr_avail_sd; 152 unsigned int ocr_avail_sd;
146 unsigned int ocr_avail_mmc; 153 unsigned int ocr_avail_mmc;
147 154
155 wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
156 unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
157
158 unsigned int tuning_count; /* Timer count for re-tuning */
159 unsigned int tuning_mode; /* Re-tuning mode supported by host */
160#define SDHCI_TUNING_MODE_1 0
161 struct timer_list tuning_timer; /* Timer for tuning */
162
148 unsigned long private[0] ____cacheline_aligned; 163 unsigned long private[0] ____cacheline_aligned;
149}; 164};
150#endif /* __SDHCI_H */ 165#endif /* __SDHCI_H */