4 files changed, 86 insertions, 11 deletions

diff --git a/include/linux/mlx5/cq.h b/include/linux/mlx5/cq.h
index 3db67f73d96d..2202c7f72b75 100644
--- a/include/linux/mlx5/cq.h
+++ b/include/linux/mlx5/cq.h
@@ -79,15 +79,23 @@ enum {
         MLX5_CQE_RESP_SEND      = 2,
         MLX5_CQE_RESP_SEND_IMM  = 3,
         MLX5_CQE_RESP_SEND_INV  = 4,
-        MLX5_CQE_RESIZE_CQ      = 0xff, /* TBD */
+        MLX5_CQE_RESIZE_CQ      = 5,
         MLX5_CQE_REQ_ERR        = 13,
         MLX5_CQE_RESP_ERR       = 14,
+        MLX5_CQE_INVALID        = 15,
 };
 
 enum {
-        MLX5_CQ_MODIFY_RESEIZE = 0,
-        MLX5_CQ_MODIFY_MODER = 1,
-        MLX5_CQ_MODIFY_MAPPING = 2,
+        MLX5_CQ_MODIFY_PERIOD   = 1 << 0,
+        MLX5_CQ_MODIFY_COUNT    = 1 << 1,
+        MLX5_CQ_MODIFY_OVERRUN  = 1 << 2,
+};
+
+enum {
+        MLX5_CQ_OPMOD_RESIZE            = 1,
+        MLX5_MODIFY_CQ_MASK_LOG_SIZE    = 1 << 0,
+        MLX5_MODIFY_CQ_MASK_PG_OFFSET   = 1 << 1,
+        MLX5_MODIFY_CQ_MASK_PG_SIZE     = 1 << 2,
 };
 
 struct mlx5_cq_modify_params {
@@ -158,7 +166,7 @@ int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
 int mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
                        struct mlx5_query_cq_mbox_out *out);
 int mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
-                        int type, struct mlx5_cq_modify_params *params);
+                        struct mlx5_modify_cq_mbox_in *in, int in_sz);
 int mlx5_debug_cq_add(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
 void mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
 
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index da78875807fc..817a6fae6d2c 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -104,9 +104,10 @@ enum {
 };
 
 enum {
-        MLX5_BF_REGS_PER_PAGE   = 4,
-        MLX5_MAX_UAR_PAGES      = 1 << 8,
-        MLX5_MAX_UUARS          = MLX5_MAX_UAR_PAGES * MLX5_BF_REGS_PER_PAGE,
+        MLX5_BF_REGS_PER_PAGE           = 4,
+        MLX5_MAX_UAR_PAGES              = 1 << 8,
+        MLX5_NON_FP_BF_REGS_PER_PAGE    = 2,
+        MLX5_MAX_UUARS  = MLX5_MAX_UAR_PAGES * MLX5_NON_FP_BF_REGS_PER_PAGE,
 };
 
 enum {
@@ -176,6 +177,8 @@ enum {
         MLX5_DEV_CAP_FLAG_APM           = 1LL << 17,
         MLX5_DEV_CAP_FLAG_ATOMIC        = 1LL << 18,
         MLX5_DEV_CAP_FLAG_ON_DMND_PG    = 1LL << 24,
+        MLX5_DEV_CAP_FLAG_CQ_MODER      = 1LL << 29,
+        MLX5_DEV_CAP_FLAG_RESIZE_CQ     = 1LL << 30,
         MLX5_DEV_CAP_FLAG_RESIZE_SRQ    = 1LL << 32,
         MLX5_DEV_CAP_FLAG_REMOTE_FENCE  = 1LL << 38,
         MLX5_DEV_CAP_FLAG_TLP_HINTS     = 1LL << 39,
@@ -231,7 +234,8 @@ enum {
 };
 
 enum {
-        MLX5_ADAPTER_PAGE_SHIFT         = 12
+        MLX5_ADAPTER_PAGE_SHIFT         = 12,
+        MLX5_ADAPTER_PAGE_SIZE          = 1 << MLX5_ADAPTER_PAGE_SHIFT,
 };
 
 enum {
@@ -697,6 +701,20 @@ struct mlx5_query_cq_mbox_out {
         __be64                  pas[0];
 };
 
+struct mlx5_modify_cq_mbox_in {
+        struct mlx5_inbox_hdr   hdr;
+        __be32                  cqn;
+        __be32                  field_select;
+        struct mlx5_cq_context  ctx;
+        u8                      rsvd[192];
+        __be64                  pas[0];
+};
+
+struct mlx5_modify_cq_mbox_out {
+        struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
+};
+
 struct mlx5_enable_hca_mbox_in {
         struct mlx5_inbox_hdr   hdr;
         u8                      rsvd[8];
@@ -831,8 +849,8 @@ struct mlx5_create_mkey_mbox_in {
         struct mlx5_mkey_seg    seg;
         u8                      rsvd1[16];
         __be32                  xlat_oct_act_size;
-        __be32                  bsf_coto_act_size;
-        u8                      rsvd2[168];
+        __be32                  rsvd2;
+        u8                      rsvd3[168];
         __be64                  pas[0];
 };
 
@@ -871,6 +889,7 @@ struct mlx5_modify_mkey_mbox_in {
 
 struct mlx5_modify_mkey_mbox_out {
         struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
 };
 
 struct mlx5_dump_mkey_mbox_in {
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 554548cd3dd4..130bc8d77fa5 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -38,8 +38,10 @@
 #include <linux/pci.h>
 #include <linux/spinlock_types.h>
 #include <linux/semaphore.h>
+#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/radix-tree.h>
+
 #include <linux/mlx5/device.h>
 #include <linux/mlx5/doorbell.h>
 
@@ -227,6 +229,7 @@ struct mlx5_uuar_info {
          * protect uuar allocation data structs
          */
         struct mutex            lock;
+        u32                     ver;
 };
 
 struct mlx5_bf {
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index d9e3eacb3a7f..d51eff713549 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -464,4 +464,49 @@ void mlx5_cleanup_qp_table(struct mlx5_core_dev *dev);
 int mlx5_debug_qp_add(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
 void mlx5_debug_qp_remove(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
 
+static inline const char *mlx5_qp_type_str(int type)
+{
+        switch (type) {
+        case MLX5_QP_ST_RC: return "RC";
+        case MLX5_QP_ST_UC: return "C";
+        case MLX5_QP_ST_UD: return "UD";
+        case MLX5_QP_ST_XRC: return "XRC";
+        case MLX5_QP_ST_MLX: return "MLX";
+        case MLX5_QP_ST_QP0: return "QP0";
+        case MLX5_QP_ST_QP1: return "QP1";
+        case MLX5_QP_ST_RAW_ETHERTYPE: return "RAW_ETHERTYPE";
+        case MLX5_QP_ST_RAW_IPV6: return "RAW_IPV6";
+        case MLX5_QP_ST_SNIFFER: return "SNIFFER";
+        case MLX5_QP_ST_SYNC_UMR: return "SYNC_UMR";
+        case MLX5_QP_ST_PTP_1588: return "PTP_1588";
+        case MLX5_QP_ST_REG_UMR: return "REG_UMR";
+        default: return "Invalid transport type";
+        }
+}
+
+static inline const char *mlx5_qp_state_str(int state)
+{
+        switch (state) {
+        case MLX5_QP_STATE_RST:
+        return "RST";
+        case MLX5_QP_STATE_INIT:
+        return "INIT";
+        case MLX5_QP_STATE_RTR:
+        return "RTR";
+        case MLX5_QP_STATE_RTS:
+        return "RTS";
+        case MLX5_QP_STATE_SQER:
+        return "SQER";
+        case MLX5_QP_STATE_SQD:
+        return "SQD";
+        case MLX5_QP_STATE_ERR:
+        return "ERR";
+        case MLX5_QP_STATE_SQ_DRAINING:
+        return "SQ_DRAINING";
+        case MLX5_QP_STATE_SUSPENDED:
+        return "SUSPENDED";
+        default: return "Invalid QP state";
+        }
+}
+
 #endif /* MLX5_QP_H */