diff options
Diffstat (limited to 'include/linux/mlx5/driver.h')
| -rw-r--r-- | include/linux/mlx5/driver.h | 118 |
1 files changed, 39 insertions, 79 deletions
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h index b88e9b46d957..246310dc8bef 100644 --- a/include/linux/mlx5/driver.h +++ b/include/linux/mlx5/driver.h | |||
| @@ -44,6 +44,7 @@ | |||
| 44 | 44 | ||
| 45 | #include <linux/mlx5/device.h> | 45 | #include <linux/mlx5/device.h> |
| 46 | #include <linux/mlx5/doorbell.h> | 46 | #include <linux/mlx5/doorbell.h> |
| 47 | #include <linux/mlx5/mlx5_ifc.h> | ||
| 47 | 48 | ||
| 48 | enum { | 49 | enum { |
| 49 | MLX5_BOARD_ID_LEN = 64, | 50 | MLX5_BOARD_ID_LEN = 64, |
| @@ -99,81 +100,6 @@ enum { | |||
| 99 | }; | 100 | }; |
| 100 | 101 | ||
| 101 | enum { | 102 | enum { |
| 102 | MLX5_CMD_OP_QUERY_HCA_CAP = 0x100, | ||
| 103 | MLX5_CMD_OP_QUERY_ADAPTER = 0x101, | ||
| 104 | MLX5_CMD_OP_INIT_HCA = 0x102, | ||
| 105 | MLX5_CMD_OP_TEARDOWN_HCA = 0x103, | ||
| 106 | MLX5_CMD_OP_ENABLE_HCA = 0x104, | ||
| 107 | MLX5_CMD_OP_DISABLE_HCA = 0x105, | ||
| 108 | MLX5_CMD_OP_QUERY_PAGES = 0x107, | ||
| 109 | MLX5_CMD_OP_MANAGE_PAGES = 0x108, | ||
| 110 | MLX5_CMD_OP_SET_HCA_CAP = 0x109, | ||
| 111 | |||
| 112 | MLX5_CMD_OP_CREATE_MKEY = 0x200, | ||
| 113 | MLX5_CMD_OP_QUERY_MKEY = 0x201, | ||
| 114 | MLX5_CMD_OP_DESTROY_MKEY = 0x202, | ||
| 115 | MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203, | ||
| 116 | |||
| 117 | MLX5_CMD_OP_CREATE_EQ = 0x301, | ||
| 118 | MLX5_CMD_OP_DESTROY_EQ = 0x302, | ||
| 119 | MLX5_CMD_OP_QUERY_EQ = 0x303, | ||
| 120 | |||
| 121 | MLX5_CMD_OP_CREATE_CQ = 0x400, | ||
| 122 | MLX5_CMD_OP_DESTROY_CQ = 0x401, | ||
| 123 | MLX5_CMD_OP_QUERY_CQ = 0x402, | ||
| 124 | MLX5_CMD_OP_MODIFY_CQ = 0x403, | ||
| 125 | |||
| 126 | MLX5_CMD_OP_CREATE_QP = 0x500, | ||
| 127 | MLX5_CMD_OP_DESTROY_QP = 0x501, | ||
| 128 | MLX5_CMD_OP_RST2INIT_QP = 0x502, | ||
| 129 | MLX5_CMD_OP_INIT2RTR_QP = 0x503, | ||
| 130 | MLX5_CMD_OP_RTR2RTS_QP = 0x504, | ||
| 131 | MLX5_CMD_OP_RTS2RTS_QP = 0x505, | ||
| 132 | MLX5_CMD_OP_SQERR2RTS_QP = 0x506, | ||
| 133 | MLX5_CMD_OP_2ERR_QP = 0x507, | ||
| 134 | MLX5_CMD_OP_RTS2SQD_QP = 0x508, | ||
| 135 | MLX5_CMD_OP_SQD2RTS_QP = 0x509, | ||
| 136 | MLX5_CMD_OP_2RST_QP = 0x50a, | ||
| 137 | MLX5_CMD_OP_QUERY_QP = 0x50b, | ||
| 138 | MLX5_CMD_OP_CONF_SQP = 0x50c, | ||
| 139 | MLX5_CMD_OP_MAD_IFC = 0x50d, | ||
| 140 | MLX5_CMD_OP_INIT2INIT_QP = 0x50e, | ||
| 141 | MLX5_CMD_OP_SUSPEND_QP = 0x50f, | ||
| 142 | MLX5_CMD_OP_UNSUSPEND_QP = 0x510, | ||
| 143 | MLX5_CMD_OP_SQD2SQD_QP = 0x511, | ||
| 144 | MLX5_CMD_OP_ALLOC_QP_COUNTER_SET = 0x512, | ||
| 145 | MLX5_CMD_OP_DEALLOC_QP_COUNTER_SET = 0x513, | ||
| 146 | MLX5_CMD_OP_QUERY_QP_COUNTER_SET = 0x514, | ||
| 147 | |||
| 148 | MLX5_CMD_OP_CREATE_PSV = 0x600, | ||
| 149 | MLX5_CMD_OP_DESTROY_PSV = 0x601, | ||
| 150 | MLX5_CMD_OP_QUERY_PSV = 0x602, | ||
| 151 | MLX5_CMD_OP_QUERY_SIG_RULE_TABLE = 0x603, | ||
| 152 | MLX5_CMD_OP_QUERY_BLOCK_SIZE_TABLE = 0x604, | ||
| 153 | |||
| 154 | MLX5_CMD_OP_CREATE_SRQ = 0x700, | ||
| 155 | MLX5_CMD_OP_DESTROY_SRQ = 0x701, | ||
| 156 | MLX5_CMD_OP_QUERY_SRQ = 0x702, | ||
| 157 | MLX5_CMD_OP_ARM_RQ = 0x703, | ||
| 158 | MLX5_CMD_OP_RESIZE_SRQ = 0x704, | ||
| 159 | |||
| 160 | MLX5_CMD_OP_ALLOC_PD = 0x800, | ||
| 161 | MLX5_CMD_OP_DEALLOC_PD = 0x801, | ||
| 162 | MLX5_CMD_OP_ALLOC_UAR = 0x802, | ||
| 163 | MLX5_CMD_OP_DEALLOC_UAR = 0x803, | ||
| 164 | |||
| 165 | MLX5_CMD_OP_ATTACH_TO_MCG = 0x806, | ||
| 166 | MLX5_CMD_OP_DETACH_FROM_MCG = 0x807, | ||
| 167 | |||
| 168 | |||
| 169 | MLX5_CMD_OP_ALLOC_XRCD = 0x80e, | ||
| 170 | MLX5_CMD_OP_DEALLOC_XRCD = 0x80f, | ||
| 171 | |||
| 172 | MLX5_CMD_OP_ACCESS_REG = 0x805, | ||
| 173 | MLX5_CMD_OP_MAX = 0x810, | ||
| 174 | }; | ||
| 175 | |||
| 176 | enum { | ||
| 177 | MLX5_REG_PCAP = 0x5001, | 103 | MLX5_REG_PCAP = 0x5001, |
| 178 | MLX5_REG_PMTU = 0x5003, | 104 | MLX5_REG_PMTU = 0x5003, |
| 179 | MLX5_REG_PTYS = 0x5004, | 105 | MLX5_REG_PTYS = 0x5004, |
| @@ -335,23 +261,30 @@ struct mlx5_port_caps { | |||
| 335 | int pkey_table_len; | 261 | int pkey_table_len; |
| 336 | }; | 262 | }; |
| 337 | 263 | ||
| 338 | struct mlx5_caps { | 264 | struct mlx5_general_caps { |
| 339 | u8 log_max_eq; | 265 | u8 log_max_eq; |
| 340 | u8 log_max_cq; | 266 | u8 log_max_cq; |
| 341 | u8 log_max_qp; | 267 | u8 log_max_qp; |
| 342 | u8 log_max_mkey; | 268 | u8 log_max_mkey; |
| 343 | u8 log_max_pd; | 269 | u8 log_max_pd; |
| 344 | u8 log_max_srq; | 270 | u8 log_max_srq; |
| 271 | u8 log_max_strq; | ||
| 272 | u8 log_max_mrw_sz; | ||
| 273 | u8 log_max_bsf_list_size; | ||
| 274 | u8 log_max_klm_list_size; | ||
| 345 | u32 max_cqes; | 275 | u32 max_cqes; |
| 346 | int max_wqes; | 276 | int max_wqes; |
| 277 | u32 max_eqes; | ||
| 278 | u32 max_indirection; | ||
| 347 | int max_sq_desc_sz; | 279 | int max_sq_desc_sz; |
| 348 | int max_rq_desc_sz; | 280 | int max_rq_desc_sz; |
| 281 | int max_dc_sq_desc_sz; | ||
| 349 | u64 flags; | 282 | u64 flags; |
| 350 | u16 stat_rate_support; | 283 | u16 stat_rate_support; |
| 351 | int log_max_msg; | 284 | int log_max_msg; |
| 352 | int num_ports; | 285 | int num_ports; |
| 353 | int max_ra_res_qp; | 286 | u8 log_max_ra_res_qp; |
| 354 | int max_ra_req_qp; | 287 | u8 log_max_ra_req_qp; |
| 355 | int max_srq_wqes; | 288 | int max_srq_wqes; |
| 356 | int bf_reg_size; | 289 | int bf_reg_size; |
| 357 | int bf_regs_per_page; | 290 | int bf_regs_per_page; |
| @@ -363,6 +296,19 @@ struct mlx5_caps { | |||
| 363 | u8 log_max_mcg; | 296 | u8 log_max_mcg; |
| 364 | u32 max_qp_mcg; | 297 | u32 max_qp_mcg; |
| 365 | int min_page_sz; | 298 | int min_page_sz; |
| 299 | int pd_cap; | ||
| 300 | u32 max_qp_counters; | ||
| 301 | u32 pkey_table_size; | ||
| 302 | u8 log_max_ra_req_dc; | ||
| 303 | u8 log_max_ra_res_dc; | ||
| 304 | u32 uar_sz; | ||
| 305 | u8 min_log_pg_sz; | ||
| 306 | u8 log_max_xrcd; | ||
| 307 | u16 log_uar_page_sz; | ||
| 308 | }; | ||
| 309 | |||
| 310 | struct mlx5_caps { | ||
| 311 | struct mlx5_general_caps gen; | ||
| 366 | }; | 312 | }; |
| 367 | 313 | ||
| 368 | struct mlx5_cmd_mailbox { | 314 | struct mlx5_cmd_mailbox { |
| @@ -429,6 +375,16 @@ struct mlx5_core_mr { | |||
| 429 | u32 pd; | 375 | u32 pd; |
| 430 | }; | 376 | }; |
| 431 | 377 | ||
| 378 | enum mlx5_res_type { | ||
| 379 | MLX5_RES_QP, | ||
| 380 | }; | ||
| 381 | |||
| 382 | struct mlx5_core_rsc_common { | ||
| 383 | enum mlx5_res_type res; | ||
| 384 | atomic_t refcount; | ||
| 385 | struct completion free; | ||
| 386 | }; | ||
| 387 | |||
| 432 | struct mlx5_core_srq { | 388 | struct mlx5_core_srq { |
| 433 | u32 srqn; | 389 | u32 srqn; |
| 434 | int max; | 390 | int max; |
| @@ -695,6 +651,9 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev); | |||
| 695 | void mlx5_cmd_use_events(struct mlx5_core_dev *dev); | 651 | void mlx5_cmd_use_events(struct mlx5_core_dev *dev); |
| 696 | void mlx5_cmd_use_polling(struct mlx5_core_dev *dev); | 652 | void mlx5_cmd_use_polling(struct mlx5_core_dev *dev); |
| 697 | int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr); | 653 | int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr); |
| 654 | int mlx5_cmd_status_to_err_v2(void *ptr); | ||
| 655 | int mlx5_core_get_caps(struct mlx5_core_dev *dev, struct mlx5_caps *caps, | ||
| 656 | u16 opmod); | ||
| 698 | int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out, | 657 | int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out, |
| 699 | int out_size); | 658 | int out_size); |
| 700 | int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size, | 659 | int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size, |
| @@ -751,7 +710,7 @@ int mlx5_eq_init(struct mlx5_core_dev *dev); | |||
| 751 | void mlx5_eq_cleanup(struct mlx5_core_dev *dev); | 710 | void mlx5_eq_cleanup(struct mlx5_core_dev *dev); |
| 752 | void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas); | 711 | void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas); |
| 753 | void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn); | 712 | void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn); |
| 754 | void mlx5_qp_event(struct mlx5_core_dev *dev, u32 qpn, int event_type); | 713 | void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type); |
| 755 | void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type); | 714 | void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type); |
| 756 | struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); | 715 | struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); |
| 757 | void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, unsigned long vector); | 716 | void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, unsigned long vector); |
| @@ -788,6 +747,7 @@ void mlx5_cmdif_debugfs_cleanup(struct mlx5_core_dev *dev); | |||
| 788 | int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn, | 747 | int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn, |
| 789 | int npsvs, u32 *sig_index); | 748 | int npsvs, u32 *sig_index); |
| 790 | int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num); | 749 | int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num); |
| 750 | void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common); | ||
| 791 | 751 | ||
| 792 | static inline u32 mlx5_mkey_to_idx(u32 mkey) | 752 | static inline u32 mlx5_mkey_to_idx(u32 mkey) |
| 793 | { | 753 | { |
