diff options
Diffstat (limited to 'include/linux/mg_disk.h')
| -rw-r--r-- | include/linux/mg_disk.h | 173 |
1 files changed, 6 insertions, 167 deletions
diff --git a/include/linux/mg_disk.h b/include/linux/mg_disk.h index 1f76b1ebf627..e11f4d9f1c2e 100644 --- a/include/linux/mg_disk.h +++ b/include/linux/mg_disk.h | |||
| @@ -1,8 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * include/linux/mg_disk.c | 2 | * include/linux/mg_disk.c |
| 3 | * | 3 | * |
| 4 | * Support for the mGine m[g]flash IO mode. | 4 | * Private data for mflash platform driver |
| 5 | * Based on legacy hd.c | ||
| 6 | * | 5 | * |
| 7 | * (c) 2008 mGine Co.,LTD | 6 | * (c) 2008 mGine Co.,LTD |
| 8 | * (c) 2008 unsik Kim <donari75@gmail.com> | 7 | * (c) 2008 unsik Kim <donari75@gmail.com> |
| @@ -15,127 +14,13 @@ | |||
| 15 | #ifndef __MG_DISK_H__ | 14 | #ifndef __MG_DISK_H__ |
| 16 | #define __MG_DISK_H__ | 15 | #define __MG_DISK_H__ |
| 17 | 16 | ||
| 18 | #include <linux/blkdev.h> | ||
| 19 | #include <linux/ata.h> | ||
| 20 | |||
| 21 | /* name for block device */ | ||
| 22 | #define MG_DISK_NAME "mgd" | ||
| 23 | /* name for platform device */ | 17 | /* name for platform device */ |
| 24 | #define MG_DEV_NAME "mg_disk" | 18 | #define MG_DEV_NAME "mg_disk" |
| 25 | 19 | ||
| 26 | #define MG_DISK_MAJ 0 | 20 | /* names of GPIO resource */ |
| 27 | #define MG_DISK_MAX_PART 16 | 21 | #define MG_RST_PIN "mg_rst" |
| 28 | #define MG_SECTOR_SIZE 512 | 22 | /* except MG_BOOT_DEV, reset-out pin should be assigned */ |
| 29 | #define MG_MAX_SECTS 256 | 23 | #define MG_RSTOUT_PIN "mg_rstout" |
| 30 | |||
| 31 | /* Register offsets */ | ||
| 32 | #define MG_BUFF_OFFSET 0x8000 | ||
| 33 | #define MG_STORAGE_BUFFER_SIZE 0x200 | ||
| 34 | #define MG_REG_OFFSET 0xC000 | ||
| 35 | #define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */ | ||
| 36 | #define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */ | ||
| 37 | #define MG_REG_SECT_CNT (MG_REG_OFFSET + 4) | ||
| 38 | #define MG_REG_SECT_NUM (MG_REG_OFFSET + 6) | ||
| 39 | #define MG_REG_CYL_LOW (MG_REG_OFFSET + 8) | ||
| 40 | #define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA) | ||
| 41 | #define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC) | ||
| 42 | #define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */ | ||
| 43 | #define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */ | ||
| 44 | #define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10) | ||
| 45 | #define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12) | ||
| 46 | |||
| 47 | /* "Drive Select/Head Register" bit values */ | ||
| 48 | #define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */ | ||
| 49 | #define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON) | ||
| 50 | #define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON) | ||
| 51 | #define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON) | ||
| 52 | |||
| 53 | |||
| 54 | /* "Device Control Register" bit values */ | ||
| 55 | #define MG_REG_CTRL_INTR_ENABLE 0x0 | ||
| 56 | #define MG_REG_CTRL_INTR_DISABLE (0x1<<1) | ||
| 57 | #define MG_REG_CTRL_RESET (0x1<<2) | ||
| 58 | #define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0 | ||
| 59 | #define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4) | ||
| 60 | #define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0 | ||
| 61 | #define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5) | ||
| 62 | #define MG_REG_CTRL_DPD_DISABLE 0x0 | ||
| 63 | #define MG_REG_CTRL_DPD_ENABLE (0x1<<6) | ||
| 64 | |||
| 65 | /* Status register bit */ | ||
| 66 | /* error bit in status register */ | ||
| 67 | #define MG_REG_STATUS_BIT_ERROR 0x01 | ||
| 68 | /* corrected error in status register */ | ||
| 69 | #define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04 | ||
| 70 | /* data request bit in status register */ | ||
| 71 | #define MG_REG_STATUS_BIT_DATA_REQ 0x08 | ||
| 72 | /* DSC - Drive Seek Complete */ | ||
| 73 | #define MG_REG_STATUS_BIT_SEEK_DONE 0x10 | ||
| 74 | /* DWF - Drive Write Fault */ | ||
| 75 | #define MG_REG_STATUS_BIT_WRITE_FAULT 0x20 | ||
| 76 | #define MG_REG_STATUS_BIT_READY 0x40 | ||
| 77 | #define MG_REG_STATUS_BIT_BUSY 0x80 | ||
| 78 | |||
| 79 | /* handy status */ | ||
| 80 | #define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE) | ||
| 81 | #define MG_READY_OK(s) (((s) & (MG_STAT_READY | \ | ||
| 82 | (MG_REG_STATUS_BIT_BUSY | \ | ||
| 83 | MG_REG_STATUS_BIT_WRITE_FAULT | \ | ||
| 84 | MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY) | ||
| 85 | |||
| 86 | /* Error register */ | ||
| 87 | #define MG_REG_ERR_AMNF 0x01 | ||
| 88 | #define MG_REG_ERR_ABRT 0x04 | ||
| 89 | #define MG_REG_ERR_IDNF 0x10 | ||
| 90 | #define MG_REG_ERR_UNC 0x40 | ||
| 91 | #define MG_REG_ERR_BBK 0x80 | ||
| 92 | |||
| 93 | /* error code for others */ | ||
| 94 | #define MG_ERR_NONE 0 | ||
| 95 | #define MG_ERR_TIMEOUT 0x100 | ||
| 96 | #define MG_ERR_INIT_STAT 0x101 | ||
| 97 | #define MG_ERR_TRANSLATION 0x102 | ||
| 98 | #define MG_ERR_CTRL_RST 0x103 | ||
| 99 | #define MG_ERR_INV_STAT 0x104 | ||
| 100 | #define MG_ERR_RSTOUT 0x105 | ||
| 101 | |||
| 102 | #define MG_MAX_ERRORS 6 /* Max read/write errors */ | ||
| 103 | |||
| 104 | /* command */ | ||
| 105 | #define MG_CMD_RD 0x20 | ||
| 106 | #define MG_CMD_WR 0x30 | ||
| 107 | #define MG_CMD_SLEEP 0x99 | ||
| 108 | #define MG_CMD_WAKEUP 0xC3 | ||
| 109 | #define MG_CMD_ID 0xEC | ||
| 110 | #define MG_CMD_WR_CONF 0x3C | ||
| 111 | #define MG_CMD_RD_CONF 0x40 | ||
| 112 | |||
| 113 | /* operation mode */ | ||
| 114 | #define MG_OP_CASCADE (1 << 0) | ||
| 115 | #define MG_OP_CASCADE_SYNC_RD (1 << 1) | ||
| 116 | #define MG_OP_CASCADE_SYNC_WR (1 << 2) | ||
| 117 | #define MG_OP_INTERLEAVE (1 << 3) | ||
| 118 | |||
| 119 | /* synchronous */ | ||
| 120 | #define MG_BURST_LAT_4 (3 << 4) | ||
| 121 | #define MG_BURST_LAT_5 (4 << 4) | ||
| 122 | #define MG_BURST_LAT_6 (5 << 4) | ||
| 123 | #define MG_BURST_LAT_7 (6 << 4) | ||
| 124 | #define MG_BURST_LAT_8 (7 << 4) | ||
| 125 | #define MG_BURST_LEN_4 (1 << 1) | ||
| 126 | #define MG_BURST_LEN_8 (2 << 1) | ||
| 127 | #define MG_BURST_LEN_16 (3 << 1) | ||
| 128 | #define MG_BURST_LEN_32 (4 << 1) | ||
| 129 | #define MG_BURST_LEN_CONT (0 << 1) | ||
| 130 | |||
| 131 | /* timeout value (unit: ms) */ | ||
| 132 | #define MG_TMAX_CONF_TO_CMD 1 | ||
| 133 | #define MG_TMAX_WAIT_RD_DRQ 10 | ||
| 134 | #define MG_TMAX_WAIT_WR_DRQ 500 | ||
| 135 | #define MG_TMAX_RST_TO_BUSY 10 | ||
| 136 | #define MG_TMAX_HDRST_TO_RDY 500 | ||
| 137 | #define MG_TMAX_SWRST_TO_RDY 500 | ||
| 138 | #define MG_TMAX_RSTOUT 3000 | ||
| 139 | 24 | ||
| 140 | /* device attribution */ | 25 | /* device attribution */ |
| 141 | /* use mflash as boot device */ | 26 | /* use mflash as boot device */ |
| @@ -145,13 +30,6 @@ | |||
| 145 | /* same as MG_STORAGE_DEV, but bootloader already done reset sequence */ | 30 | /* same as MG_STORAGE_DEV, but bootloader already done reset sequence */ |
| 146 | #define MG_STORAGE_DEV_SKIP_RST (1 << 2) | 31 | #define MG_STORAGE_DEV_SKIP_RST (1 << 2) |
| 147 | 32 | ||
| 148 | #define MG_DEV_MASK (MG_BOOT_DEV | MG_STORAGE_DEV | MG_STORAGE_DEV_SKIP_RST) | ||
| 149 | |||
| 150 | /* names of GPIO resource */ | ||
| 151 | #define MG_RST_PIN "mg_rst" | ||
| 152 | /* except MG_BOOT_DEV, reset-out pin should be assigned */ | ||
| 153 | #define MG_RSTOUT_PIN "mg_rstout" | ||
| 154 | |||
| 155 | /* private driver data */ | 33 | /* private driver data */ |
| 156 | struct mg_drv_data { | 34 | struct mg_drv_data { |
| 157 | /* disk resource */ | 35 | /* disk resource */ |
| @@ -161,46 +39,7 @@ struct mg_drv_data { | |||
| 161 | u32 dev_attr; | 39 | u32 dev_attr; |
| 162 | 40 | ||
| 163 | /* internally used */ | 41 | /* internally used */ |
| 164 | struct mg_host *host; | 42 | void *host; |
| 165 | }; | 43 | }; |
| 166 | 44 | ||
| 167 | /* main structure for mflash driver */ | ||
| 168 | struct mg_host { | ||
| 169 | struct device *dev; | ||
| 170 | |||
| 171 | struct request_queue *breq; | ||
| 172 | spinlock_t lock; | ||
| 173 | struct gendisk *gd; | ||
| 174 | |||
| 175 | struct timer_list timer; | ||
| 176 | void (*mg_do_intr) (struct mg_host *); | ||
| 177 | |||
| 178 | u16 id[ATA_ID_WORDS]; | ||
| 179 | |||
| 180 | u16 cyls; | ||
| 181 | u16 heads; | ||
| 182 | u16 sectors; | ||
| 183 | u32 n_sectors; | ||
| 184 | u32 nres_sectors; | ||
| 185 | |||
| 186 | void __iomem *dev_base; | ||
| 187 | unsigned int irq; | ||
| 188 | unsigned int rst; | ||
| 189 | unsigned int rstout; | ||
| 190 | |||
| 191 | u32 major; | ||
| 192 | u32 error; | ||
| 193 | }; | ||
| 194 | |||
| 195 | /* | ||
| 196 | * Debugging macro and defines | ||
| 197 | */ | ||
| 198 | #undef DO_MG_DEBUG | ||
| 199 | #ifdef DO_MG_DEBUG | ||
| 200 | # define MG_DBG(fmt, args...) \ | ||
| 201 | printk(KERN_DEBUG "%s:%d "fmt, __func__, __LINE__, ##args) | ||
| 202 | #else /* CONFIG_MG_DEBUG */ | ||
| 203 | # define MG_DBG(fmt, args...) do { } while (0) | ||
| 204 | #endif /* CONFIG_MG_DEBUG */ | ||
| 205 | |||
| 206 | #endif | 45 | #endif |
