diff options
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/axp20x.h | 59 | ||||
| -rw-r--r-- | include/linux/mfd/samsung/core.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/samsung/s2mps13.h | 186 |
3 files changed, 247 insertions, 0 deletions
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index d0e31a2287ac..81589d176ae8 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h | |||
| @@ -14,6 +14,8 @@ | |||
| 14 | enum { | 14 | enum { |
| 15 | AXP202_ID = 0, | 15 | AXP202_ID = 0, |
| 16 | AXP209_ID, | 16 | AXP209_ID, |
| 17 | AXP288_ID, | ||
| 18 | NR_AXP20X_VARIANTS, | ||
| 17 | }; | 19 | }; |
| 18 | 20 | ||
| 19 | #define AXP20X_DATACACHE(m) (0x04 + (m)) | 21 | #define AXP20X_DATACACHE(m) (0x04 + (m)) |
| @@ -49,11 +51,13 @@ enum { | |||
| 49 | #define AXP20X_IRQ3_EN 0x42 | 51 | #define AXP20X_IRQ3_EN 0x42 |
| 50 | #define AXP20X_IRQ4_EN 0x43 | 52 | #define AXP20X_IRQ4_EN 0x43 |
| 51 | #define AXP20X_IRQ5_EN 0x44 | 53 | #define AXP20X_IRQ5_EN 0x44 |
| 54 | #define AXP20X_IRQ6_EN 0x45 | ||
| 52 | #define AXP20X_IRQ1_STATE 0x48 | 55 | #define AXP20X_IRQ1_STATE 0x48 |
| 53 | #define AXP20X_IRQ2_STATE 0x49 | 56 | #define AXP20X_IRQ2_STATE 0x49 |
| 54 | #define AXP20X_IRQ3_STATE 0x4a | 57 | #define AXP20X_IRQ3_STATE 0x4a |
| 55 | #define AXP20X_IRQ4_STATE 0x4b | 58 | #define AXP20X_IRQ4_STATE 0x4b |
| 56 | #define AXP20X_IRQ5_STATE 0x4c | 59 | #define AXP20X_IRQ5_STATE 0x4c |
| 60 | #define AXP20X_IRQ6_STATE 0x4d | ||
| 57 | 61 | ||
| 58 | /* ADC */ | 62 | /* ADC */ |
| 59 | #define AXP20X_ACIN_V_ADC_H 0x56 | 63 | #define AXP20X_ACIN_V_ADC_H 0x56 |
| @@ -116,6 +120,15 @@ enum { | |||
| 116 | #define AXP20X_CC_CTRL 0xb8 | 120 | #define AXP20X_CC_CTRL 0xb8 |
| 117 | #define AXP20X_FG_RES 0xb9 | 121 | #define AXP20X_FG_RES 0xb9 |
| 118 | 122 | ||
| 123 | /* AXP288 specific registers */ | ||
| 124 | #define AXP288_PMIC_ADC_H 0x56 | ||
| 125 | #define AXP288_PMIC_ADC_L 0x57 | ||
| 126 | #define AXP288_ADC_TS_PIN_CTRL 0x84 | ||
| 127 | |||
| 128 | #define AXP288_PMIC_ADC_EN 0x84 | ||
| 129 | #define AXP288_FG_TUNE5 0xed | ||
| 130 | |||
| 131 | |||
| 119 | /* Regulators IDs */ | 132 | /* Regulators IDs */ |
| 120 | enum { | 133 | enum { |
| 121 | AXP20X_LDO1 = 0, | 134 | AXP20X_LDO1 = 0, |
| @@ -169,12 +182,58 @@ enum { | |||
| 169 | AXP20X_IRQ_GPIO0_INPUT, | 182 | AXP20X_IRQ_GPIO0_INPUT, |
| 170 | }; | 183 | }; |
| 171 | 184 | ||
| 185 | enum axp288_irqs { | ||
| 186 | AXP288_IRQ_VBUS_FALL = 2, | ||
| 187 | AXP288_IRQ_VBUS_RISE, | ||
| 188 | AXP288_IRQ_OV, | ||
| 189 | AXP288_IRQ_FALLING_ALT, | ||
| 190 | AXP288_IRQ_RISING_ALT, | ||
| 191 | AXP288_IRQ_OV_ALT, | ||
| 192 | AXP288_IRQ_DONE = 10, | ||
| 193 | AXP288_IRQ_CHARGING, | ||
| 194 | AXP288_IRQ_SAFE_QUIT, | ||
| 195 | AXP288_IRQ_SAFE_ENTER, | ||
| 196 | AXP288_IRQ_ABSENT, | ||
| 197 | AXP288_IRQ_APPEND, | ||
| 198 | AXP288_IRQ_QWBTU, | ||
| 199 | AXP288_IRQ_WBTU, | ||
| 200 | AXP288_IRQ_QWBTO, | ||
| 201 | AXP288_IRQ_WBTO, | ||
| 202 | AXP288_IRQ_QCBTU, | ||
| 203 | AXP288_IRQ_CBTU, | ||
| 204 | AXP288_IRQ_QCBTO, | ||
| 205 | AXP288_IRQ_CBTO, | ||
| 206 | AXP288_IRQ_WL2, | ||
| 207 | AXP288_IRQ_WL1, | ||
| 208 | AXP288_IRQ_GPADC, | ||
| 209 | AXP288_IRQ_OT = 31, | ||
| 210 | AXP288_IRQ_GPIO0, | ||
| 211 | AXP288_IRQ_GPIO1, | ||
| 212 | AXP288_IRQ_POKO, | ||
| 213 | AXP288_IRQ_POKL, | ||
| 214 | AXP288_IRQ_POKS, | ||
| 215 | AXP288_IRQ_POKN, | ||
| 216 | AXP288_IRQ_POKP, | ||
| 217 | AXP288_IRQ_TIMER, | ||
| 218 | AXP288_IRQ_MV_CHNG, | ||
| 219 | AXP288_IRQ_BC_USB_CHNG, | ||
| 220 | }; | ||
| 221 | |||
| 222 | #define AXP288_TS_ADC_H 0x58 | ||
| 223 | #define AXP288_TS_ADC_L 0x59 | ||
| 224 | #define AXP288_GP_ADC_H 0x5a | ||
| 225 | #define AXP288_GP_ADC_L 0x5b | ||
| 226 | |||
| 172 | struct axp20x_dev { | 227 | struct axp20x_dev { |
| 173 | struct device *dev; | 228 | struct device *dev; |
| 174 | struct i2c_client *i2c_client; | 229 | struct i2c_client *i2c_client; |
| 175 | struct regmap *regmap; | 230 | struct regmap *regmap; |
| 176 | struct regmap_irq_chip_data *regmap_irqc; | 231 | struct regmap_irq_chip_data *regmap_irqc; |
| 177 | long variant; | 232 | long variant; |
| 233 | int nr_cells; | ||
| 234 | struct mfd_cell *cells; | ||
| 235 | const struct regmap_config *regmap_cfg; | ||
| 236 | const struct regmap_irq_chip *regmap_irq_chip; | ||
| 178 | }; | 237 | }; |
| 179 | 238 | ||
| 180 | #endif /* __LINUX_MFD_AXP20X_H */ | 239 | #endif /* __LINUX_MFD_AXP20X_H */ |
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 1825edacbda7..3fdb7cfbffb3 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #define MIN_800_MV 800000 | 28 | #define MIN_800_MV 800000 |
| 29 | #define MIN_750_MV 750000 | 29 | #define MIN_750_MV 750000 |
| 30 | #define MIN_600_MV 600000 | 30 | #define MIN_600_MV 600000 |
| 31 | #define MIN_500_MV 500000 | ||
| 31 | 32 | ||
| 32 | /* Macros to represent steps for LDO/BUCK */ | 33 | /* Macros to represent steps for LDO/BUCK */ |
| 33 | #define STEP_50_MV 50000 | 34 | #define STEP_50_MV 50000 |
| @@ -41,6 +42,7 @@ enum sec_device_type { | |||
| 41 | S5M8767X, | 42 | S5M8767X, |
| 42 | S2MPA01, | 43 | S2MPA01, |
| 43 | S2MPS11X, | 44 | S2MPS11X, |
| 45 | S2MPS13X, | ||
| 44 | S2MPS14X, | 46 | S2MPS14X, |
| 45 | S2MPU02, | 47 | S2MPU02, |
| 46 | }; | 48 | }; |
diff --git a/include/linux/mfd/samsung/s2mps13.h b/include/linux/mfd/samsung/s2mps13.h new file mode 100644 index 000000000000..ce5dda8958fe --- /dev/null +++ b/include/linux/mfd/samsung/s2mps13.h | |||
| @@ -0,0 +1,186 @@ | |||
| 1 | /* | ||
| 2 | * s2mps13.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2014 Samsung Electronics Co., Ltd | ||
| 5 | * http://www.samsung.com | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License as published by the | ||
| 9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 10 | * option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef __LINUX_MFD_S2MPS13_H | ||
| 20 | #define __LINUX_MFD_S2MPS13_H | ||
| 21 | |||
| 22 | /* S2MPS13 registers */ | ||
| 23 | enum s2mps13_reg { | ||
| 24 | S2MPS13_REG_ID, | ||
| 25 | S2MPS13_REG_INT1, | ||
| 26 | S2MPS13_REG_INT2, | ||
| 27 | S2MPS13_REG_INT3, | ||
| 28 | S2MPS13_REG_INT1M, | ||
| 29 | S2MPS13_REG_INT2M, | ||
| 30 | S2MPS13_REG_INT3M, | ||
| 31 | S2MPS13_REG_ST1, | ||
| 32 | S2MPS13_REG_ST2, | ||
| 33 | S2MPS13_REG_PWRONSRC, | ||
| 34 | S2MPS13_REG_OFFSRC, | ||
| 35 | S2MPS13_REG_BU_CHG, | ||
| 36 | S2MPS13_REG_RTCCTRL, | ||
| 37 | S2MPS13_REG_CTRL1, | ||
| 38 | S2MPS13_REG_CTRL2, | ||
| 39 | S2MPS13_REG_RSVD1, | ||
| 40 | S2MPS13_REG_RSVD2, | ||
| 41 | S2MPS13_REG_RSVD3, | ||
| 42 | S2MPS13_REG_RSVD4, | ||
| 43 | S2MPS13_REG_RSVD5, | ||
| 44 | S2MPS13_REG_RSVD6, | ||
| 45 | S2MPS13_REG_CTRL3, | ||
| 46 | S2MPS13_REG_RSVD7, | ||
| 47 | S2MPS13_REG_RSVD8, | ||
| 48 | S2MPS13_REG_WRSTBI, | ||
| 49 | S2MPS13_REG_B1CTRL, | ||
| 50 | S2MPS13_REG_B1OUT, | ||
| 51 | S2MPS13_REG_B2CTRL, | ||
| 52 | S2MPS13_REG_B2OUT, | ||
| 53 | S2MPS13_REG_B3CTRL, | ||
| 54 | S2MPS13_REG_B3OUT, | ||
| 55 | S2MPS13_REG_B4CTRL, | ||
| 56 | S2MPS13_REG_B4OUT, | ||
| 57 | S2MPS13_REG_B5CTRL, | ||
| 58 | S2MPS13_REG_B5OUT, | ||
| 59 | S2MPS13_REG_B6CTRL, | ||
| 60 | S2MPS13_REG_B6OUT, | ||
| 61 | S2MPS13_REG_B7CTRL, | ||
| 62 | S2MPS13_REG_B7OUT, | ||
| 63 | S2MPS13_REG_B8CTRL, | ||
| 64 | S2MPS13_REG_B8OUT, | ||
| 65 | S2MPS13_REG_B9CTRL, | ||
| 66 | S2MPS13_REG_B9OUT, | ||
| 67 | S2MPS13_REG_B10CTRL, | ||
| 68 | S2MPS13_REG_B10OUT, | ||
| 69 | S2MPS13_REG_BB1CTRL, | ||
| 70 | S2MPS13_REG_BB1OUT, | ||
| 71 | S2MPS13_REG_BUCK_RAMP1, | ||
| 72 | S2MPS13_REG_BUCK_RAMP2, | ||
| 73 | S2MPS13_REG_LDO_DVS1, | ||
| 74 | S2MPS13_REG_LDO_DVS2, | ||
| 75 | S2MPS13_REG_LDO_DVS3, | ||
| 76 | S2MPS13_REG_B6OUT2, | ||
| 77 | S2MPS13_REG_L1CTRL, | ||
| 78 | S2MPS13_REG_L2CTRL, | ||
| 79 | S2MPS13_REG_L3CTRL, | ||
| 80 | S2MPS13_REG_L4CTRL, | ||
| 81 | S2MPS13_REG_L5CTRL, | ||
| 82 | S2MPS13_REG_L6CTRL, | ||
| 83 | S2MPS13_REG_L7CTRL, | ||
| 84 | S2MPS13_REG_L8CTRL, | ||
| 85 | S2MPS13_REG_L9CTRL, | ||
| 86 | S2MPS13_REG_L10CTRL, | ||
| 87 | S2MPS13_REG_L11CTRL, | ||
| 88 | S2MPS13_REG_L12CTRL, | ||
| 89 | S2MPS13_REG_L13CTRL, | ||
| 90 | S2MPS13_REG_L14CTRL, | ||
| 91 | S2MPS13_REG_L15CTRL, | ||
| 92 | S2MPS13_REG_L16CTRL, | ||
| 93 | S2MPS13_REG_L17CTRL, | ||
| 94 | S2MPS13_REG_L18CTRL, | ||
| 95 | S2MPS13_REG_L19CTRL, | ||
| 96 | S2MPS13_REG_L20CTRL, | ||
| 97 | S2MPS13_REG_L21CTRL, | ||
| 98 | S2MPS13_REG_L22CTRL, | ||
| 99 | S2MPS13_REG_L23CTRL, | ||
| 100 | S2MPS13_REG_L24CTRL, | ||
| 101 | S2MPS13_REG_L25CTRL, | ||
| 102 | S2MPS13_REG_L26CTRL, | ||
| 103 | S2MPS13_REG_L27CTRL, | ||
| 104 | S2MPS13_REG_L28CTRL, | ||
| 105 | S2MPS13_REG_L30CTRL, | ||
| 106 | S2MPS13_REG_L31CTRL, | ||
| 107 | S2MPS13_REG_L32CTRL, | ||
| 108 | S2MPS13_REG_L33CTRL, | ||
| 109 | S2MPS13_REG_L34CTRL, | ||
| 110 | S2MPS13_REG_L35CTRL, | ||
| 111 | S2MPS13_REG_L36CTRL, | ||
| 112 | S2MPS13_REG_L37CTRL, | ||
| 113 | S2MPS13_REG_L38CTRL, | ||
| 114 | S2MPS13_REG_L39CTRL, | ||
| 115 | S2MPS13_REG_L40CTRL, | ||
| 116 | S2MPS13_REG_LDODSCH1, | ||
| 117 | S2MPS13_REG_LDODSCH2, | ||
| 118 | S2MPS13_REG_LDODSCH3, | ||
| 119 | S2MPS13_REG_LDODSCH4, | ||
| 120 | S2MPS13_REG_LDODSCH5, | ||
| 121 | }; | ||
| 122 | |||
| 123 | /* regulator ids */ | ||
| 124 | enum s2mps13_regulators { | ||
| 125 | S2MPS13_LDO1, | ||
| 126 | S2MPS13_LDO2, | ||
| 127 | S2MPS13_LDO3, | ||
| 128 | S2MPS13_LDO4, | ||
| 129 | S2MPS13_LDO5, | ||
| 130 | S2MPS13_LDO6, | ||
| 131 | S2MPS13_LDO7, | ||
| 132 | S2MPS13_LDO8, | ||
| 133 | S2MPS13_LDO9, | ||
| 134 | S2MPS13_LDO10, | ||
| 135 | S2MPS13_LDO11, | ||
| 136 | S2MPS13_LDO12, | ||
| 137 | S2MPS13_LDO13, | ||
| 138 | S2MPS13_LDO14, | ||
| 139 | S2MPS13_LDO15, | ||
| 140 | S2MPS13_LDO16, | ||
| 141 | S2MPS13_LDO17, | ||
| 142 | S2MPS13_LDO18, | ||
| 143 | S2MPS13_LDO19, | ||
| 144 | S2MPS13_LDO20, | ||
| 145 | S2MPS13_LDO21, | ||
| 146 | S2MPS13_LDO22, | ||
| 147 | S2MPS13_LDO23, | ||
| 148 | S2MPS13_LDO24, | ||
| 149 | S2MPS13_LDO25, | ||
| 150 | S2MPS13_LDO26, | ||
| 151 | S2MPS13_LDO27, | ||
| 152 | S2MPS13_LDO28, | ||
| 153 | S2MPS13_LDO29, | ||
| 154 | S2MPS13_LDO30, | ||
| 155 | S2MPS13_LDO31, | ||
| 156 | S2MPS13_LDO32, | ||
| 157 | S2MPS13_LDO33, | ||
| 158 | S2MPS13_LDO34, | ||
| 159 | S2MPS13_LDO35, | ||
| 160 | S2MPS13_LDO36, | ||
| 161 | S2MPS13_LDO37, | ||
| 162 | S2MPS13_LDO38, | ||
| 163 | S2MPS13_LDO39, | ||
| 164 | S2MPS13_LDO40, | ||
| 165 | S2MPS13_BUCK1, | ||
| 166 | S2MPS13_BUCK2, | ||
| 167 | S2MPS13_BUCK3, | ||
| 168 | S2MPS13_BUCK4, | ||
| 169 | S2MPS13_BUCK5, | ||
| 170 | S2MPS13_BUCK6, | ||
| 171 | S2MPS13_BUCK7, | ||
| 172 | S2MPS13_BUCK8, | ||
| 173 | S2MPS13_BUCK9, | ||
| 174 | S2MPS13_BUCK10, | ||
| 175 | |||
| 176 | S2MPS13_REGULATOR_MAX, | ||
| 177 | }; | ||
| 178 | |||
| 179 | /* | ||
| 180 | * Default ramp delay in uv/us. Datasheet says that ramp delay can be | ||
| 181 | * controlled however it does not specify which register is used for that. | ||
| 182 | * Let's assume that default value will be set. | ||
| 183 | */ | ||
| 184 | #define S2MPS13_BUCK_RAMP_DELAY 12500 | ||
| 185 | |||
| 186 | #endif /* __LINUX_MFD_S2MPS13_H */ | ||
