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-rw-r--r--include/linux/mfd/mc13783-private.h220
-rw-r--r--include/linux/mfd/mc13783.h2
-rw-r--r--include/linux/mfd/stmpe.h201
-rw-r--r--include/linux/mfd/tps6586x.h47
-rw-r--r--include/linux/mfd/wm8994/gpio.h4
5 files changed, 254 insertions, 220 deletions
diff --git a/include/linux/mfd/mc13783-private.h b/include/linux/mfd/mc13783-private.h
deleted file mode 100644
index 95cf9360553f..000000000000
--- a/include/linux/mfd/mc13783-private.h
+++ /dev/null
@@ -1,220 +0,0 @@
1/*
2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * Initial development of this code was funded by
5 * Phytec Messtechnik GmbH, http://www.phytec.de
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef __LINUX_MFD_MC13783_PRIV_H
23#define __LINUX_MFD_MC13783_PRIV_H
24
25#include <linux/platform_device.h>
26#include <linux/mfd/mc13783.h>
27#include <linux/mutex.h>
28#include <linux/interrupt.h>
29
30struct mc13783 {
31 struct spi_device *spidev;
32 struct mutex lock;
33 int irq;
34 int flags;
35
36 irq_handler_t irqhandler[MC13783_NUM_IRQ];
37 void *irqdata[MC13783_NUM_IRQ];
38
39 /* XXX these should go as platformdata to the regulator subdevice */
40 struct mc13783_regulator_init_data *regulators;
41 int num_regulators;
42};
43
44#define MC13783_REG_INTERRUPT_STATUS_0 0
45#define MC13783_REG_INTERRUPT_MASK_0 1
46#define MC13783_REG_INTERRUPT_SENSE_0 2
47#define MC13783_REG_INTERRUPT_STATUS_1 3
48#define MC13783_REG_INTERRUPT_MASK_1 4
49#define MC13783_REG_INTERRUPT_SENSE_1 5
50#define MC13783_REG_POWER_UP_MODE_SENSE 6
51#define MC13783_REG_REVISION 7
52#define MC13783_REG_SEMAPHORE 8
53#define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9
54#define MC13783_REG_ARBITRATION_SWITCHERS 10
55#define MC13783_REG_ARBITRATION_REGULATORS_0 11
56#define MC13783_REG_ARBITRATION_REGULATORS_1 12
57#define MC13783_REG_POWER_CONTROL_0 13
58#define MC13783_REG_POWER_CONTROL_1 14
59#define MC13783_REG_POWER_CONTROL_2 15
60#define MC13783_REG_REGEN_ASSIGNMENT 16
61#define MC13783_REG_CONTROL_SPARE 17
62#define MC13783_REG_MEMORY_A 18
63#define MC13783_REG_MEMORY_B 19
64#define MC13783_REG_RTC_TIME 20
65#define MC13783_REG_RTC_ALARM 21
66#define MC13783_REG_RTC_DAY 22
67#define MC13783_REG_RTC_DAY_ALARM 23
68#define MC13783_REG_SWITCHERS_0 24
69#define MC13783_REG_SWITCHERS_1 25
70#define MC13783_REG_SWITCHERS_2 26
71#define MC13783_REG_SWITCHERS_3 27
72#define MC13783_REG_SWITCHERS_4 28
73#define MC13783_REG_SWITCHERS_5 29
74#define MC13783_REG_REGULATOR_SETTING_0 30
75#define MC13783_REG_REGULATOR_SETTING_1 31
76#define MC13783_REG_REGULATOR_MODE_0 32
77#define MC13783_REG_REGULATOR_MODE_1 33
78#define MC13783_REG_POWER_MISCELLANEOUS 34
79#define MC13783_REG_POWER_SPARE 35
80#define MC13783_REG_AUDIO_RX_0 36
81#define MC13783_REG_AUDIO_RX_1 37
82#define MC13783_REG_AUDIO_TX 38
83#define MC13783_REG_AUDIO_SSI_NETWORK 39
84#define MC13783_REG_AUDIO_CODEC 40
85#define MC13783_REG_AUDIO_STEREO_DAC 41
86#define MC13783_REG_AUDIO_SPARE 42
87#define MC13783_REG_ADC_0 43
88#define MC13783_REG_ADC_1 44
89#define MC13783_REG_ADC_2 45
90#define MC13783_REG_ADC_3 46
91#define MC13783_REG_ADC_4 47
92#define MC13783_REG_CHARGER 48
93#define MC13783_REG_USB 49
94#define MC13783_REG_CHARGE_USB_SPARE 50
95#define MC13783_REG_LED_CONTROL_0 51
96#define MC13783_REG_LED_CONTROL_1 52
97#define MC13783_REG_LED_CONTROL_2 53
98#define MC13783_REG_LED_CONTROL_3 54
99#define MC13783_REG_LED_CONTROL_4 55
100#define MC13783_REG_LED_CONTROL_5 56
101#define MC13783_REG_SPARE 57
102#define MC13783_REG_TRIM_0 58
103#define MC13783_REG_TRIM_1 59
104#define MC13783_REG_TEST_0 60
105#define MC13783_REG_TEST_1 61
106#define MC13783_REG_TEST_2 62
107#define MC13783_REG_TEST_3 63
108#define MC13783_REG_NB 64
109
110/*
111 * Reg Regulator Mode 0
112 */
113#define MC13783_REGCTRL_VAUDIO_EN (1 << 0)
114#define MC13783_REGCTRL_VAUDIO_STBY (1 << 1)
115#define MC13783_REGCTRL_VAUDIO_MODE (1 << 2)
116#define MC13783_REGCTRL_VIOHI_EN (1 << 3)
117#define MC13783_REGCTRL_VIOHI_STBY (1 << 4)
118#define MC13783_REGCTRL_VIOHI_MODE (1 << 5)
119#define MC13783_REGCTRL_VIOLO_EN (1 << 6)
120#define MC13783_REGCTRL_VIOLO_STBY (1 << 7)
121#define MC13783_REGCTRL_VIOLO_MODE (1 << 8)
122#define MC13783_REGCTRL_VDIG_EN (1 << 9)
123#define MC13783_REGCTRL_VDIG_STBY (1 << 10)
124#define MC13783_REGCTRL_VDIG_MODE (1 << 11)
125#define MC13783_REGCTRL_VGEN_EN (1 << 12)
126#define MC13783_REGCTRL_VGEN_STBY (1 << 13)
127#define MC13783_REGCTRL_VGEN_MODE (1 << 14)
128#define MC13783_REGCTRL_VRFDIG_EN (1 << 15)
129#define MC13783_REGCTRL_VRFDIG_STBY (1 << 16)
130#define MC13783_REGCTRL_VRFDIG_MODE (1 << 17)
131#define MC13783_REGCTRL_VRFREF_EN (1 << 18)
132#define MC13783_REGCTRL_VRFREF_STBY (1 << 19)
133#define MC13783_REGCTRL_VRFREF_MODE (1 << 20)
134#define MC13783_REGCTRL_VRFCP_EN (1 << 21)
135#define MC13783_REGCTRL_VRFCP_STBY (1 << 22)
136#define MC13783_REGCTRL_VRFCP_MODE (1 << 23)
137
138/*
139 * Reg Regulator Mode 1
140 */
141#define MC13783_REGCTRL_VSIM_EN (1 << 0)
142#define MC13783_REGCTRL_VSIM_STBY (1 << 1)
143#define MC13783_REGCTRL_VSIM_MODE (1 << 2)
144#define MC13783_REGCTRL_VESIM_EN (1 << 3)
145#define MC13783_REGCTRL_VESIM_STBY (1 << 4)
146#define MC13783_REGCTRL_VESIM_MODE (1 << 5)
147#define MC13783_REGCTRL_VCAM_EN (1 << 6)
148#define MC13783_REGCTRL_VCAM_STBY (1 << 7)
149#define MC13783_REGCTRL_VCAM_MODE (1 << 8)
150#define MC13783_REGCTRL_VRFBG_EN (1 << 9)
151#define MC13783_REGCTRL_VRFBG_STBY (1 << 10)
152#define MC13783_REGCTRL_VVIB_EN (1 << 11)
153#define MC13783_REGCTRL_VRF1_EN (1 << 12)
154#define MC13783_REGCTRL_VRF1_STBY (1 << 13)
155#define MC13783_REGCTRL_VRF1_MODE (1 << 14)
156#define MC13783_REGCTRL_VRF2_EN (1 << 15)
157#define MC13783_REGCTRL_VRF2_STBY (1 << 16)
158#define MC13783_REGCTRL_VRF2_MODE (1 << 17)
159#define MC13783_REGCTRL_VMMC1_EN (1 << 18)
160#define MC13783_REGCTRL_VMMC1_STBY (1 << 19)
161#define MC13783_REGCTRL_VMMC1_MODE (1 << 20)
162#define MC13783_REGCTRL_VMMC2_EN (1 << 21)
163#define MC13783_REGCTRL_VMMC2_STBY (1 << 22)
164#define MC13783_REGCTRL_VMMC2_MODE (1 << 23)
165
166/*
167 * Reg Regulator Misc.
168 */
169#define MC13783_REGCTRL_GPO1_EN (1 << 6)
170#define MC13783_REGCTRL_GPO2_EN (1 << 8)
171#define MC13783_REGCTRL_GPO3_EN (1 << 10)
172#define MC13783_REGCTRL_GPO4_EN (1 << 12)
173#define MC13783_REGCTRL_VIBPINCTRL (1 << 14)
174
175/*
176 * Reg Switcher 4
177 */
178#define MC13783_SWCTRL_SW1A_MODE (1 << 0)
179#define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2)
180#define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6)
181#define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8)
182#define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9)
183#define MC13783_SWCTRL_SW1B_MODE (1 << 10)
184#define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12)
185#define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14)
186#define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16)
187#define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17)
188#define MC13783_SWCTRL_PLL_EN (1 << 18)
189#define MC13783_SWCTRL_PLL_FACTOR (1 << 19)
190
191/*
192 * Reg Switcher 5
193 */
194#define MC13783_SWCTRL_SW2A_MODE (1 << 0)
195#define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2)
196#define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6)
197#define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8)
198#define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9)
199#define MC13783_SWCTRL_SW2B_MODE (1 << 10)
200#define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12)
201#define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14)
202#define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16)
203#define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17)
204#define MC13783_SWSET_SW3 (1 << 18)
205#define MC13783_SWCTRL_SW3_EN (1 << 20)
206#define MC13783_SWCTRL_SW3_STBY (1 << 21)
207#define MC13783_SWCTRL_SW3_MODE (1 << 22)
208
209static inline int mc13783_set_bits(struct mc13783 *mc13783, unsigned int offset,
210 u32 mask, u32 val)
211{
212 int ret;
213 mc13783_lock(mc13783);
214 ret = mc13783_reg_rmw(mc13783, offset, mask, val);
215 mc13783_unlock(mc13783);
216
217 return ret;
218}
219
220#endif /* __LINUX_MFD_MC13783_PRIV_H */
diff --git a/include/linux/mfd/mc13783.h b/include/linux/mfd/mc13783.h
index 4a894f688549..0fa44fb8dd26 100644
--- a/include/linux/mfd/mc13783.h
+++ b/include/linux/mfd/mc13783.h
@@ -21,6 +21,8 @@ int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val);
21int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset, 21int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset,
22 u32 mask, u32 val); 22 u32 mask, u32 val);
23 23
24int mc13783_get_flags(struct mc13783 *mc13783);
25
24int mc13783_irq_request(struct mc13783 *mc13783, int irq, 26int mc13783_irq_request(struct mc13783 *mc13783, int irq,
25 irq_handler_t handler, const char *name, void *dev); 27 irq_handler_t handler, const char *name, void *dev);
26int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq, 28int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq,
diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h
new file mode 100644
index 000000000000..39ca7588659b
--- /dev/null
+++ b/include/linux/mfd/stmpe.h
@@ -0,0 +1,201 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */
7
8#ifndef __LINUX_MFD_STMPE_H
9#define __LINUX_MFD_STMPE_H
10
11#include <linux/device.h>
12
13enum stmpe_block {
14 STMPE_BLOCK_GPIO = 1 << 0,
15 STMPE_BLOCK_KEYPAD = 1 << 1,
16 STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
17 STMPE_BLOCK_ADC = 1 << 3,
18 STMPE_BLOCK_PWM = 1 << 4,
19 STMPE_BLOCK_ROTATOR = 1 << 5,
20};
21
22enum stmpe_partnum {
23 STMPE811,
24 STMPE1601,
25 STMPE2401,
26 STMPE2403,
27};
28
29/*
30 * For registers whose locations differ on variants, the correct address is
31 * obtained by indexing stmpe->regs with one of the following.
32 */
33enum {
34 STMPE_IDX_CHIP_ID,
35 STMPE_IDX_ICR_LSB,
36 STMPE_IDX_IER_LSB,
37 STMPE_IDX_ISR_MSB,
38 STMPE_IDX_GPMR_LSB,
39 STMPE_IDX_GPSR_LSB,
40 STMPE_IDX_GPCR_LSB,
41 STMPE_IDX_GPDR_LSB,
42 STMPE_IDX_GPEDR_MSB,
43 STMPE_IDX_GPRER_LSB,
44 STMPE_IDX_GPFER_LSB,
45 STMPE_IDX_GPAFR_U_MSB,
46 STMPE_IDX_IEGPIOR_LSB,
47 STMPE_IDX_ISGPIOR_MSB,
48 STMPE_IDX_MAX,
49};
50
51
52struct stmpe_variant_info;
53
54/**
55 * struct stmpe - STMPE MFD structure
56 * @lock: lock protecting I/O operations
57 * @irq_lock: IRQ bus lock
58 * @dev: device, mostly for dev_dbg()
59 * @i2c: i2c client
60 * @variant: the detected STMPE model number
61 * @regs: list of addresses of registers which are at different addresses on
62 * different variants. Indexed by one of STMPE_IDX_*.
63 * @irq_base: starting IRQ number for internal IRQs
64 * @num_gpios: number of gpios, differs for variants
65 * @ier: cache of IER registers for bus_lock
66 * @oldier: cache of IER registers for bus_lock
67 * @pdata: platform data
68 */
69struct stmpe {
70 struct mutex lock;
71 struct mutex irq_lock;
72 struct device *dev;
73 struct i2c_client *i2c;
74 enum stmpe_partnum partnum;
75 struct stmpe_variant_info *variant;
76 const u8 *regs;
77
78 int irq_base;
79 int num_gpios;
80 u8 ier[2];
81 u8 oldier[2];
82 struct stmpe_platform_data *pdata;
83};
84
85extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
86extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
87extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
88 u8 *values);
89extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
90 const u8 *values);
91extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
92extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
93 enum stmpe_block block);
94extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
95extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
96
97struct matrix_keymap_data;
98
99/**
100 * struct stmpe_keypad_platform_data - STMPE keypad platform data
101 * @keymap_data: key map table and size
102 * @debounce_ms: debounce interval, in ms. Maximum is
103 * %STMPE_KEYPAD_MAX_DEBOUNCE.
104 * @scan_count: number of key scanning cycles to confirm key data.
105 * Maximum is %STMPE_KEYPAD_MAX_SCAN_COUNT.
106 * @no_autorepeat: disable key autorepeat
107 */
108struct stmpe_keypad_platform_data {
109 struct matrix_keymap_data *keymap_data;
110 unsigned int debounce_ms;
111 unsigned int scan_count;
112 bool no_autorepeat;
113};
114
115/**
116 * struct stmpe_gpio_platform_data - STMPE GPIO platform data
117 * @gpio_base: first gpio number assigned. A maximum of
118 * %STMPE_NR_GPIOS GPIOs will be allocated.
119 */
120struct stmpe_gpio_platform_data {
121 int gpio_base;
122 void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
123 void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
124};
125
126/**
127 * struct stmpe_ts_platform_data - stmpe811 touch screen controller platform
128 * data
129 * @sample_time: ADC converstion time in number of clock.
130 * (0 -> 36 clocks, 1 -> 44 clocks, 2 -> 56 clocks, 3 -> 64 clocks,
131 * 4 -> 80 clocks, 5 -> 96 clocks, 6 -> 144 clocks),
132 * recommended is 4.
133 * @mod_12b: ADC Bit mode (0 -> 10bit ADC, 1 -> 12bit ADC)
134 * @ref_sel: ADC reference source
135 * (0 -> internal reference, 1 -> external reference)
136 * @adc_freq: ADC Clock speed
137 * (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz)
138 * @ave_ctrl: Sample average control
139 * (0 -> 1 sample, 1 -> 2 samples, 2 -> 4 samples, 3 -> 8 samples)
140 * @touch_det_delay: Touch detect interrupt delay
141 * (0 -> 10 us, 1 -> 50 us, 2 -> 100 us, 3 -> 500 us,
142 * 4-> 1 ms, 5 -> 5 ms, 6 -> 10 ms, 7 -> 50 ms)
143 * recommended is 3
144 * @settling: Panel driver settling time
145 * (0 -> 10 us, 1 -> 100 us, 2 -> 500 us, 3 -> 1 ms,
146 * 4 -> 5 ms, 5 -> 10 ms, 6 for 50 ms, 7 -> 100 ms)
147 * recommended is 2
148 * @fraction_z: Length of the fractional part in z
149 * (fraction_z ([0..7]) = Count of the fractional part)
150 * recommended is 7
151 * @i_drive: current limit value of the touchscreen drivers
152 * (0 -> 20 mA typical 35 mA max, 1 -> 50 mA typical 80 mA max)
153 *
154 * */
155struct stmpe_ts_platform_data {
156 u8 sample_time;
157 u8 mod_12b;
158 u8 ref_sel;
159 u8 adc_freq;
160 u8 ave_ctrl;
161 u8 touch_det_delay;
162 u8 settling;
163 u8 fraction_z;
164 u8 i_drive;
165};
166
167/**
168 * struct stmpe_platform_data - STMPE platform data
169 * @id: device id to distinguish between multiple STMPEs on the same board
170 * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
171 * @irq_trigger: IRQ trigger to use for the interrupt to the host
172 * @irq_invert_polarity: IRQ line is connected with reversed polarity
173 * @autosleep: bool to enable/disable stmpe autosleep
174 * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
175 * @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
176 * %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
177 * @gpio: GPIO-specific platform data
178 * @keypad: keypad-specific platform data
179 * @ts: touchscreen-specific platform data
180 */
181struct stmpe_platform_data {
182 int id;
183 unsigned int blocks;
184 int irq_base;
185 unsigned int irq_trigger;
186 bool irq_invert_polarity;
187 bool autosleep;
188 int autosleep_timeout;
189
190 struct stmpe_gpio_platform_data *gpio;
191 struct stmpe_keypad_platform_data *keypad;
192 struct stmpe_ts_platform_data *ts;
193};
194
195#define STMPE_NR_INTERNAL_IRQS 9
196#define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x))
197
198#define STMPE_NR_GPIOS 24
199#define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS)
200
201#endif
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
new file mode 100644
index 000000000000..772b3ae640af
--- /dev/null
+++ b/include/linux/mfd/tps6586x.h
@@ -0,0 +1,47 @@
1#ifndef __LINUX_MFD_TPS6586X_H
2#define __LINUX_MFD_TPS6586X_H
3
4enum {
5 TPS6586X_ID_SM_0,
6 TPS6586X_ID_SM_1,
7 TPS6586X_ID_SM_2,
8 TPS6586X_ID_LDO_0,
9 TPS6586X_ID_LDO_1,
10 TPS6586X_ID_LDO_2,
11 TPS6586X_ID_LDO_3,
12 TPS6586X_ID_LDO_4,
13 TPS6586X_ID_LDO_5,
14 TPS6586X_ID_LDO_6,
15 TPS6586X_ID_LDO_7,
16 TPS6586X_ID_LDO_8,
17 TPS6586X_ID_LDO_9,
18 TPS6586X_ID_LDO_RTC,
19};
20
21struct tps6586x_subdev_info {
22 int id;
23 const char *name;
24 void *platform_data;
25};
26
27struct tps6586x_platform_data {
28 int num_subdevs;
29 struct tps6586x_subdev_info *subdevs;
30
31 int gpio_base;
32};
33
34/*
35 * NOTE: the functions below are not intended for use outside
36 * of the TPS6586X sub-device drivers
37 */
38extern int tps6586x_write(struct device *dev, int reg, uint8_t val);
39extern int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val);
40extern int tps6586x_read(struct device *dev, int reg, uint8_t *val);
41extern int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val);
42extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
43extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
44extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
45 uint8_t mask);
46
47#endif /*__LINUX_MFD_TPS6586X_H */
diff --git a/include/linux/mfd/wm8994/gpio.h b/include/linux/mfd/wm8994/gpio.h
index b4d4c22991e8..0c79b5ff4b5a 100644
--- a/include/linux/mfd/wm8994/gpio.h
+++ b/include/linux/mfd/wm8994/gpio.h
@@ -36,6 +36,10 @@
36#define WM8994_GP_FN_WSEQ_STATUS 16 36#define WM8994_GP_FN_WSEQ_STATUS 16
37#define WM8994_GP_FN_FIFO_ERROR 17 37#define WM8994_GP_FN_FIFO_ERROR 17
38#define WM8994_GP_FN_OPCLK 18 38#define WM8994_GP_FN_OPCLK 18
39#define WM8994_GP_FN_THW 19
40#define WM8994_GP_FN_DCS_DONE 20
41#define WM8994_GP_FN_FLL1_OUT 21
42#define WM8994_GP_FN_FLL2_OUT 22
39 43
40#define WM8994_GPN_DIR 0x8000 /* GPN_DIR */ 44#define WM8994_GPN_DIR 0x8000 /* GPN_DIR */
41#define WM8994_GPN_DIR_MASK 0x8000 /* GPN_DIR */ 45#define WM8994_GPN_DIR_MASK 0x8000 /* GPN_DIR */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 08:35:34 -0500