5 files changed, 484 insertions, 140 deletions

diff --git a/include/linux/mfd/tc35892.h b/include/linux/mfd/tc35892.h
deleted file mode 100644
index eff3094ca84e..000000000000
--- a/include/linux/mfd/tc35892.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License Terms: GNU General Public License, version 2
- */
-
-#ifndef __LINUX_MFD_TC35892_H
-#define __LINUX_MFD_TC35892_H
-
-#include <linux/device.h>
-
-#define TC35892_RSTCTRL_IRQRST  (1 << 4)
-#define TC35892_RSTCTRL_TIMRST  (1 << 3)
-#define TC35892_RSTCTRL_ROTRST  (1 << 2)
-#define TC35892_RSTCTRL_KBDRST  (1 << 1)
-#define TC35892_RSTCTRL_GPIRST  (1 << 0)
-
-#define TC35892_IRQST           0x91
-
-#define TC35892_MANFCODE_MAGIC  0x03
-#define TC35892_MANFCODE        0x80
-#define TC35892_VERSION         0x81
-#define TC35892_IOCFG           0xA7
-
-#define TC35892_CLKMODE         0x88
-#define TC35892_CLKCFG          0x89
-#define TC35892_CLKEN           0x8A
-
-#define TC35892_RSTCTRL         0x82
-#define TC35892_EXTRSTN         0x83
-#define TC35892_RSTINTCLR       0x84
-
-#define TC35892_GPIOIS0         0xC9
-#define TC35892_GPIOIS1         0xCA
-#define TC35892_GPIOIS2         0xCB
-#define TC35892_GPIOIBE0        0xCC
-#define TC35892_GPIOIBE1        0xCD
-#define TC35892_GPIOIBE2        0xCE
-#define TC35892_GPIOIEV0        0xCF
-#define TC35892_GPIOIEV1        0xD0
-#define TC35892_GPIOIEV2        0xD1
-#define TC35892_GPIOIE0         0xD2
-#define TC35892_GPIOIE1         0xD3
-#define TC35892_GPIOIE2         0xD4
-#define TC35892_GPIORIS0        0xD6
-#define TC35892_GPIORIS1        0xD7
-#define TC35892_GPIORIS2        0xD8
-#define TC35892_GPIOMIS0        0xD9
-#define TC35892_GPIOMIS1        0xDA
-#define TC35892_GPIOMIS2        0xDB
-#define TC35892_GPIOIC0         0xDC
-#define TC35892_GPIOIC1         0xDD
-#define TC35892_GPIOIC2         0xDE
-
-#define TC35892_GPIODATA0       0xC0
-#define TC35892_GPIOMASK0       0xc1
-#define TC35892_GPIODATA1       0xC2
-#define TC35892_GPIOMASK1       0xc3
-#define TC35892_GPIODATA2       0xC4
-#define TC35892_GPIOMASK2       0xC5
-
-#define TC35892_GPIODIR0        0xC6
-#define TC35892_GPIODIR1        0xC7
-#define TC35892_GPIODIR2        0xC8
-
-#define TC35892_GPIOSYNC0       0xE6
-#define TC35892_GPIOSYNC1       0xE7
-#define TC35892_GPIOSYNC2       0xE8
-
-#define TC35892_GPIOWAKE0       0xE9
-#define TC35892_GPIOWAKE1       0xEA
-#define TC35892_GPIOWAKE2       0xEB
-
-#define TC35892_GPIOODM0        0xE0
-#define TC35892_GPIOODE0        0xE1
-#define TC35892_GPIOODM1        0xE2
-#define TC35892_GPIOODE1        0xE3
-#define TC35892_GPIOODM2        0xE4
-#define TC35892_GPIOODE2        0xE5
-
-#define TC35892_INT_GPIIRQ      0
-#define TC35892_INT_TI0IRQ      1
-#define TC35892_INT_TI1IRQ      2
-#define TC35892_INT_TI2IRQ      3
-#define TC35892_INT_ROTIRQ      5
-#define TC35892_INT_KBDIRQ      6
-#define TC35892_INT_PORIRQ      7
-
-#define TC35892_NR_INTERNAL_IRQS        8
-#define TC35892_INT_GPIO(x)     (TC35892_NR_INTERNAL_IRQS + (x))
-
-struct tc35892 {
-        struct mutex lock;
-        struct device *dev;
-        struct i2c_client *i2c;
-
-        int irq_base;
-        int num_gpio;
-        struct tc35892_platform_data *pdata;
-};
-
-extern int tc35892_reg_write(struct tc35892 *tc35892, u8 reg, u8 data);
-extern int tc35892_reg_read(struct tc35892 *tc35892, u8 reg);
-extern int tc35892_block_read(struct tc35892 *tc35892, u8 reg, u8 length,
-                              u8 *values);
-extern int tc35892_block_write(struct tc35892 *tc35892, u8 reg, u8 length,
-                               const u8 *values);
-extern int tc35892_set_bits(struct tc35892 *tc35892, u8 reg, u8 mask, u8 val);
-
-/**
- * struct tc35892_gpio_platform_data - TC35892 GPIO platform data
- * @gpio_base: first gpio number assigned to TC35892.  A maximum of
- *             %TC35892_NR_GPIOS GPIOs will be allocated.
- * @setup: callback for board-specific initialization
- * @remove: callback for board-specific teardown
- */
-struct tc35892_gpio_platform_data {
-        int gpio_base;
-        void (*setup)(struct tc35892 *tc35892, unsigned gpio_base);
-        void (*remove)(struct tc35892 *tc35892, unsigned gpio_base);
-};
-
-/**
- * struct tc35892_platform_data - TC35892 platform data
- * @irq_base: base IRQ number.  %TC35892_NR_IRQS irqs will be used.
- * @gpio: GPIO-specific platform data
- */
-struct tc35892_platform_data {
-        int irq_base;
-        struct tc35892_gpio_platform_data *gpio;
-};
-
-#define TC35892_NR_GPIOS        24
-#define TC35892_NR_IRQS         TC35892_INT_GPIO(TC35892_NR_GPIOS)
-
-#endif
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
new file mode 100644
index 000000000000..16c76e124f9c
--- /dev/null
+++ b/include/linux/mfd/tc3589x.h
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * License Terms: GNU General Public License, version 2
+ */
+
+#ifndef __LINUX_MFD_TC3589x_H
+#define __LINUX_MFD_TC3589x_H
+
+#include <linux/device.h>
+
+enum tx3589x_block {
+        TC3589x_BLOCK_GPIO        = 1 << 0,
+        TC3589x_BLOCK_KEYPAD      = 1 << 1,
+};
+
+#define TC3589x_RSTCTRL_IRQRST  (1 << 4)
+#define TC3589x_RSTCTRL_TIMRST  (1 << 3)
+#define TC3589x_RSTCTRL_ROTRST  (1 << 2)
+#define TC3589x_RSTCTRL_KBDRST  (1 << 1)
+#define TC3589x_RSTCTRL_GPIRST  (1 << 0)
+
+/* Keyboard Configuration Registers */
+#define TC3589x_KBDSETTLE_REG   0x01
+#define TC3589x_KBDBOUNCE       0x02
+#define TC3589x_KBDSIZE         0x03
+#define TC3589x_KBCFG_LSB       0x04
+#define TC3589x_KBCFG_MSB       0x05
+#define TC3589x_KBDIC           0x08
+#define TC3589x_KBDMSK          0x09
+#define TC3589x_EVTCODE_FIFO    0x10
+#define TC3589x_KBDMFS          0x8F
+
+#define TC3589x_IRQST           0x91
+
+#define TC3589x_MANFCODE_MAGIC  0x03
+#define TC3589x_MANFCODE        0x80
+#define TC3589x_VERSION         0x81
+#define TC3589x_IOCFG           0xA7
+
+#define TC3589x_CLKMODE         0x88
+#define TC3589x_CLKCFG          0x89
+#define TC3589x_CLKEN           0x8A
+
+#define TC3589x_RSTCTRL         0x82
+#define TC3589x_EXTRSTN         0x83
+#define TC3589x_RSTINTCLR       0x84
+
+/* Pull up/down configuration registers */
+#define TC3589x_IOCFG           0xA7
+#define TC3589x_IOPULLCFG0_LSB  0xAA
+#define TC3589x_IOPULLCFG0_MSB  0xAB
+#define TC3589x_IOPULLCFG1_LSB  0xAC
+#define TC3589x_IOPULLCFG1_MSB  0xAD
+#define TC3589x_IOPULLCFG2_LSB  0xAE
+
+#define TC3589x_GPIOIS0         0xC9
+#define TC3589x_GPIOIS1         0xCA
+#define TC3589x_GPIOIS2         0xCB
+#define TC3589x_GPIOIBE0        0xCC
+#define TC3589x_GPIOIBE1        0xCD
+#define TC3589x_GPIOIBE2        0xCE
+#define TC3589x_GPIOIEV0        0xCF
+#define TC3589x_GPIOIEV1        0xD0
+#define TC3589x_GPIOIEV2        0xD1
+#define TC3589x_GPIOIE0         0xD2
+#define TC3589x_GPIOIE1         0xD3
+#define TC3589x_GPIOIE2         0xD4
+#define TC3589x_GPIORIS0        0xD6
+#define TC3589x_GPIORIS1        0xD7
+#define TC3589x_GPIORIS2        0xD8
+#define TC3589x_GPIOMIS0        0xD9
+#define TC3589x_GPIOMIS1        0xDA
+#define TC3589x_GPIOMIS2        0xDB
+#define TC3589x_GPIOIC0         0xDC
+#define TC3589x_GPIOIC1         0xDD
+#define TC3589x_GPIOIC2         0xDE
+
+#define TC3589x_GPIODATA0       0xC0
+#define TC3589x_GPIOMASK0       0xc1
+#define TC3589x_GPIODATA1       0xC2
+#define TC3589x_GPIOMASK1       0xc3
+#define TC3589x_GPIODATA2       0xC4
+#define TC3589x_GPIOMASK2       0xC5
+
+#define TC3589x_GPIODIR0        0xC6
+#define TC3589x_GPIODIR1        0xC7
+#define TC3589x_GPIODIR2        0xC8
+
+#define TC3589x_GPIOSYNC0       0xE6
+#define TC3589x_GPIOSYNC1       0xE7
+#define TC3589x_GPIOSYNC2       0xE8
+
+#define TC3589x_GPIOWAKE0       0xE9
+#define TC3589x_GPIOWAKE1       0xEA
+#define TC3589x_GPIOWAKE2       0xEB
+
+#define TC3589x_GPIOODM0        0xE0
+#define TC3589x_GPIOODE0        0xE1
+#define TC3589x_GPIOODM1        0xE2
+#define TC3589x_GPIOODE1        0xE3
+#define TC3589x_GPIOODM2        0xE4
+#define TC3589x_GPIOODE2        0xE5
+
+#define TC3589x_INT_GPIIRQ      0
+#define TC3589x_INT_TI0IRQ      1
+#define TC3589x_INT_TI1IRQ      2
+#define TC3589x_INT_TI2IRQ      3
+#define TC3589x_INT_ROTIRQ      5
+#define TC3589x_INT_KBDIRQ      6
+#define TC3589x_INT_PORIRQ      7
+
+#define TC3589x_NR_INTERNAL_IRQS        8
+#define TC3589x_INT_GPIO(x)     (TC3589x_NR_INTERNAL_IRQS + (x))
+
+struct tc3589x {
+        struct mutex lock;
+        struct device *dev;
+        struct i2c_client *i2c;
+
+        int irq_base;
+        int num_gpio;
+        struct tc3589x_platform_data *pdata;
+};
+
+extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data);
+extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg);
+extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length,
+                              u8 *values);
+extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length,
+                               const u8 *values);
+extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val);
+
+/*
+ * Keypad related platform specific constants
+ * These values may be modified for fine tuning
+ */
+#define TC_KPD_ROWS             0x8
+#define TC_KPD_COLUMNS          0x8
+#define TC_KPD_DEBOUNCE_PERIOD  0xA3
+#define TC_KPD_SETTLE_TIME      0xA3
+
+/**
+ * struct tc35893_platform_data - data structure for platform specific data
+ * @keymap_data:        matrix scan code table for keycodes
+ * @krow:               mask for available rows, value is 0xFF
+ * @kcol:               mask for available columns, value is 0xFF
+ * @debounce_period:    platform specific debounce time
+ * @settle_time:        platform specific settle down time
+ * @irqtype:            type of interrupt, falling or rising edge
+ * @enable_wakeup:      specifies if keypad event can wake up system from sleep
+ * @no_autorepeat:      flag for auto repetition
+ */
+struct tc3589x_keypad_platform_data {
+        const struct matrix_keymap_data *keymap_data;
+        u8                      krow;
+        u8                      kcol;
+        u8                      debounce_period;
+        u8                      settle_time;
+        unsigned long           irqtype;
+        bool                    enable_wakeup;
+        bool                    no_autorepeat;
+};
+
+/**
+ * struct tc3589x_gpio_platform_data - TC3589x GPIO platform data
+ * @gpio_base: first gpio number assigned to TC3589x.  A maximum of
+ *             %TC3589x_NR_GPIOS GPIOs will be allocated.
+ * @setup: callback for board-specific initialization
+ * @remove: callback for board-specific teardown
+ */
+struct tc3589x_gpio_platform_data {
+        int gpio_base;
+        void (*setup)(struct tc3589x *tc3589x, unsigned gpio_base);
+        void (*remove)(struct tc3589x *tc3589x, unsigned gpio_base);
+};
+
+/**
+ * struct tc3589x_platform_data - TC3589x platform data
+ * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*)
+ * @irq_base: base IRQ number.  %TC3589x_NR_IRQS irqs will be used.
+ * @gpio: GPIO-specific platform data
+ * @keypad: keypad-specific platform data
+ */
+struct tc3589x_platform_data {
+        unsigned int block;
+        int irq_base;
+        struct tc3589x_gpio_platform_data *gpio;
+        const struct tc3589x_keypad_platform_data *keypad;
+};
+
+#define TC3589x_NR_GPIOS        24
+#define TC3589x_NR_IRQS         TC3589x_INT_GPIO(TC3589x_NR_GPIOS)
+
+#endif
diff --git a/include/linux/mfd/wl1273-core.h b/include/linux/mfd/wl1273-core.h
new file mode 100644
index 000000000000..9787293eae5f
--- /dev/null
+++ b/include/linux/mfd/wl1273-core.h
@@ -0,0 +1,288 @@
+/*
+ * include/linux/mfd/wl1273-core.h
+ *
+ * Some definitions for the wl1273 radio receiver/transmitter chip.
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Author: Matti J. Aaltonen <matti.j.aaltonen@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#ifndef WL1273_CORE_H
+#define WL1273_CORE_H
+
+#include <linux/i2c.h>
+#include <linux/mfd/core.h>
+
+#define WL1273_FM_DRIVER_NAME   "wl1273-fm"
+#define RX71_FM_I2C_ADDR        0x22
+
+#define WL1273_STEREO_GET               0
+#define WL1273_RSSI_LVL_GET             1
+#define WL1273_IF_COUNT_GET             2
+#define WL1273_FLAG_GET                 3
+#define WL1273_RDS_SYNC_GET             4
+#define WL1273_RDS_DATA_GET             5
+#define WL1273_FREQ_SET                 10
+#define WL1273_AF_FREQ_SET              11
+#define WL1273_MOST_MODE_SET            12
+#define WL1273_MOST_BLEND_SET           13
+#define WL1273_DEMPH_MODE_SET           14
+#define WL1273_SEARCH_LVL_SET           15
+#define WL1273_BAND_SET                 16
+#define WL1273_MUTE_STATUS_SET          17
+#define WL1273_RDS_PAUSE_LVL_SET        18
+#define WL1273_RDS_PAUSE_DUR_SET        19
+#define WL1273_RDS_MEM_SET              20
+#define WL1273_RDS_BLK_B_SET            21
+#define WL1273_RDS_MSK_B_SET            22
+#define WL1273_RDS_PI_MASK_SET          23
+#define WL1273_RDS_PI_SET               24
+#define WL1273_RDS_SYSTEM_SET           25
+#define WL1273_INT_MASK_SET             26
+#define WL1273_SEARCH_DIR_SET           27
+#define WL1273_VOLUME_SET               28
+#define WL1273_AUDIO_ENABLE             29
+#define WL1273_PCM_MODE_SET             30
+#define WL1273_I2S_MODE_CONFIG_SET      31
+#define WL1273_POWER_SET                32
+#define WL1273_INTX_CONFIG_SET          33
+#define WL1273_PULL_EN_SET              34
+#define WL1273_HILO_SET                 35
+#define WL1273_SWITCH2FREF              36
+#define WL1273_FREQ_DRIFT_REPORT        37
+
+#define WL1273_PCE_GET                  40
+#define WL1273_FIRM_VER_GET             41
+#define WL1273_ASIC_VER_GET             42
+#define WL1273_ASIC_ID_GET              43
+#define WL1273_MAN_ID_GET               44
+#define WL1273_TUNER_MODE_SET           45
+#define WL1273_STOP_SEARCH              46
+#define WL1273_RDS_CNTRL_SET            47
+
+#define WL1273_WRITE_HARDWARE_REG       100
+#define WL1273_CODE_DOWNLOAD            101
+#define WL1273_RESET                    102
+
+#define WL1273_FM_POWER_MODE            254
+#define WL1273_FM_INTERRUPT             255
+
+/* Transmitter API */
+
+#define WL1273_CHANL_SET                        55
+#define WL1273_SCAN_SPACING_SET                 56
+#define WL1273_REF_SET                          57
+#define WL1273_POWER_ENB_SET                    90
+#define WL1273_POWER_ATT_SET                    58
+#define WL1273_POWER_LEV_SET                    59
+#define WL1273_AUDIO_DEV_SET                    60
+#define WL1273_PILOT_DEV_SET                    61
+#define WL1273_RDS_DEV_SET                      62
+#define WL1273_PUPD_SET                         91
+#define WL1273_AUDIO_IO_SET                     63
+#define WL1273_PREMPH_SET                       64
+#define WL1273_MONO_SET                         66
+#define WL1273_MUTE                             92
+#define WL1273_MPX_LMT_ENABLE                   67
+#define WL1273_PI_SET                           93
+#define WL1273_ECC_SET                          69
+#define WL1273_PTY                              70
+#define WL1273_AF                               71
+#define WL1273_DISPLAY_MODE                     74
+#define WL1273_RDS_REP_SET                      77
+#define WL1273_RDS_CONFIG_DATA_SET              98
+#define WL1273_RDS_DATA_SET                     99
+#define WL1273_RDS_DATA_ENB                     94
+#define WL1273_TA_SET                           78
+#define WL1273_TP_SET                           79
+#define WL1273_DI_SET                           80
+#define WL1273_MS_SET                           81
+#define WL1273_PS_SCROLL_SPEED                  82
+#define WL1273_TX_AUDIO_LEVEL_TEST              96
+#define WL1273_TX_AUDIO_LEVEL_TEST_THRESHOLD    73
+#define WL1273_TX_AUDIO_INPUT_LEVEL_RANGE_SET   54
+#define WL1273_RX_ANTENNA_SELECT                87
+#define WL1273_I2C_DEV_ADDR_SET                 86
+#define WL1273_REF_ERR_CALIB_PARAM_SET          88
+#define WL1273_REF_ERR_CALIB_PERIODICITY_SET    89
+#define WL1273_SOC_INT_TRIGGER                  52
+#define WL1273_SOC_AUDIO_PATH_SET               83
+#define WL1273_SOC_PCMI_OVERRIDE                84
+#define WL1273_SOC_I2S_OVERRIDE                 85
+#define WL1273_RSSI_BLOCK_SCAN_FREQ_SET         95
+#define WL1273_RSSI_BLOCK_SCAN_START            97
+#define WL1273_RSSI_BLOCK_SCAN_DATA_GET         5
+#define WL1273_READ_FMANT_TUNE_VALUE            104
+
+#define WL1273_RDS_OFF          0
+#define WL1273_RDS_ON           1
+#define WL1273_RDS_RESET        2
+
+#define WL1273_AUDIO_DIGITAL    0
+#define WL1273_AUDIO_ANALOG     1
+
+#define WL1273_MODE_RX          BIT(0)
+#define WL1273_MODE_TX          BIT(1)
+#define WL1273_MODE_OFF         BIT(2)
+#define WL1273_MODE_SUSPENDED   BIT(3)
+
+#define WL1273_RADIO_CHILD      BIT(0)
+#define WL1273_CODEC_CHILD      BIT(1)
+
+#define WL1273_RX_MONO          1
+#define WL1273_RX_STEREO        0
+#define WL1273_TX_MONO          0
+#define WL1273_TX_STEREO        1
+
+#define WL1273_MAX_VOLUME       0xffff
+#define WL1273_DEFAULT_VOLUME   0x78b8
+
+/* I2S protocol, left channel first, data width 16 bits */
+#define WL1273_PCM_DEF_MODE             0x00
+
+/* Rx */
+#define WL1273_AUDIO_ENABLE_I2S         BIT(0)
+#define WL1273_AUDIO_ENABLE_ANALOG      BIT(1)
+
+/* Tx */
+#define WL1273_AUDIO_IO_SET_ANALOG      0
+#define WL1273_AUDIO_IO_SET_I2S         1
+
+#define WL1273_PUPD_SET_OFF             0x00
+#define WL1273_PUPD_SET_ON              0x01
+#define WL1273_PUPD_SET_RETENTION       0x10
+
+/* I2S mode */
+#define WL1273_IS2_WIDTH_32     0x0
+#define WL1273_IS2_WIDTH_40     0x1
+#define WL1273_IS2_WIDTH_22_23  0x2
+#define WL1273_IS2_WIDTH_23_22  0x3
+#define WL1273_IS2_WIDTH_48     0x4
+#define WL1273_IS2_WIDTH_50     0x5
+#define WL1273_IS2_WIDTH_60     0x6
+#define WL1273_IS2_WIDTH_64     0x7
+#define WL1273_IS2_WIDTH_80     0x8
+#define WL1273_IS2_WIDTH_96     0x9
+#define WL1273_IS2_WIDTH_128    0xa
+#define WL1273_IS2_WIDTH        0xf
+
+#define WL1273_IS2_FORMAT_STD   (0x0 << 4)
+#define WL1273_IS2_FORMAT_LEFT  (0x1 << 4)
+#define WL1273_IS2_FORMAT_RIGHT (0x2 << 4)
+#define WL1273_IS2_FORMAT_USER  (0x3 << 4)
+
+#define WL1273_IS2_MASTER       (0x0 << 6)
+#define WL1273_IS2_SLAVEW       (0x1 << 6)
+
+#define WL1273_IS2_TRI_AFTER_SENDING    (0x0 << 7)
+#define WL1273_IS2_TRI_ALWAYS_ACTIVE    (0x1 << 7)
+
+#define WL1273_IS2_SDOWS_RR     (0x0 << 8)
+#define WL1273_IS2_SDOWS_RF     (0x1 << 8)
+#define WL1273_IS2_SDOWS_FR     (0x2 << 8)
+#define WL1273_IS2_SDOWS_FF     (0x3 << 8)
+
+#define WL1273_IS2_TRI_OPT      (0x0 << 10)
+#define WL1273_IS2_TRI_ALWAYS   (0x1 << 10)
+
+#define WL1273_IS2_RATE_48K     (0x0 << 12)
+#define WL1273_IS2_RATE_44_1K   (0x1 << 12)
+#define WL1273_IS2_RATE_32K     (0x2 << 12)
+#define WL1273_IS2_RATE_22_05K  (0x4 << 12)
+#define WL1273_IS2_RATE_16K     (0x5 << 12)
+#define WL1273_IS2_RATE_12K     (0x8 << 12)
+#define WL1273_IS2_RATE_11_025  (0x9 << 12)
+#define WL1273_IS2_RATE_8K      (0xa << 12)
+#define WL1273_IS2_RATE         (0xf << 12)
+
+#define WL1273_I2S_DEF_MODE     (WL1273_IS2_WIDTH_32 | \
+                                 WL1273_IS2_FORMAT_STD | \
+                                 WL1273_IS2_MASTER | \
+                                 WL1273_IS2_TRI_AFTER_SENDING | \
+                                 WL1273_IS2_SDOWS_RR | \
+                                 WL1273_IS2_TRI_OPT | \
+                                 WL1273_IS2_RATE_48K)
+
+#define SCHAR_MIN (-128)
+#define SCHAR_MAX 127
+
+#define WL1273_FR_EVENT                 BIT(0)
+#define WL1273_BL_EVENT                 BIT(1)
+#define WL1273_RDS_EVENT                BIT(2)
+#define WL1273_BBLK_EVENT               BIT(3)
+#define WL1273_LSYNC_EVENT              BIT(4)
+#define WL1273_LEV_EVENT                BIT(5)
+#define WL1273_IFFR_EVENT               BIT(6)
+#define WL1273_PI_EVENT                 BIT(7)
+#define WL1273_PD_EVENT                 BIT(8)
+#define WL1273_STIC_EVENT               BIT(9)
+#define WL1273_MAL_EVENT                BIT(10)
+#define WL1273_POW_ENB_EVENT            BIT(11)
+#define WL1273_SCAN_OVER_EVENT          BIT(12)
+#define WL1273_ERROR_EVENT              BIT(13)
+
+#define TUNER_MODE_STOP_SEARCH          0
+#define TUNER_MODE_PRESET               1
+#define TUNER_MODE_AUTO_SEEK            2
+#define TUNER_MODE_AF                   3
+#define TUNER_MODE_AUTO_SEEK_PI         4
+#define TUNER_MODE_AUTO_SEEK_BULK       5
+
+#define RDS_BLOCK_SIZE  3
+
+struct wl1273_fm_platform_data {
+        int (*request_resources) (struct i2c_client *client);
+        void (*free_resources) (void);
+        void (*enable) (void);
+        void (*disable) (void);
+
+        u8 forbidden_modes;
+        unsigned int children;
+};
+
+#define WL1273_FM_CORE_CELLS    2
+
+#define WL1273_BAND_OTHER       0
+#define WL1273_BAND_JAPAN       1
+
+#define WL1273_BAND_JAPAN_LOW   76000
+#define WL1273_BAND_JAPAN_HIGH  90000
+#define WL1273_BAND_OTHER_LOW   87500
+#define WL1273_BAND_OTHER_HIGH  108000
+
+#define WL1273_BAND_TX_LOW      76000
+#define WL1273_BAND_TX_HIGH     108000
+
+struct wl1273_core {
+        struct mfd_cell cells[WL1273_FM_CORE_CELLS];
+        struct wl1273_fm_platform_data *pdata;
+
+        unsigned int mode;
+        unsigned int i2s_mode;
+        unsigned int volume;
+        unsigned int audio_mode;
+        unsigned int channel_number;
+        struct mutex lock; /* for serializing fm radio operations */
+
+        struct i2c_client *client;
+
+        int (*write)(struct wl1273_core *core, u8, u16);
+        int (*set_audio)(struct wl1273_core *core, unsigned int);
+        int (*set_volume)(struct wl1273_core *core, unsigned int);
+};
+
+#endif  /* ifndef WL1273_CORE_H */
diff --git a/include/linux/mfd/wm8350/audio.h b/include/linux/mfd/wm8350/audio.h
index a95141eafce3..bd581c6fa085 100644
--- a/include/linux/mfd/wm8350/audio.h
+++ b/include/linux/mfd/wm8350/audio.h
@@ -522,9 +522,6 @@
 #define WM8350_MCLK_SEL_PLL_32K                 3
 #define WM8350_MCLK_SEL_MCLK                    5
 
-#define WM8350_MCLK_DIR_OUT                     0
-#define WM8350_MCLK_DIR_IN                      1
-
 /* clock divider id's */
 #define WM8350_ADC_CLKDIV                       0
 #define WM8350_DAC_CLKDIV                       1
diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h
index 5c51f367c061..add8a1b8bcf0 100644
--- a/include/linux/mfd/wm8994/pdata.h
+++ b/include/linux/mfd/wm8994/pdata.h
@@ -29,7 +29,7 @@ struct wm8994_ldo_pdata {
 #define WM8994_CONFIGURE_GPIO 0x8000
 
 #define WM8994_DRC_REGS 5
-#define WM8994_EQ_REGS  19
+#define WM8994_EQ_REGS  20
 
 /**
  * DRC configurations are specified with a label and a set of register