diff options
Diffstat (limited to 'include/linux/mfd/tmio.h')
| -rw-r--r-- | include/linux/mfd/tmio.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 6b9c5d06690c..9cb1834deffa 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h | |||
| @@ -2,6 +2,8 @@ | |||
| 2 | #define MFD_TMIO_H | 2 | #define MFD_TMIO_H |
| 3 | 3 | ||
| 4 | #include <linux/fb.h> | 4 | #include <linux/fb.h> |
| 5 | #include <linux/io.h> | ||
| 6 | #include <linux/platform_device.h> | ||
| 5 | 7 | ||
| 6 | #define tmio_ioread8(addr) readb(addr) | 8 | #define tmio_ioread8(addr) readb(addr) |
| 7 | #define tmio_ioread16(addr) readw(addr) | 9 | #define tmio_ioread16(addr) readw(addr) |
| @@ -18,11 +20,48 @@ | |||
| 18 | writew((val) >> 16, (addr) + 2); \ | 20 | writew((val) >> 16, (addr) + 2); \ |
| 19 | } while (0) | 21 | } while (0) |
| 20 | 22 | ||
| 23 | #define CNF_CMD 0x04 | ||
| 24 | #define CNF_CTL_BASE 0x10 | ||
| 25 | #define CNF_INT_PIN 0x3d | ||
| 26 | #define CNF_STOP_CLK_CTL 0x40 | ||
| 27 | #define CNF_GCLK_CTL 0x41 | ||
| 28 | #define CNF_SD_CLK_MODE 0x42 | ||
| 29 | #define CNF_PIN_STATUS 0x44 | ||
| 30 | #define CNF_PWR_CTL_1 0x48 | ||
| 31 | #define CNF_PWR_CTL_2 0x49 | ||
| 32 | #define CNF_PWR_CTL_3 0x4a | ||
| 33 | #define CNF_CARD_DETECT_MODE 0x4c | ||
| 34 | #define CNF_SD_SLOT 0x50 | ||
| 35 | #define CNF_EXT_GCLK_CTL_1 0xf0 | ||
| 36 | #define CNF_EXT_GCLK_CTL_2 0xf1 | ||
| 37 | #define CNF_EXT_GCLK_CTL_3 0xf9 | ||
| 38 | #define CNF_SD_LED_EN_1 0xfa | ||
| 39 | #define CNF_SD_LED_EN_2 0xfe | ||
| 40 | |||
| 41 | #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ | ||
| 42 | |||
| 43 | #define sd_config_write8(base, shift, reg, val) \ | ||
| 44 | tmio_iowrite8((val), (base) + ((reg) << (shift))) | ||
| 45 | #define sd_config_write16(base, shift, reg, val) \ | ||
| 46 | tmio_iowrite16((val), (base) + ((reg) << (shift))) | ||
| 47 | #define sd_config_write32(base, shift, reg, val) \ | ||
| 48 | do { \ | ||
| 49 | tmio_iowrite16((val), (base) + ((reg) << (shift))); \ | ||
| 50 | tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \ | ||
| 51 | } while (0) | ||
| 52 | |||
| 53 | int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); | ||
| 54 | int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); | ||
| 55 | void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state); | ||
| 56 | void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state); | ||
| 57 | |||
| 21 | /* | 58 | /* |
| 22 | * data for the MMC controller | 59 | * data for the MMC controller |
| 23 | */ | 60 | */ |
| 24 | struct tmio_mmc_data { | 61 | struct tmio_mmc_data { |
| 25 | const unsigned int hclk; | 62 | const unsigned int hclk; |
| 63 | void (*set_pwr)(struct platform_device *host, int state); | ||
| 64 | void (*set_clk_div)(struct platform_device *host, int state); | ||
| 26 | }; | 65 | }; |
| 27 | 66 | ||
| 28 | /* | 67 | /* |
