1 files changed, 79 insertions, 2 deletions

diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index d43b4f9e7fb2..1224f447356b 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -13,6 +13,56 @@
 #ifndef __LINUX_MFD_SEC_IRQ_H
 #define __LINUX_MFD_SEC_IRQ_H
 
+enum s2mpa01_irq {
+        S2MPA01_IRQ_PWRONF,
+        S2MPA01_IRQ_PWRONR,
+        S2MPA01_IRQ_JIGONBF,
+        S2MPA01_IRQ_JIGONBR,
+        S2MPA01_IRQ_ACOKBF,
+        S2MPA01_IRQ_ACOKBR,
+        S2MPA01_IRQ_PWRON1S,
+        S2MPA01_IRQ_MRB,
+
+        S2MPA01_IRQ_RTC60S,
+        S2MPA01_IRQ_RTCA1,
+        S2MPA01_IRQ_RTCA0,
+        S2MPA01_IRQ_SMPL,
+        S2MPA01_IRQ_RTC1S,
+        S2MPA01_IRQ_WTSR,
+
+        S2MPA01_IRQ_INT120C,
+        S2MPA01_IRQ_INT140C,
+        S2MPA01_IRQ_LDO3_TSD,
+        S2MPA01_IRQ_B16_TSD,
+        S2MPA01_IRQ_B24_TSD,
+        S2MPA01_IRQ_B35_TSD,
+
+        S2MPA01_IRQ_NR,
+};
+
+#define S2MPA01_IRQ_PWRONF_MASK         (1 << 0)
+#define S2MPA01_IRQ_PWRONR_MASK         (1 << 1)
+#define S2MPA01_IRQ_JIGONBF_MASK        (1 << 2)
+#define S2MPA01_IRQ_JIGONBR_MASK        (1 << 3)
+#define S2MPA01_IRQ_ACOKBF_MASK         (1 << 4)
+#define S2MPA01_IRQ_ACOKBR_MASK         (1 << 5)
+#define S2MPA01_IRQ_PWRON1S_MASK        (1 << 6)
+#define S2MPA01_IRQ_MRB_MASK            (1 << 7)
+
+#define S2MPA01_IRQ_RTC60S_MASK         (1 << 0)
+#define S2MPA01_IRQ_RTCA1_MASK          (1 << 1)
+#define S2MPA01_IRQ_RTCA0_MASK          (1 << 2)
+#define S2MPA01_IRQ_SMPL_MASK           (1 << 3)
+#define S2MPA01_IRQ_RTC1S_MASK          (1 << 4)
+#define S2MPA01_IRQ_WTSR_MASK           (1 << 5)
+
+#define S2MPA01_IRQ_INT120C_MASK        (1 << 0)
+#define S2MPA01_IRQ_INT140C_MASK        (1 << 1)
+#define S2MPA01_IRQ_LDO3_TSD_MASK       (1 << 2)
+#define S2MPA01_IRQ_B16_TSD_MASK        (1 << 3)
+#define S2MPA01_IRQ_B24_TSD_MASK        (1 << 4)
+#define S2MPA01_IRQ_B35_TSD_MASK        (1 << 5)
+
 enum s2mps11_irq {
         S2MPS11_IRQ_PWRONF,
         S2MPS11_IRQ_PWRONR,
@@ -24,8 +74,8 @@ enum s2mps11_irq {
         S2MPS11_IRQ_MRB,
 
         S2MPS11_IRQ_RTC60S,
+        S2MPS11_IRQ_RTCA0,
         S2MPS11_IRQ_RTCA1,
-        S2MPS11_IRQ_RTCA2,
         S2MPS11_IRQ_SMPL,
         S2MPS11_IRQ_RTC1S,
         S2MPS11_IRQ_WTSR,
@@ -47,7 +97,7 @@ enum s2mps11_irq {
 
 #define S2MPS11_IRQ_RTC60S_MASK         (1 << 0)
 #define S2MPS11_IRQ_RTCA1_MASK          (1 << 1)
-#define S2MPS11_IRQ_RTCA2_MASK          (1 << 2)
+#define S2MPS11_IRQ_RTCA0_MASK          (1 << 2)
 #define S2MPS11_IRQ_SMPL_MASK           (1 << 3)
 #define S2MPS11_IRQ_RTC1S_MASK          (1 << 4)
 #define S2MPS11_IRQ_WTSR_MASK           (1 << 5)
@@ -55,6 +105,33 @@ enum s2mps11_irq {
 #define S2MPS11_IRQ_INT120C_MASK        (1 << 0)
 #define S2MPS11_IRQ_INT140C_MASK        (1 << 1)
 
+enum s2mps14_irq {
+        S2MPS14_IRQ_PWRONF,
+        S2MPS14_IRQ_PWRONR,
+        S2MPS14_IRQ_JIGONBF,
+        S2MPS14_IRQ_JIGONBR,
+        S2MPS14_IRQ_ACOKBF,
+        S2MPS14_IRQ_ACOKBR,
+        S2MPS14_IRQ_PWRON1S,
+        S2MPS14_IRQ_MRB,
+
+        S2MPS14_IRQ_RTC60S,
+        S2MPS14_IRQ_RTCA1,
+        S2MPS14_IRQ_RTCA0,
+        S2MPS14_IRQ_SMPL,
+        S2MPS14_IRQ_RTC1S,
+        S2MPS14_IRQ_WTSR,
+
+        S2MPS14_IRQ_INT120C,
+        S2MPS14_IRQ_INT140C,
+        S2MPS14_IRQ_TSD,
+
+        S2MPS14_IRQ_NR,
+};
+
+/* Masks for interrupts are the same as in s2mps11 */
+#define S2MPS14_IRQ_TSD_MASK            (1 << 2)
+
 enum s5m8767_irq {
         S5M8767_IRQ_PWRR,
         S5M8767_IRQ_PWRF,