diff options
Diffstat (limited to 'include/linux/mfd/mc13783.h')
-rw-r--r-- | include/linux/mfd/mc13783.h | 308 |
1 files changed, 133 insertions, 175 deletions
diff --git a/include/linux/mfd/mc13783.h b/include/linux/mfd/mc13783.h index 0fa44fb8dd26..7d0f3d6a0002 100644 --- a/include/linux/mfd/mc13783.h +++ b/include/linux/mfd/mc13783.h | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright 2009 Pengutronix | 2 | * Copyright 2010 Yong Shen <yong.shen@linaro.org> |
3 | * Copyright 2009-2010 Pengutronix | ||
3 | * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> | 4 | * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> |
4 | * | 5 | * |
5 | * This program is free software; you can redistribute it and/or modify it under | 6 | * This program is free software; you can redistribute it and/or modify it under |
@@ -9,48 +10,83 @@ | |||
9 | #ifndef __LINUX_MFD_MC13783_H | 10 | #ifndef __LINUX_MFD_MC13783_H |
10 | #define __LINUX_MFD_MC13783_H | 11 | #define __LINUX_MFD_MC13783_H |
11 | 12 | ||
12 | #include <linux/interrupt.h> | 13 | #include <linux/mfd/mc13xxx.h> |
13 | 14 | ||
14 | struct mc13783; | 15 | struct mc13783; |
15 | 16 | ||
16 | void mc13783_lock(struct mc13783 *mc13783); | 17 | struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783); |
17 | void mc13783_unlock(struct mc13783 *mc13783); | ||
18 | 18 | ||
19 | int mc13783_reg_read(struct mc13783 *mc13783, unsigned int offset, u32 *val); | 19 | static inline void mc13783_lock(struct mc13783 *mc13783) |
20 | int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val); | 20 | { |
21 | int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset, | 21 | mc13xxx_lock(mc13783_to_mc13xxx(mc13783)); |
22 | u32 mask, u32 val); | 22 | } |
23 | |||
24 | static inline void mc13783_unlock(struct mc13783 *mc13783) | ||
25 | { | ||
26 | mc13xxx_unlock(mc13783_to_mc13xxx(mc13783)); | ||
27 | } | ||
28 | |||
29 | static inline int mc13783_reg_read(struct mc13783 *mc13783, | ||
30 | unsigned int offset, u32 *val) | ||
31 | { | ||
32 | return mc13xxx_reg_read(mc13783_to_mc13xxx(mc13783), offset, val); | ||
33 | } | ||
34 | |||
35 | static inline int mc13783_reg_write(struct mc13783 *mc13783, | ||
36 | unsigned int offset, u32 val) | ||
37 | { | ||
38 | return mc13xxx_reg_write(mc13783_to_mc13xxx(mc13783), offset, val); | ||
39 | } | ||
40 | |||
41 | static inline int mc13783_reg_rmw(struct mc13783 *mc13783, | ||
42 | unsigned int offset, u32 mask, u32 val) | ||
43 | { | ||
44 | return mc13xxx_reg_rmw(mc13783_to_mc13xxx(mc13783), offset, mask, val); | ||
45 | } | ||
23 | 46 | ||
24 | int mc13783_get_flags(struct mc13783 *mc13783); | 47 | static inline int mc13783_get_flags(struct mc13783 *mc13783) |
48 | { | ||
49 | return mc13xxx_get_flags(mc13783_to_mc13xxx(mc13783)); | ||
50 | } | ||
25 | 51 | ||
26 | int mc13783_irq_request(struct mc13783 *mc13783, int irq, | 52 | static inline int mc13783_irq_request(struct mc13783 *mc13783, int irq, |
27 | irq_handler_t handler, const char *name, void *dev); | 53 | irq_handler_t handler, const char *name, void *dev) |
28 | int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq, | 54 | { |
29 | irq_handler_t handler, const char *name, void *dev); | 55 | return mc13xxx_irq_request(mc13783_to_mc13xxx(mc13783), irq, |
30 | int mc13783_irq_free(struct mc13783 *mc13783, int irq, void *dev); | 56 | handler, name, dev); |
57 | } | ||
31 | 58 | ||
32 | int mc13783_irq_mask(struct mc13783 *mc13783, int irq); | 59 | static inline int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq, |
33 | int mc13783_irq_unmask(struct mc13783 *mc13783, int irq); | 60 | irq_handler_t handler, const char *name, void *dev) |
34 | int mc13783_irq_status(struct mc13783 *mc13783, int irq, | 61 | { |
35 | int *enabled, int *pending); | 62 | return mc13xxx_irq_request_nounmask(mc13783_to_mc13xxx(mc13783), irq, |
36 | int mc13783_irq_ack(struct mc13783 *mc13783, int irq); | 63 | handler, name, dev); |
64 | } | ||
37 | 65 | ||
38 | static inline int mc13783_mask(struct mc13783 *mc13783, int irq) __deprecated; | 66 | static inline int mc13783_irq_free(struct mc13783 *mc13783, int irq, void *dev) |
39 | static inline int mc13783_mask(struct mc13783 *mc13783, int irq) | ||
40 | { | 67 | { |
41 | return mc13783_irq_mask(mc13783, irq); | 68 | return mc13xxx_irq_free(mc13783_to_mc13xxx(mc13783), irq, dev); |
42 | } | 69 | } |
43 | 70 | ||
44 | static inline int mc13783_unmask(struct mc13783 *mc13783, int irq) __deprecated; | 71 | static inline int mc13783_irq_mask(struct mc13783 *mc13783, int irq) |
45 | static inline int mc13783_unmask(struct mc13783 *mc13783, int irq) | ||
46 | { | 72 | { |
47 | return mc13783_irq_unmask(mc13783, irq); | 73 | return mc13xxx_irq_mask(mc13783_to_mc13xxx(mc13783), irq); |
48 | } | 74 | } |
49 | 75 | ||
50 | static inline int mc13783_ackirq(struct mc13783 *mc13783, int irq) __deprecated; | 76 | static inline int mc13783_irq_unmask(struct mc13783 *mc13783, int irq) |
51 | static inline int mc13783_ackirq(struct mc13783 *mc13783, int irq) | ||
52 | { | 77 | { |
53 | return mc13783_irq_ack(mc13783, irq); | 78 | return mc13xxx_irq_unmask(mc13783_to_mc13xxx(mc13783), irq); |
79 | } | ||
80 | static inline int mc13783_irq_status(struct mc13783 *mc13783, int irq, | ||
81 | int *enabled, int *pending) | ||
82 | { | ||
83 | return mc13xxx_irq_status(mc13783_to_mc13xxx(mc13783), | ||
84 | irq, enabled, pending); | ||
85 | } | ||
86 | |||
87 | static inline int mc13783_irq_ack(struct mc13783 *mc13783, int irq) | ||
88 | { | ||
89 | return mc13xxx_irq_ack(mc13783_to_mc13xxx(mc13783), irq); | ||
54 | } | 90 | } |
55 | 91 | ||
56 | #define MC13783_ADC0 43 | 92 | #define MC13783_ADC0 43 |
@@ -66,96 +102,18 @@ static inline int mc13783_ackirq(struct mc13783 *mc13783, int irq) | |||
66 | MC13783_ADC0_TSMOD1 | \ | 102 | MC13783_ADC0_TSMOD1 | \ |
67 | MC13783_ADC0_TSMOD2) | 103 | MC13783_ADC0_TSMOD2) |
68 | 104 | ||
69 | struct mc13783_led_platform_data { | 105 | #define mc13783_regulator_init_data mc13xxx_regulator_init_data |
70 | #define MC13783_LED_MD 0 | 106 | #define mc13783_regulator_platform_data mc13xxx_regulator_platform_data |
71 | #define MC13783_LED_AD 1 | 107 | #define mc13783_led_platform_data mc13xxx_led_platform_data |
72 | #define MC13783_LED_KP 2 | 108 | #define mc13783_leds_platform_data mc13xxx_leds_platform_data |
73 | #define MC13783_LED_R1 3 | 109 | |
74 | #define MC13783_LED_G1 4 | 110 | #define mc13783_platform_data mc13xxx_platform_data |
75 | #define MC13783_LED_B1 5 | 111 | #define MC13783_USE_TOUCHSCREEN MC13XXX_USE_TOUCHSCREEN |
76 | #define MC13783_LED_R2 6 | 112 | #define MC13783_USE_CODEC MC13XXX_USE_CODEC |
77 | #define MC13783_LED_G2 7 | 113 | #define MC13783_USE_ADC MC13XXX_USE_ADC |
78 | #define MC13783_LED_B2 8 | 114 | #define MC13783_USE_RTC MC13XXX_USE_RTC |
79 | #define MC13783_LED_R3 9 | 115 | #define MC13783_USE_REGULATOR MC13XXX_USE_REGULATOR |
80 | #define MC13783_LED_G3 10 | 116 | #define MC13783_USE_LED MC13XXX_USE_LED |
81 | #define MC13783_LED_B3 11 | ||
82 | #define MC13783_LED_MAX MC13783_LED_B3 | ||
83 | int id; | ||
84 | const char *name; | ||
85 | const char *default_trigger; | ||
86 | |||
87 | /* Three or two bits current selection depending on the led */ | ||
88 | char max_current; | ||
89 | }; | ||
90 | |||
91 | struct mc13783_leds_platform_data { | ||
92 | int num_leds; | ||
93 | struct mc13783_led_platform_data *led; | ||
94 | |||
95 | #define MC13783_LED_TRIODE_MD (1 << 0) | ||
96 | #define MC13783_LED_TRIODE_AD (1 << 1) | ||
97 | #define MC13783_LED_TRIODE_KP (1 << 2) | ||
98 | #define MC13783_LED_BOOST_EN (1 << 3) | ||
99 | #define MC13783_LED_TC1HALF (1 << 4) | ||
100 | #define MC13783_LED_SLEWLIMTC (1 << 5) | ||
101 | #define MC13783_LED_SLEWLIMBL (1 << 6) | ||
102 | #define MC13783_LED_TRIODE_TC1 (1 << 7) | ||
103 | #define MC13783_LED_TRIODE_TC2 (1 << 8) | ||
104 | #define MC13783_LED_TRIODE_TC3 (1 << 9) | ||
105 | int flags; | ||
106 | |||
107 | #define MC13783_LED_AB_DISABLED 0 | ||
108 | #define MC13783_LED_AB_MD1 1 | ||
109 | #define MC13783_LED_AB_MD12 2 | ||
110 | #define MC13783_LED_AB_MD123 3 | ||
111 | #define MC13783_LED_AB_MD1234 4 | ||
112 | #define MC13783_LED_AB_MD1234_AD1 5 | ||
113 | #define MC13783_LED_AB_MD1234_AD12 6 | ||
114 | #define MC13783_LED_AB_MD1_AD 7 | ||
115 | char abmode; | ||
116 | |||
117 | #define MC13783_LED_ABREF_200MV 0 | ||
118 | #define MC13783_LED_ABREF_400MV 1 | ||
119 | #define MC13783_LED_ABREF_600MV 2 | ||
120 | #define MC13783_LED_ABREF_800MV 3 | ||
121 | char abref; | ||
122 | |||
123 | #define MC13783_LED_PERIOD_10MS 0 | ||
124 | #define MC13783_LED_PERIOD_100MS 1 | ||
125 | #define MC13783_LED_PERIOD_500MS 2 | ||
126 | #define MC13783_LED_PERIOD_2S 3 | ||
127 | char bl_period; | ||
128 | char tc1_period; | ||
129 | char tc2_period; | ||
130 | char tc3_period; | ||
131 | }; | ||
132 | |||
133 | /* to be cleaned up */ | ||
134 | struct regulator_init_data; | ||
135 | |||
136 | struct mc13783_regulator_init_data { | ||
137 | int id; | ||
138 | struct regulator_init_data *init_data; | ||
139 | }; | ||
140 | |||
141 | struct mc13783_regulator_platform_data { | ||
142 | int num_regulators; | ||
143 | struct mc13783_regulator_init_data *regulators; | ||
144 | }; | ||
145 | |||
146 | struct mc13783_platform_data { | ||
147 | int num_regulators; | ||
148 | struct mc13783_regulator_init_data *regulators; | ||
149 | struct mc13783_leds_platform_data *leds; | ||
150 | |||
151 | #define MC13783_USE_TOUCHSCREEN (1 << 0) | ||
152 | #define MC13783_USE_CODEC (1 << 1) | ||
153 | #define MC13783_USE_ADC (1 << 2) | ||
154 | #define MC13783_USE_RTC (1 << 3) | ||
155 | #define MC13783_USE_REGULATOR (1 << 4) | ||
156 | #define MC13783_USE_LED (1 << 5) | ||
157 | unsigned int flags; | ||
158 | }; | ||
159 | 117 | ||
160 | #define MC13783_ADC_MODE_TS 1 | 118 | #define MC13783_ADC_MODE_TS 1 |
161 | #define MC13783_ADC_MODE_SINGLE_CHAN 2 | 119 | #define MC13783_ADC_MODE_SINGLE_CHAN 2 |
@@ -165,80 +123,80 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | |||
165 | unsigned int channel, unsigned int *sample); | 123 | unsigned int channel, unsigned int *sample); |
166 | 124 | ||
167 | 125 | ||
168 | #define MC13783_SW_SW1A 0 | 126 | #define MC13783_REG_SW1A 0 |
169 | #define MC13783_SW_SW1B 1 | 127 | #define MC13783_REG_SW1B 1 |
170 | #define MC13783_SW_SW2A 2 | 128 | #define MC13783_REG_SW2A 2 |
171 | #define MC13783_SW_SW2B 3 | 129 | #define MC13783_REG_SW2B 3 |
172 | #define MC13783_SW_SW3 4 | 130 | #define MC13783_REG_SW3 4 |
173 | #define MC13783_SW_PLL 5 | 131 | #define MC13783_REG_PLL 5 |
174 | #define MC13783_REGU_VAUDIO 6 | 132 | #define MC13783_REG_VAUDIO 6 |
175 | #define MC13783_REGU_VIOHI 7 | 133 | #define MC13783_REG_VIOHI 7 |
176 | #define MC13783_REGU_VIOLO 8 | 134 | #define MC13783_REG_VIOLO 8 |
177 | #define MC13783_REGU_VDIG 9 | 135 | #define MC13783_REG_VDIG 9 |
178 | #define MC13783_REGU_VGEN 10 | 136 | #define MC13783_REG_VGEN 10 |
179 | #define MC13783_REGU_VRFDIG 11 | 137 | #define MC13783_REG_VRFDIG 11 |
180 | #define MC13783_REGU_VRFREF 12 | 138 | #define MC13783_REG_VRFREF 12 |
181 | #define MC13783_REGU_VRFCP 13 | 139 | #define MC13783_REG_VRFCP 13 |
182 | #define MC13783_REGU_VSIM 14 | 140 | #define MC13783_REG_VSIM 14 |
183 | #define MC13783_REGU_VESIM 15 | 141 | #define MC13783_REG_VESIM 15 |
184 | #define MC13783_REGU_VCAM 16 | 142 | #define MC13783_REG_VCAM 16 |
185 | #define MC13783_REGU_VRFBG 17 | 143 | #define MC13783_REG_VRFBG 17 |
186 | #define MC13783_REGU_VVIB 18 | 144 | #define MC13783_REG_VVIB 18 |
187 | #define MC13783_REGU_VRF1 19 | 145 | #define MC13783_REG_VRF1 19 |
188 | #define MC13783_REGU_VRF2 20 | 146 | #define MC13783_REG_VRF2 20 |
189 | #define MC13783_REGU_VMMC1 21 | 147 | #define MC13783_REG_VMMC1 21 |
190 | #define MC13783_REGU_VMMC2 22 | 148 | #define MC13783_REG_VMMC2 22 |
191 | #define MC13783_REGU_GPO1 23 | 149 | #define MC13783_REG_GPO1 23 |
192 | #define MC13783_REGU_GPO2 24 | 150 | #define MC13783_REG_GPO2 24 |
193 | #define MC13783_REGU_GPO3 25 | 151 | #define MC13783_REG_GPO3 25 |
194 | #define MC13783_REGU_GPO4 26 | 152 | #define MC13783_REG_GPO4 26 |
195 | #define MC13783_REGU_V1 27 | 153 | #define MC13783_REG_V1 27 |
196 | #define MC13783_REGU_V2 28 | 154 | #define MC13783_REG_V2 28 |
197 | #define MC13783_REGU_V3 29 | 155 | #define MC13783_REG_V3 29 |
198 | #define MC13783_REGU_V4 30 | 156 | #define MC13783_REG_V4 30 |
199 | #define MC13783_REGU_PWGT1SPI 31 | 157 | #define MC13783_REG_PWGT1SPI 31 |
200 | #define MC13783_REGU_PWGT2SPI 32 | 158 | #define MC13783_REG_PWGT2SPI 32 |
201 | 159 | ||
202 | #define MC13783_IRQ_ADCDONE 0 | 160 | #define MC13783_IRQ_ADCDONE MC13XXX_IRQ_ADCDONE |
203 | #define MC13783_IRQ_ADCBISDONE 1 | 161 | #define MC13783_IRQ_ADCBISDONE MC13XXX_IRQ_ADCBISDONE |
204 | #define MC13783_IRQ_TS 2 | 162 | #define MC13783_IRQ_TS MC13XXX_IRQ_TS |
205 | #define MC13783_IRQ_WHIGH 3 | 163 | #define MC13783_IRQ_WHIGH 3 |
206 | #define MC13783_IRQ_WLOW 4 | 164 | #define MC13783_IRQ_WLOW 4 |
207 | #define MC13783_IRQ_CHGDET 6 | 165 | #define MC13783_IRQ_CHGDET MC13XXX_IRQ_CHGDET |
208 | #define MC13783_IRQ_CHGOV 7 | 166 | #define MC13783_IRQ_CHGOV 7 |
209 | #define MC13783_IRQ_CHGREV 8 | 167 | #define MC13783_IRQ_CHGREV MC13XXX_IRQ_CHGREV |
210 | #define MC13783_IRQ_CHGSHORT 9 | 168 | #define MC13783_IRQ_CHGSHORT MC13XXX_IRQ_CHGSHORT |
211 | #define MC13783_IRQ_CCCV 10 | 169 | #define MC13783_IRQ_CCCV MC13XXX_IRQ_CCCV |
212 | #define MC13783_IRQ_CHGCURR 11 | 170 | #define MC13783_IRQ_CHGCURR MC13XXX_IRQ_CHGCURR |
213 | #define MC13783_IRQ_BPON 12 | 171 | #define MC13783_IRQ_BPON MC13XXX_IRQ_BPON |
214 | #define MC13783_IRQ_LOBATL 13 | 172 | #define MC13783_IRQ_LOBATL MC13XXX_IRQ_LOBATL |
215 | #define MC13783_IRQ_LOBATH 14 | 173 | #define MC13783_IRQ_LOBATH MC13XXX_IRQ_LOBATH |
216 | #define MC13783_IRQ_UDP 15 | 174 | #define MC13783_IRQ_UDP 15 |
217 | #define MC13783_IRQ_USB 16 | 175 | #define MC13783_IRQ_USB 16 |
218 | #define MC13783_IRQ_ID 19 | 176 | #define MC13783_IRQ_ID 19 |
219 | #define MC13783_IRQ_SE1 21 | 177 | #define MC13783_IRQ_SE1 21 |
220 | #define MC13783_IRQ_CKDET 22 | 178 | #define MC13783_IRQ_CKDET 22 |
221 | #define MC13783_IRQ_UDM 23 | 179 | #define MC13783_IRQ_UDM 23 |
222 | #define MC13783_IRQ_1HZ 24 | 180 | #define MC13783_IRQ_1HZ MC13XXX_IRQ_1HZ |
223 | #define MC13783_IRQ_TODA 25 | 181 | #define MC13783_IRQ_TODA MC13XXX_IRQ_TODA |
224 | #define MC13783_IRQ_ONOFD1 27 | 182 | #define MC13783_IRQ_ONOFD1 27 |
225 | #define MC13783_IRQ_ONOFD2 28 | 183 | #define MC13783_IRQ_ONOFD2 28 |
226 | #define MC13783_IRQ_ONOFD3 29 | 184 | #define MC13783_IRQ_ONOFD3 29 |
227 | #define MC13783_IRQ_SYSRST 30 | 185 | #define MC13783_IRQ_SYSRST MC13XXX_IRQ_SYSRST |
228 | #define MC13783_IRQ_RTCRST 31 | 186 | #define MC13783_IRQ_RTCRST MC13XXX_IRQ_RTCRST |
229 | #define MC13783_IRQ_PC 32 | 187 | #define MC13783_IRQ_PC MC13XXX_IRQ_PC |
230 | #define MC13783_IRQ_WARM 33 | 188 | #define MC13783_IRQ_WARM MC13XXX_IRQ_WARM |
231 | #define MC13783_IRQ_MEMHLD 34 | 189 | #define MC13783_IRQ_MEMHLD MC13XXX_IRQ_MEMHLD |
232 | #define MC13783_IRQ_PWRRDY 35 | 190 | #define MC13783_IRQ_PWRRDY 35 |
233 | #define MC13783_IRQ_THWARNL 36 | 191 | #define MC13783_IRQ_THWARNL MC13XXX_IRQ_THWARNL |
234 | #define MC13783_IRQ_THWARNH 37 | 192 | #define MC13783_IRQ_THWARNH MC13XXX_IRQ_THWARNH |
235 | #define MC13783_IRQ_CLK 38 | 193 | #define MC13783_IRQ_CLK MC13XXX_IRQ_CLK |
236 | #define MC13783_IRQ_SEMAF 39 | 194 | #define MC13783_IRQ_SEMAF 39 |
237 | #define MC13783_IRQ_MC2B 41 | 195 | #define MC13783_IRQ_MC2B 41 |
238 | #define MC13783_IRQ_HSDET 42 | 196 | #define MC13783_IRQ_HSDET 42 |
239 | #define MC13783_IRQ_HSL 43 | 197 | #define MC13783_IRQ_HSL 43 |
240 | #define MC13783_IRQ_ALSPTH 44 | 198 | #define MC13783_IRQ_ALSPTH 44 |
241 | #define MC13783_IRQ_AHSSHORT 45 | 199 | #define MC13783_IRQ_AHSSHORT 45 |
242 | #define MC13783_NUM_IRQ 46 | 200 | #define MC13783_NUM_IRQ MC13XXX_NUM_IRQ |
243 | 201 | ||
244 | #endif /* __LINUX_MFD_MC13783_H */ | 202 | #endif /* ifndef __LINUX_MFD_MC13783_H */ |