aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/mdio.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux/mdio.h')
-rw-r--r--include/linux/mdio.h28
1 files changed, 24 insertions, 4 deletions
diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index dfb947959ec9..7cccafe50e7b 100644
--- a/include/linux/mdio.h
+++ b/include/linux/mdio.h
@@ -43,7 +43,11 @@
43#define MDIO_PKGID2 15 43#define MDIO_PKGID2 15
44#define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ 44#define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
45#define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ 45#define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
46#define MDIO_PCS_EEE_ABLE 20 /* EEE Capability register */
47#define MDIO_PCS_EEE_WK_ERR 22 /* EEE wake error counter */
46#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ 48#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */
49#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */
50#define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */
47 51
48/* Media-dependent registers. */ 52/* Media-dependent registers. */
49#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ 53#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
@@ -56,7 +60,6 @@
56#define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ 60#define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */
57#define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */ 61#define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */
58#define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */ 62#define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */
59#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */
60 63
61/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ 64/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
62#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ 65#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */
@@ -82,6 +85,7 @@
82#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART 85#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART
83#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE 86#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE
84#define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */ 87#define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */
88#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */
85 89
86/* 10 Gb/s */ 90/* 10 Gb/s */
87#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) 91#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00)
@@ -237,9 +241,25 @@
237#define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */ 241#define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */
238#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */ 242#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */
239 243
240/* AN EEE Advertisement register. */ 244/* EEE Supported/Advertisement/LP Advertisement registers.
241#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ 245 *
242#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ 246 * EEE capability Register (3.20), Advertisement (7.60) and
247 * Link partner ability (7.61) registers have and can use the same identical
248 * bit masks.
249 */
250#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */
251#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */
252/* Note: the two defines above can be potentially used by the user-land
253 * and cannot remove them now.
254 * So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros
255 * using the previous ones (that can be considered obsolete).
256 */
257#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */
258#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */
259#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */
260#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */
261#define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */
262#define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */
243 263
244/* LASI RX_ALARM control/status registers. */ 264/* LASI RX_ALARM control/status registers. */
245#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */ 265#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */