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-rw-r--r--include/linux/libata.h24
1 files changed, 10 insertions, 14 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index d35b1e3bb7e0..bf86ee474533 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -122,6 +122,7 @@ enum {
122 /* struct ata_device stuff */ 122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */ 123 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
124 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */ 124 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
125 ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */
125 ATA_DFLAG_CFG_MASK = (1 << 8) - 1, 126 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
126 127
127 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */ 128 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */
@@ -145,9 +146,9 @@ enum {
145 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */ 146 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
146 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */ 147 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
147 ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */ 148 ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */
149 ATA_FLAG_PIO_POLLING = (1 << 10), /* use polling PIO if LLD
150 * doesn't handle PIO interrupts */
148 151
149 ATA_FLAG_NOINTR = (1 << 16), /* FIXME: Remove this once
150 * proper HSM is in place. */
151 ATA_FLAG_DEBUGMSG = (1 << 17), 152 ATA_FLAG_DEBUGMSG = (1 << 17),
152 ATA_FLAG_FLUSH_PORT_TASK = (1 << 18), /* flush port task */ 153 ATA_FLAG_FLUSH_PORT_TASK = (1 << 18), /* flush port task */
153 154
@@ -168,11 +169,8 @@ enum {
168 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */ 169 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
169 170
170 /* various lengths of time */ 171 /* various lengths of time */
171 ATA_TMOUT_PIO = 30 * HZ,
172 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 172 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
173 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 173 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
174 ATA_TMOUT_CDB = 30 * HZ,
175 ATA_TMOUT_CDB_QUICK = 5 * HZ,
176 ATA_TMOUT_INTERNAL = 30 * HZ, 174 ATA_TMOUT_INTERNAL = 30 * HZ,
177 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, 175 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
178 176
@@ -221,14 +219,13 @@ enum {
221}; 219};
222 220
223enum hsm_task_states { 221enum hsm_task_states {
224 HSM_ST_UNKNOWN, 222 HSM_ST_UNKNOWN, /* state unknown */
225 HSM_ST_IDLE, 223 HSM_ST_IDLE, /* no command on going */
226 HSM_ST_POLL, 224 HSM_ST, /* (waiting the device to) transfer data */
227 HSM_ST_TMOUT, 225 HSM_ST_LAST, /* (waiting the device to) complete command */
228 HSM_ST, 226 HSM_ST_ERR, /* error */
229 HSM_ST_LAST, 227 HSM_ST_FIRST, /* (waiting the device to)
230 HSM_ST_LAST_POLL, 228 write CDB or first data block */
231 HSM_ST_ERR,
232}; 229};
233 230
234enum ata_completion_errors { 231enum ata_completion_errors {
@@ -419,7 +416,6 @@ struct ata_port {
419 struct work_struct port_task; 416 struct work_struct port_task;
420 417
421 unsigned int hsm_task_state; 418 unsigned int hsm_task_state;
422 unsigned long pio_task_timeout;
423 419
424 u32 msg_enable; 420 u32 msg_enable;
425 struct list_head eh_done_q; 421 struct list_head eh_done_q;