diff options
Diffstat (limited to 'include/linux/irqchip/arm-gic.h')
-rw-r--r-- | include/linux/irqchip/arm-gic.h | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index a67ca55e6f4e..3fd8e4290a1c 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h | |||
@@ -20,16 +20,45 @@ | |||
20 | 20 | ||
21 | #define GIC_DIST_CTRL 0x000 | 21 | #define GIC_DIST_CTRL 0x000 |
22 | #define GIC_DIST_CTR 0x004 | 22 | #define GIC_DIST_CTR 0x004 |
23 | #define GIC_DIST_IGROUP 0x080 | ||
23 | #define GIC_DIST_ENABLE_SET 0x100 | 24 | #define GIC_DIST_ENABLE_SET 0x100 |
24 | #define GIC_DIST_ENABLE_CLEAR 0x180 | 25 | #define GIC_DIST_ENABLE_CLEAR 0x180 |
25 | #define GIC_DIST_PENDING_SET 0x200 | 26 | #define GIC_DIST_PENDING_SET 0x200 |
26 | #define GIC_DIST_PENDING_CLEAR 0x280 | 27 | #define GIC_DIST_PENDING_CLEAR 0x280 |
27 | #define GIC_DIST_ACTIVE_BIT 0x300 | 28 | #define GIC_DIST_ACTIVE_SET 0x300 |
29 | #define GIC_DIST_ACTIVE_CLEAR 0x380 | ||
28 | #define GIC_DIST_PRI 0x400 | 30 | #define GIC_DIST_PRI 0x400 |
29 | #define GIC_DIST_TARGET 0x800 | 31 | #define GIC_DIST_TARGET 0x800 |
30 | #define GIC_DIST_CONFIG 0xc00 | 32 | #define GIC_DIST_CONFIG 0xc00 |
31 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
32 | 34 | ||
35 | #define GICH_HCR 0x0 | ||
36 | #define GICH_VTR 0x4 | ||
37 | #define GICH_VMCR 0x8 | ||
38 | #define GICH_MISR 0x10 | ||
39 | #define GICH_EISR0 0x20 | ||
40 | #define GICH_EISR1 0x24 | ||
41 | #define GICH_ELRSR0 0x30 | ||
42 | #define GICH_ELRSR1 0x34 | ||
43 | #define GICH_APR 0xf0 | ||
44 | #define GICH_LR0 0x100 | ||
45 | |||
46 | #define GICH_HCR_EN (1 << 0) | ||
47 | #define GICH_HCR_UIE (1 << 1) | ||
48 | |||
49 | #define GICH_LR_VIRTUALID (0x3ff << 0) | ||
50 | #define GICH_LR_PHYSID_CPUID_SHIFT (10) | ||
51 | #define GICH_LR_PHYSID_CPUID (7 << GICH_LR_PHYSID_CPUID_SHIFT) | ||
52 | #define GICH_LR_STATE (3 << 28) | ||
53 | #define GICH_LR_PENDING_BIT (1 << 28) | ||
54 | #define GICH_LR_ACTIVE_BIT (1 << 29) | ||
55 | #define GICH_LR_EOI (1 << 19) | ||
56 | |||
57 | #define GICH_MISR_EOI (1 << 0) | ||
58 | #define GICH_MISR_U (1 << 1) | ||
59 | |||
60 | #ifndef __ASSEMBLY__ | ||
61 | |||
33 | struct device_node; | 62 | struct device_node; |
34 | 63 | ||
35 | extern struct irq_chip gic_arch_extn; | 64 | extern struct irq_chip gic_arch_extn; |
@@ -45,4 +74,6 @@ static inline void gic_init(unsigned int nr, int start, | |||
45 | gic_init_bases(nr, start, dist, cpu, 0, NULL); | 74 | gic_init_bases(nr, start, dist, cpu, 0, NULL); |
46 | } | 75 | } |
47 | 76 | ||
77 | #endif /* __ASSEMBLY */ | ||
78 | |||
48 | #endif | 79 | #endif |