diff options
Diffstat (limited to 'include/linux/irq.h')
-rw-r--r-- | include/linux/irq.h | 346 |
1 files changed, 273 insertions, 73 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h index 676e00dfb21a..0832149cdb18 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifndef __irq_h | 1 | #ifndef _LINUX_IRQ_H |
2 | #define __irq_h | 2 | #define _LINUX_IRQ_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * Please do not include this file in generic code. There is currently | 5 | * Please do not include this file in generic code. There is currently |
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/smp.h> | 12 | #include <linux/smp.h> |
13 | 13 | ||
14 | #if !defined(CONFIG_S390) | 14 | #ifndef CONFIG_S390 |
15 | 15 | ||
16 | #include <linux/linkage.h> | 16 | #include <linux/linkage.h> |
17 | #include <linux/cache.h> | 17 | #include <linux/cache.h> |
@@ -33,75 +33,160 @@ | |||
33 | #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */ | 33 | #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */ |
34 | #define IRQ_LEVEL 64 /* IRQ level triggered */ | 34 | #define IRQ_LEVEL 64 /* IRQ level triggered */ |
35 | #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */ | 35 | #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */ |
36 | #if defined(ARCH_HAS_IRQ_PER_CPU) | 36 | #ifdef CONFIG_IRQ_PER_CPU |
37 | # define IRQ_PER_CPU 256 /* IRQ is per CPU */ | 37 | # define IRQ_PER_CPU 256 /* IRQ is per CPU */ |
38 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) | 38 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) |
39 | #else | 39 | #else |
40 | # define CHECK_IRQ_PER_CPU(var) 0 | 40 | # define CHECK_IRQ_PER_CPU(var) 0 |
41 | #endif | 41 | #endif |
42 | 42 | ||
43 | #define IRQ_NOPROBE 512 /* IRQ is not valid for probing */ | ||
44 | #define IRQ_NOREQUEST 1024 /* IRQ cannot be requested */ | ||
45 | #define IRQ_NOAUTOEN 2048 /* IRQ will not be enabled on request irq */ | ||
46 | #define IRQ_DELAYED_DISABLE \ | ||
47 | 4096 /* IRQ disable (masking) happens delayed. */ | ||
48 | |||
43 | /* | 49 | /* |
44 | * Interrupt controller descriptor. This is all we need | 50 | * IRQ types, see also include/linux/interrupt.h |
45 | * to describe about the low-level hardware. | ||
46 | */ | 51 | */ |
47 | struct hw_interrupt_type { | 52 | #define IRQ_TYPE_NONE 0x0000 /* Default, unspecified type */ |
48 | const char * typename; | 53 | #define IRQ_TYPE_EDGE_RISING 0x0001 /* Edge rising type */ |
49 | unsigned int (*startup)(unsigned int irq); | 54 | #define IRQ_TYPE_EDGE_FALLING 0x0002 /* Edge falling type */ |
50 | void (*shutdown)(unsigned int irq); | 55 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) |
51 | void (*enable)(unsigned int irq); | 56 | #define IRQ_TYPE_LEVEL_HIGH 0x0004 /* Level high type */ |
52 | void (*disable)(unsigned int irq); | 57 | #define IRQ_TYPE_LEVEL_LOW 0x0008 /* Level low type */ |
53 | void (*ack)(unsigned int irq); | 58 | #define IRQ_TYPE_SENSE_MASK 0x000f /* Mask of the above */ |
54 | void (*end)(unsigned int irq); | 59 | #define IRQ_TYPE_SIMPLE 0x0010 /* Simple type */ |
55 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | 60 | #define IRQ_TYPE_PERCPU 0x0020 /* Per CPU type */ |
61 | #define IRQ_TYPE_PROBE 0x0040 /* Probing in progress */ | ||
62 | |||
63 | struct proc_dir_entry; | ||
64 | |||
65 | /** | ||
66 | * struct irq_chip - hardware interrupt chip descriptor | ||
67 | * | ||
68 | * @name: name for /proc/interrupts | ||
69 | * @startup: start up the interrupt (defaults to ->enable if NULL) | ||
70 | * @shutdown: shut down the interrupt (defaults to ->disable if NULL) | ||
71 | * @enable: enable the interrupt (defaults to chip->unmask if NULL) | ||
72 | * @disable: disable the interrupt (defaults to chip->mask if NULL) | ||
73 | * @ack: start of a new interrupt | ||
74 | * @mask: mask an interrupt source | ||
75 | * @mask_ack: ack and mask an interrupt source | ||
76 | * @unmask: unmask an interrupt source | ||
77 | * @eoi: end of interrupt - chip level | ||
78 | * @end: end of interrupt - flow level | ||
79 | * @set_affinity: set the CPU affinity on SMP machines | ||
80 | * @retrigger: resend an IRQ to the CPU | ||
81 | * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ | ||
82 | * @set_wake: enable/disable power-management wake-on of an IRQ | ||
83 | * | ||
84 | * @release: release function solely used by UML | ||
85 | * @typename: obsoleted by name, kept as migration helper | ||
86 | */ | ||
87 | struct irq_chip { | ||
88 | const char *name; | ||
89 | unsigned int (*startup)(unsigned int irq); | ||
90 | void (*shutdown)(unsigned int irq); | ||
91 | void (*enable)(unsigned int irq); | ||
92 | void (*disable)(unsigned int irq); | ||
93 | |||
94 | void (*ack)(unsigned int irq); | ||
95 | void (*mask)(unsigned int irq); | ||
96 | void (*mask_ack)(unsigned int irq); | ||
97 | void (*unmask)(unsigned int irq); | ||
98 | void (*eoi)(unsigned int irq); | ||
99 | |||
100 | void (*end)(unsigned int irq); | ||
101 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | ||
102 | int (*retrigger)(unsigned int irq); | ||
103 | int (*set_type)(unsigned int irq, unsigned int flow_type); | ||
104 | int (*set_wake)(unsigned int irq, unsigned int on); | ||
105 | |||
56 | /* Currently used only by UML, might disappear one day.*/ | 106 | /* Currently used only by UML, might disappear one day.*/ |
57 | #ifdef CONFIG_IRQ_RELEASE_METHOD | 107 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
58 | void (*release)(unsigned int irq, void *dev_id); | 108 | void (*release)(unsigned int irq, void *dev_id); |
59 | #endif | 109 | #endif |
110 | /* | ||
111 | * For compatibility, ->typename is copied into ->name. | ||
112 | * Will disappear. | ||
113 | */ | ||
114 | const char *typename; | ||
60 | }; | 115 | }; |
61 | 116 | ||
62 | typedef struct hw_interrupt_type hw_irq_controller; | 117 | /** |
63 | 118 | * struct irq_desc - interrupt descriptor | |
64 | /* | 119 | * |
65 | * This is the "IRQ descriptor", which contains various information | 120 | * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] |
66 | * about the irq, including what kind of hardware handling it has, | 121 | * @chip: low level interrupt hardware access |
67 | * whether it is disabled etc etc. | 122 | * @handler_data: per-IRQ data for the irq_chip methods |
123 | * @chip_data: platform-specific per-chip private data for the chip | ||
124 | * methods, to allow shared chip implementations | ||
125 | * @action: the irq action chain | ||
126 | * @status: status information | ||
127 | * @depth: disable-depth, for nested irq_disable() calls | ||
128 | * @irq_count: stats field to detect stalled irqs | ||
129 | * @irqs_unhandled: stats field for spurious unhandled interrupts | ||
130 | * @lock: locking for SMP | ||
131 | * @affinity: IRQ affinity on SMP | ||
132 | * @cpu: cpu index useful for balancing | ||
133 | * @pending_mask: pending rebalanced interrupts | ||
134 | * @move_irq: need to re-target IRQ destination | ||
135 | * @dir: /proc/irq/ procfs entry | ||
136 | * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP | ||
68 | * | 137 | * |
69 | * Pad this out to 32 bytes for cache and indexing reasons. | 138 | * Pad this out to 32 bytes for cache and indexing reasons. |
70 | */ | 139 | */ |
71 | typedef struct irq_desc { | 140 | struct irq_desc { |
72 | hw_irq_controller *handler; | 141 | void fastcall (*handle_irq)(unsigned int irq, |
73 | void *handler_data; | 142 | struct irq_desc *desc, |
74 | struct irqaction *action; /* IRQ action list */ | 143 | struct pt_regs *regs); |
75 | unsigned int status; /* IRQ status */ | 144 | struct irq_chip *chip; |
76 | unsigned int depth; /* nested irq disables */ | 145 | void *handler_data; |
77 | unsigned int irq_count; /* For detecting broken interrupts */ | 146 | void *chip_data; |
78 | unsigned int irqs_unhandled; | 147 | struct irqaction *action; /* IRQ action list */ |
79 | spinlock_t lock; | 148 | unsigned int status; /* IRQ status */ |
80 | #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE) | 149 | |
81 | unsigned int move_irq; /* Flag need to re-target intr dest*/ | 150 | unsigned int depth; /* nested irq disables */ |
151 | unsigned int irq_count; /* For detecting broken IRQs */ | ||
152 | unsigned int irqs_unhandled; | ||
153 | spinlock_t lock; | ||
154 | #ifdef CONFIG_SMP | ||
155 | cpumask_t affinity; | ||
156 | unsigned int cpu; | ||
157 | #endif | ||
158 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) | ||
159 | cpumask_t pending_mask; | ||
160 | unsigned int move_irq; /* need to re-target IRQ dest */ | ||
82 | #endif | 161 | #endif |
83 | } ____cacheline_aligned irq_desc_t; | 162 | #ifdef CONFIG_PROC_FS |
163 | struct proc_dir_entry *dir; | ||
164 | #endif | ||
165 | } ____cacheline_aligned; | ||
84 | 166 | ||
85 | extern irq_desc_t irq_desc [NR_IRQS]; | 167 | extern struct irq_desc irq_desc[NR_IRQS]; |
86 | 168 | ||
87 | /* Return a pointer to the irq descriptor for IRQ. */ | 169 | /* |
88 | static inline irq_desc_t * | 170 | * Migration helpers for obsolete names, they will go away: |
89 | irq_descp (int irq) | 171 | */ |
90 | { | 172 | #define hw_interrupt_type irq_chip |
91 | return irq_desc + irq; | 173 | typedef struct irq_chip hw_irq_controller; |
92 | } | 174 | #define no_irq_type no_irq_chip |
175 | typedef struct irq_desc irq_desc_t; | ||
93 | 176 | ||
94 | #include <asm/hw_irq.h> /* the arch dependent stuff */ | 177 | /* |
178 | * Pick up the arch-dependent methods: | ||
179 | */ | ||
180 | #include <asm/hw_irq.h> | ||
95 | 181 | ||
96 | extern int setup_irq(unsigned int irq, struct irqaction * new); | 182 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
97 | 183 | ||
98 | #ifdef CONFIG_GENERIC_HARDIRQS | 184 | #ifdef CONFIG_GENERIC_HARDIRQS |
99 | extern cpumask_t irq_affinity[NR_IRQS]; | ||
100 | 185 | ||
101 | #ifdef CONFIG_SMP | 186 | #ifdef CONFIG_SMP |
102 | static inline void set_native_irq_info(int irq, cpumask_t mask) | 187 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
103 | { | 188 | { |
104 | irq_affinity[irq] = mask; | 189 | irq_desc[irq].affinity = mask; |
105 | } | 190 | } |
106 | #else | 191 | #else |
107 | static inline void set_native_irq_info(int irq, cpumask_t mask) | 192 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
@@ -111,8 +196,7 @@ static inline void set_native_irq_info(int irq, cpumask_t mask) | |||
111 | 196 | ||
112 | #ifdef CONFIG_SMP | 197 | #ifdef CONFIG_SMP |
113 | 198 | ||
114 | #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE) | 199 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
115 | extern cpumask_t pending_irq_cpumask[NR_IRQS]; | ||
116 | 200 | ||
117 | void set_pending_irq(unsigned int irq, cpumask_t mask); | 201 | void set_pending_irq(unsigned int irq, cpumask_t mask); |
118 | void move_native_irq(int irq); | 202 | void move_native_irq(int irq); |
@@ -133,7 +217,7 @@ static inline void set_irq_info(int irq, cpumask_t mask) | |||
133 | { | 217 | { |
134 | } | 218 | } |
135 | 219 | ||
136 | #else // CONFIG_PCI_MSI | 220 | #else /* CONFIG_PCI_MSI */ |
137 | 221 | ||
138 | static inline void move_irq(int irq) | 222 | static inline void move_irq(int irq) |
139 | { | 223 | { |
@@ -144,26 +228,36 @@ static inline void set_irq_info(int irq, cpumask_t mask) | |||
144 | { | 228 | { |
145 | set_native_irq_info(irq, mask); | 229 | set_native_irq_info(irq, mask); |
146 | } | 230 | } |
147 | #endif // CONFIG_PCI_MSI | ||
148 | 231 | ||
149 | #else // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE | 232 | #endif /* CONFIG_PCI_MSI */ |
233 | |||
234 | #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ | ||
235 | |||
236 | static inline void move_irq(int irq) | ||
237 | { | ||
238 | } | ||
239 | |||
240 | static inline void move_native_irq(int irq) | ||
241 | { | ||
242 | } | ||
243 | |||
244 | static inline void set_pending_irq(unsigned int irq, cpumask_t mask) | ||
245 | { | ||
246 | } | ||
150 | 247 | ||
151 | #define move_irq(x) | ||
152 | #define move_native_irq(x) | ||
153 | #define set_pending_irq(x,y) | ||
154 | static inline void set_irq_info(int irq, cpumask_t mask) | 248 | static inline void set_irq_info(int irq, cpumask_t mask) |
155 | { | 249 | { |
156 | set_native_irq_info(irq, mask); | 250 | set_native_irq_info(irq, mask); |
157 | } | 251 | } |
158 | 252 | ||
159 | #endif // CONFIG_GENERIC_PENDING_IRQ | 253 | #endif /* CONFIG_GENERIC_PENDING_IRQ */ |
160 | 254 | ||
161 | #else // CONFIG_SMP | 255 | #else /* CONFIG_SMP */ |
162 | 256 | ||
163 | #define move_irq(x) | 257 | #define move_irq(x) |
164 | #define move_native_irq(x) | 258 | #define move_native_irq(x) |
165 | 259 | ||
166 | #endif // CONFIG_SMP | 260 | #endif /* CONFIG_SMP */ |
167 | 261 | ||
168 | #ifdef CONFIG_IRQBALANCE | 262 | #ifdef CONFIG_IRQBALANCE |
169 | extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask); | 263 | extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask); |
@@ -173,32 +267,138 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) | |||
173 | } | 267 | } |
174 | #endif | 268 | #endif |
175 | 269 | ||
270 | #ifdef CONFIG_AUTO_IRQ_AFFINITY | ||
271 | extern int select_smp_affinity(unsigned int irq); | ||
272 | #else | ||
273 | static inline int select_smp_affinity(unsigned int irq) | ||
274 | { | ||
275 | return 1; | ||
276 | } | ||
277 | #endif | ||
278 | |||
176 | extern int no_irq_affinity; | 279 | extern int no_irq_affinity; |
177 | extern int noirqdebug_setup(char *str); | ||
178 | 280 | ||
179 | extern fastcall irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, | 281 | /* Handle irq action chains: */ |
180 | struct irqaction *action); | 282 | extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, |
283 | struct irqaction *action); | ||
284 | |||
285 | /* | ||
286 | * Built-in IRQ handlers for various IRQ types, | ||
287 | * callable via desc->chip->handle_irq() | ||
288 | */ | ||
289 | extern void fastcall | ||
290 | handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
291 | extern void fastcall | ||
292 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc, | ||
293 | struct pt_regs *regs); | ||
294 | extern void fastcall | ||
295 | handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
296 | extern void fastcall | ||
297 | handle_simple_irq(unsigned int irq, struct irq_desc *desc, | ||
298 | struct pt_regs *regs); | ||
299 | extern void fastcall | ||
300 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc, | ||
301 | struct pt_regs *regs); | ||
302 | extern void fastcall | ||
303 | handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs); | ||
304 | |||
305 | /* | ||
306 | * Get a descriptive string for the highlevel handler, for | ||
307 | * /proc/interrupts output: | ||
308 | */ | ||
309 | extern const char * | ||
310 | handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
311 | struct pt_regs *)); | ||
312 | |||
313 | /* | ||
314 | * Monolithic do_IRQ implementation. | ||
315 | * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly) | ||
316 | */ | ||
181 | extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); | 317 | extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); |
182 | extern void note_interrupt(unsigned int irq, irq_desc_t *desc, | ||
183 | int action_ret, struct pt_regs *regs); | ||
184 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); | ||
185 | 318 | ||
319 | /* | ||
320 | * Architectures call this to let the generic IRQ layer | ||
321 | * handle an interrupt. If the descriptor is attached to an | ||
322 | * irqchip-style controller then we call the ->handle_irq() handler, | ||
323 | * and it calls __do_IRQ() if it's attached to an irqtype-style controller. | ||
324 | */ | ||
325 | static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs) | ||
326 | { | ||
327 | struct irq_desc *desc = irq_desc + irq; | ||
328 | |||
329 | if (likely(desc->handle_irq)) | ||
330 | desc->handle_irq(irq, desc, regs); | ||
331 | else | ||
332 | __do_IRQ(irq, regs); | ||
333 | } | ||
334 | |||
335 | /* Handling of unhandled and spurious interrupts: */ | ||
336 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, | ||
337 | int action_ret, struct pt_regs *regs); | ||
338 | |||
339 | /* Resending of interrupts :*/ | ||
340 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | ||
341 | |||
342 | /* Initialize /proc/irq/ */ | ||
186 | extern void init_irq_proc(void); | 343 | extern void init_irq_proc(void); |
187 | 344 | ||
188 | #ifdef CONFIG_AUTO_IRQ_AFFINITY | 345 | /* Enable/disable irq debugging output: */ |
189 | extern int select_smp_affinity(unsigned int irq); | 346 | extern int noirqdebug_setup(char *str); |
190 | #else | 347 | |
191 | static inline int | 348 | /* Checks whether the interrupt can be requested by request_irq(): */ |
192 | select_smp_affinity(unsigned int irq) | 349 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); |
350 | |||
351 | /* Dummy irq-chip implementation: */ | ||
352 | extern struct irq_chip no_irq_chip; | ||
353 | |||
354 | extern void | ||
355 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | ||
356 | void fastcall (*handle)(unsigned int, | ||
357 | struct irq_desc *, | ||
358 | struct pt_regs *)); | ||
359 | extern void | ||
360 | __set_irq_handler(unsigned int irq, | ||
361 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
362 | struct pt_regs *), | ||
363 | int is_chained); | ||
364 | |||
365 | /* | ||
366 | * Set a highlevel flow handler for a given IRQ: | ||
367 | */ | ||
368 | static inline void | ||
369 | set_irq_handler(unsigned int irq, | ||
370 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
371 | struct pt_regs *)) | ||
193 | { | 372 | { |
194 | return 1; | 373 | __set_irq_handler(irq, handle, 0); |
195 | } | 374 | } |
196 | #endif | ||
197 | 375 | ||
198 | #endif | 376 | /* |
377 | * Set a highlevel chained flow handler for a given IRQ. | ||
378 | * (a chained handler is automatically enabled and set to | ||
379 | * IRQ_NOREQUEST and IRQ_NOPROBE) | ||
380 | */ | ||
381 | static inline void | ||
382 | set_irq_chained_handler(unsigned int irq, | ||
383 | void fastcall (*handle)(unsigned int, struct irq_desc *, | ||
384 | struct pt_regs *)) | ||
385 | { | ||
386 | __set_irq_handler(irq, handle, 1); | ||
387 | } | ||
199 | 388 | ||
200 | extern hw_irq_controller no_irq_type; /* needed in every arch ? */ | 389 | /* Set/get chip/data for an IRQ: */ |
201 | 390 | ||
202 | #endif | 391 | extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); |
392 | extern int set_irq_data(unsigned int irq, void *data); | ||
393 | extern int set_irq_chip_data(unsigned int irq, void *data); | ||
394 | extern int set_irq_type(unsigned int irq, unsigned int type); | ||
395 | |||
396 | #define get_irq_chip(irq) (irq_desc[irq].chip) | ||
397 | #define get_irq_chip_data(irq) (irq_desc[irq].chip_data) | ||
398 | #define get_irq_data(irq) (irq_desc[irq].handler_data) | ||
399 | |||
400 | #endif /* CONFIG_GENERIC_HARDIRQS */ | ||
401 | |||
402 | #endif /* !CONFIG_S390 */ | ||
203 | 403 | ||
204 | #endif /* __irq_h */ | 404 | #endif /* _LINUX_IRQ_H */ |