diff options
Diffstat (limited to 'include/linux/intel-iommu.h')
-rw-r--r-- | include/linux/intel-iommu.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 2e117f30a76c..0c5f5e49107b 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h | |||
@@ -127,6 +127,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val) | |||
127 | 127 | ||
128 | 128 | ||
129 | /* IOTLB_REG */ | 129 | /* IOTLB_REG */ |
130 | #define DMA_TLB_FLUSH_GRANU_OFFSET 60 | ||
130 | #define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60) | 131 | #define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60) |
131 | #define DMA_TLB_DSI_FLUSH (((u64)2) << 60) | 132 | #define DMA_TLB_DSI_FLUSH (((u64)2) << 60) |
132 | #define DMA_TLB_PSI_FLUSH (((u64)3) << 60) | 133 | #define DMA_TLB_PSI_FLUSH (((u64)3) << 60) |
@@ -140,6 +141,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val) | |||
140 | #define DMA_TLB_MAX_SIZE (0x3f) | 141 | #define DMA_TLB_MAX_SIZE (0x3f) |
141 | 142 | ||
142 | /* INVALID_DESC */ | 143 | /* INVALID_DESC */ |
144 | #define DMA_CCMD_INVL_GRANU_OFFSET 61 | ||
143 | #define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 3) | 145 | #define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 3) |
144 | #define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 3) | 146 | #define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 3) |
145 | #define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 3) | 147 | #define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 3) |
@@ -238,6 +240,19 @@ enum { | |||
238 | #define QI_IWD_STATUS_DATA(d) (((u64)d) << 32) | 240 | #define QI_IWD_STATUS_DATA(d) (((u64)d) << 32) |
239 | #define QI_IWD_STATUS_WRITE (((u64)1) << 5) | 241 | #define QI_IWD_STATUS_WRITE (((u64)1) << 5) |
240 | 242 | ||
243 | #define QI_IOTLB_DID(did) (((u64)did) << 16) | ||
244 | #define QI_IOTLB_DR(dr) (((u64)dr) << 7) | ||
245 | #define QI_IOTLB_DW(dw) (((u64)dw) << 6) | ||
246 | #define QI_IOTLB_GRAN(gran) (((u64)gran) >> (DMA_TLB_FLUSH_GRANU_OFFSET-4)) | ||
247 | #define QI_IOTLB_ADDR(addr) (((u64)addr) & PAGE_MASK_4K) | ||
248 | #define QI_IOTLB_IH(ih) (((u64)ih) << 6) | ||
249 | #define QI_IOTLB_AM(am) (((u8)am)) | ||
250 | |||
251 | #define QI_CC_FM(fm) (((u64)fm) << 48) | ||
252 | #define QI_CC_SID(sid) (((u64)sid) << 32) | ||
253 | #define QI_CC_DID(did) (((u64)did) << 16) | ||
254 | #define QI_CC_GRAN(gran) (((u64)gran) >> (DMA_CCMD_INVL_GRANU_OFFSET-4)) | ||
255 | |||
241 | struct qi_desc { | 256 | struct qi_desc { |
242 | u64 low, high; | 257 | u64 low, high; |
243 | }; | 258 | }; |
@@ -303,6 +318,12 @@ extern void free_iommu(struct intel_iommu *iommu); | |||
303 | extern int dmar_enable_qi(struct intel_iommu *iommu); | 318 | extern int dmar_enable_qi(struct intel_iommu *iommu); |
304 | extern void qi_global_iec(struct intel_iommu *iommu); | 319 | extern void qi_global_iec(struct intel_iommu *iommu); |
305 | 320 | ||
321 | extern int qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid, | ||
322 | u8 fm, u64 type, int non_present_entry_flush); | ||
323 | extern int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr, | ||
324 | unsigned int size_order, u64 type, | ||
325 | int non_present_entry_flush); | ||
326 | |||
306 | extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); | 327 | extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu); |
307 | 328 | ||
308 | void intel_iommu_domain_exit(struct dmar_domain *domain); | 329 | void intel_iommu_domain_exit(struct dmar_domain *domain); |