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-rw-r--r--include/linux/ide.h227
1 files changed, 124 insertions, 103 deletions
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 5f3e82ae901a..32fd77bb4436 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -48,13 +48,6 @@ typedef unsigned char byte; /* used everywhere */
48#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ 48#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
49 49
50/* 50/*
51 * Tune flags
52 */
53#define IDE_TUNE_NOAUTO 2
54#define IDE_TUNE_AUTO 1
55#define IDE_TUNE_DEFAULT 0
56
57/*
58 * state flags 51 * state flags
59 */ 52 */
60 53
@@ -68,23 +61,30 @@ typedef unsigned char byte; /* used everywhere */
68 */ 61 */
69#define IDE_NR_PORTS (10) 62#define IDE_NR_PORTS (10)
70 63
71#define IDE_DATA_OFFSET (0) 64struct ide_io_ports {
72#define IDE_ERROR_OFFSET (1) 65 unsigned long data_addr;
73#define IDE_NSECTOR_OFFSET (2) 66
74#define IDE_SECTOR_OFFSET (3) 67 union {
75#define IDE_LCYL_OFFSET (4) 68 unsigned long error_addr; /* read: error */
76#define IDE_HCYL_OFFSET (5) 69 unsigned long feature_addr; /* write: feature */
77#define IDE_SELECT_OFFSET (6) 70 };
78#define IDE_STATUS_OFFSET (7) 71
79#define IDE_CONTROL_OFFSET (8) 72 unsigned long nsect_addr;
80#define IDE_IRQ_OFFSET (9) 73 unsigned long lbal_addr;
81 74 unsigned long lbam_addr;
82#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET 75 unsigned long lbah_addr;
83#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET 76
84#define IDE_ALTSTATUS_OFFSET IDE_CONTROL_OFFSET 77 unsigned long device_addr;
85#define IDE_IREASON_OFFSET IDE_NSECTOR_OFFSET 78
86#define IDE_BCOUNTL_OFFSET IDE_LCYL_OFFSET 79 union {
87#define IDE_BCOUNTH_OFFSET IDE_HCYL_OFFSET 80 unsigned long status_addr; /*  read: status  */
81 unsigned long command_addr; /* write: command */
82 };
83
84 unsigned long ctl_addr;
85
86 unsigned long irq_addr;
87};
88 88
89#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 89#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
90#define BAD_R_STAT (BUSY_STAT | ERR_STAT) 90#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
@@ -163,14 +163,17 @@ typedef u8 hwif_chipset_t;
163 * Structure to hold all information about the location of this port 163 * Structure to hold all information about the location of this port
164 */ 164 */
165typedef struct hw_regs_s { 165typedef struct hw_regs_s {
166 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */ 166 union {
167 struct ide_io_ports io_ports;
168 unsigned long io_ports_array[IDE_NR_PORTS];
169 };
170
167 int irq; /* our irq number */ 171 int irq; /* our irq number */
168 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ 172 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
169 hwif_chipset_t chipset; 173 hwif_chipset_t chipset;
170 struct device *dev; 174 struct device *dev;
171} hw_regs_t; 175} hw_regs_t;
172 176
173struct hwif_s * ide_find_port(unsigned long);
174void ide_init_port_data(struct hwif_s *, unsigned int); 177void ide_init_port_data(struct hwif_s *, unsigned int);
175void ide_init_port_hw(struct hwif_s *, hw_regs_t *); 178void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
176 179
@@ -180,10 +183,10 @@ static inline void ide_std_init_ports(hw_regs_t *hw,
180{ 183{
181 unsigned int i; 184 unsigned int i;
182 185
183 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) 186 for (i = 0; i <= 7; i++)
184 hw->io_ports[i] = io_addr++; 187 hw->io_ports_array[i] = io_addr++;
185 188
186 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr; 189 hw->io_ports.ctl_addr = ctl_addr;
187} 190}
188 191
189#include <asm/ide.h> 192#include <asm/ide.h>
@@ -329,7 +332,6 @@ typedef struct ide_drive_s {
329 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */ 332 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
330 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */ 333 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
331 unsigned nodma : 1; /* disallow DMA */ 334 unsigned nodma : 1; /* disallow DMA */
332 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
333 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */ 335 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
334 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */ 336 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
335 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */ 337 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
@@ -388,6 +390,43 @@ typedef struct ide_drive_s {
388 390
389struct ide_port_info; 391struct ide_port_info;
390 392
393struct ide_port_ops {
394 /* host specific initialization of devices on a port */
395 void (*port_init_devs)(struct hwif_s *);
396 /* routine to program host for PIO mode */
397 void (*set_pio_mode)(ide_drive_t *, const u8);
398 /* routine to program host for DMA mode */
399 void (*set_dma_mode)(ide_drive_t *, const u8);
400 /* tweaks hardware to select drive */
401 void (*selectproc)(ide_drive_t *);
402 /* chipset polling based on hba specifics */
403 int (*reset_poll)(ide_drive_t *);
404 /* chipset specific changes to default for device-hba resets */
405 void (*pre_reset)(ide_drive_t *);
406 /* routine to reset controller after a disk reset */
407 void (*resetproc)(ide_drive_t *);
408 /* special host masking for drive selection */
409 void (*maskproc)(ide_drive_t *, int);
410 /* check host's drive quirk list */
411 void (*quirkproc)(ide_drive_t *);
412
413 u8 (*mdma_filter)(ide_drive_t *);
414 u8 (*udma_filter)(ide_drive_t *);
415
416 u8 (*cable_detect)(struct hwif_s *);
417};
418
419struct ide_dma_ops {
420 void (*dma_host_set)(struct ide_drive_s *, int);
421 int (*dma_setup)(struct ide_drive_s *);
422 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
423 void (*dma_start)(struct ide_drive_s *);
424 int (*dma_end)(struct ide_drive_s *);
425 int (*dma_test_irq)(struct ide_drive_s *);
426 void (*dma_lost_irq)(struct ide_drive_s *);
427 void (*dma_timeout)(struct ide_drive_s *);
428};
429
391typedef struct hwif_s { 430typedef struct hwif_s {
392 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */ 431 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
393 struct hwif_s *mate; /* other hwif from same PCI chip */ 432 struct hwif_s *mate; /* other hwif from same PCI chip */
@@ -396,8 +435,8 @@ typedef struct hwif_s {
396 435
397 char name[6]; /* name of interface, eg. "ide0" */ 436 char name[6]; /* name of interface, eg. "ide0" */
398 437
399 /* task file registers for pata and sata */ 438 struct ide_io_ports io_ports;
400 unsigned long io_ports[IDE_NR_PORTS]; 439
401 unsigned long sata_scr[SATA_NR_PORTS]; 440 unsigned long sata_scr[SATA_NR_PORTS];
402 441
403 ide_drive_t drives[MAX_DRIVES]; /* drive info */ 442 ide_drive_t drives[MAX_DRIVES]; /* drive info */
@@ -421,38 +460,12 @@ typedef struct hwif_s {
421 460
422 struct device *dev; 461 struct device *dev;
423 462
424 const struct ide_port_info *cds; /* chipset device struct */
425
426 ide_ack_intr_t *ack_intr; 463 ide_ack_intr_t *ack_intr;
427 464
428 void (*rw_disk)(ide_drive_t *, struct request *); 465 void (*rw_disk)(ide_drive_t *, struct request *);
429 466
430#if 0 467 const struct ide_port_ops *port_ops;
431 ide_hwif_ops_t *hwifops; 468 const struct ide_dma_ops *dma_ops;
432#else
433 /* host specific initialization of devices on a port */
434 void (*port_init_devs)(struct hwif_s *);
435 /* routine to program host for PIO mode */
436 void (*set_pio_mode)(ide_drive_t *, const u8);
437 /* routine to program host for DMA mode */
438 void (*set_dma_mode)(ide_drive_t *, const u8);
439 /* tweaks hardware to select drive */
440 void (*selectproc)(ide_drive_t *);
441 /* chipset polling based on hba specifics */
442 int (*reset_poll)(ide_drive_t *);
443 /* chipset specific changes to default for device-hba resets */
444 void (*pre_reset)(ide_drive_t *);
445 /* routine to reset controller after a disk reset */
446 void (*resetproc)(ide_drive_t *);
447 /* special host masking for drive selection */
448 void (*maskproc)(ide_drive_t *, int);
449 /* check host's drive quirk list */
450 void (*quirkproc)(ide_drive_t *);
451#endif
452 u8 (*mdma_filter)(ide_drive_t *);
453 u8 (*udma_filter)(ide_drive_t *);
454
455 u8 (*cable_detect)(struct hwif_s *);
456 469
457 void (*ata_input_data)(ide_drive_t *, void *, u32); 470 void (*ata_input_data)(ide_drive_t *, void *, u32);
458 void (*ata_output_data)(ide_drive_t *, void *, u32); 471 void (*ata_output_data)(ide_drive_t *, void *, u32);
@@ -460,15 +473,7 @@ typedef struct hwif_s {
460 void (*atapi_input_bytes)(ide_drive_t *, void *, u32); 473 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
461 void (*atapi_output_bytes)(ide_drive_t *, void *, u32); 474 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
462 475
463 void (*dma_host_set)(ide_drive_t *, int);
464 int (*dma_setup)(ide_drive_t *);
465 void (*dma_exec_cmd)(ide_drive_t *, u8);
466 void (*dma_start)(ide_drive_t *);
467 int (*ide_dma_end)(ide_drive_t *drive);
468 int (*ide_dma_test_irq)(ide_drive_t *drive);
469 void (*ide_dma_clear_irq)(ide_drive_t *drive); 476 void (*ide_dma_clear_irq)(ide_drive_t *drive);
470 void (*dma_lost_irq)(ide_drive_t *drive);
471 void (*dma_timeout)(ide_drive_t *drive);
472 477
473 void (*OUTB)(u8 addr, unsigned long port); 478 void (*OUTB)(u8 addr, unsigned long port);
474 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); 479 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
@@ -515,14 +520,11 @@ typedef struct hwif_s {
515 unsigned long extra_base; /* extra addr for dma ports */ 520 unsigned long extra_base; /* extra addr for dma ports */
516 unsigned extra_ports; /* number of extra dma ports */ 521 unsigned extra_ports; /* number of extra dma ports */
517 522
518 unsigned noprobe : 1; /* don't probe for this interface */
519 unsigned present : 1; /* this interface exists */ 523 unsigned present : 1; /* this interface exists */
520 unsigned serialized : 1; /* serialized all channel operation */ 524 unsigned serialized : 1; /* serialized all channel operation */
521 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ 525 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
522 unsigned reset : 1; /* reset after probe */
523 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ 526 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
524 unsigned mmio : 1; /* host uses MMIO */ 527 unsigned mmio : 1; /* host uses MMIO */
525 unsigned straight8 : 1; /* Alan's straight 8 check */
526 528
527 struct device gendev; 529 struct device gendev;
528 struct device *portdev; 530 struct device *portdev;
@@ -703,10 +705,6 @@ void ide_add_generic_settings(ide_drive_t *);
703read_proc_t proc_ide_read_capacity; 705read_proc_t proc_ide_read_capacity;
704read_proc_t proc_ide_read_geometry; 706read_proc_t proc_ide_read_geometry;
705 707
706#ifdef CONFIG_BLK_DEV_IDEPCI
707void ide_pci_create_host_proc(const char *, get_info_t *);
708#endif
709
710/* 708/*
711 * Standard exit stuff: 709 * Standard exit stuff:
712 */ 710 */
@@ -807,8 +805,21 @@ int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsig
807#ifndef _IDE_C 805#ifndef _IDE_C
808extern ide_hwif_t ide_hwifs[]; /* master data repository */ 806extern ide_hwif_t ide_hwifs[]; /* master data repository */
809#endif 807#endif
808extern int ide_noacpi;
809extern int ide_acpigtf;
810extern int ide_acpionboot;
810extern int noautodma; 811extern int noautodma;
811 812
813extern int ide_vlb_clk;
814extern int ide_pci_clk;
815
816ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
817
818static inline ide_hwif_t *ide_find_port(void)
819{
820 return ide_find_port_slot(NULL);
821}
822
812extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); 823extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
813int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, 824int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
814 int uptodate, int nr_sectors); 825 int uptodate, int nr_sectors);
@@ -1004,10 +1015,15 @@ void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8
1004void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); 1015void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1005 1016
1006#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 1017#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1007void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); 1018int ide_pci_set_master(struct pci_dev *, const char *);
1019unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1020int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1008#else 1021#else
1009static inline void ide_hwif_setup_dma(ide_hwif_t *hwif, 1022static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1010 const struct ide_port_info *d) { } 1023 const struct ide_port_info *d)
1024{
1025 return -EINVAL;
1026}
1011#endif 1027#endif
1012 1028
1013extern void default_hwif_iops(ide_hwif_t *); 1029extern void default_hwif_iops(ide_hwif_t *);
@@ -1027,8 +1043,8 @@ enum {
1027 IDE_HFLAG_SINGLE = (1 << 1), 1043 IDE_HFLAG_SINGLE = (1 << 1),
1028 /* don't use legacy PIO blacklist */ 1044 /* don't use legacy PIO blacklist */
1029 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), 1045 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1030 /* don't use conservative PIO "downgrade" */ 1046 /* set for the second port of QD65xx */
1031 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3), 1047 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
1032 /* use PIO8/9 for prefetch off/on */ 1048 /* use PIO8/9 for prefetch off/on */
1033 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), 1049 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1034 /* use PIO6/7 for fast-devsel off/on */ 1050 /* use PIO6/7 for fast-devsel off/on */
@@ -1050,14 +1066,12 @@ enum {
1050 IDE_HFLAG_VDMA = (1 << 11), 1066 IDE_HFLAG_VDMA = (1 << 11),
1051 /* ATAPI DMA is unsupported */ 1067 /* ATAPI DMA is unsupported */
1052 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), 1068 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1053 /* set if host is a "bootable" controller */ 1069 /* set if host is a "non-bootable" controller */
1054 IDE_HFLAG_BOOTABLE = (1 << 13), 1070 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
1055 /* host doesn't support DMA */ 1071 /* host doesn't support DMA */
1056 IDE_HFLAG_NO_DMA = (1 << 14), 1072 IDE_HFLAG_NO_DMA = (1 << 14),
1057 /* check if host is PCI IDE device before allowing DMA */ 1073 /* check if host is PCI IDE device before allowing DMA */
1058 IDE_HFLAG_NO_AUTODMA = (1 << 15), 1074 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1059 /* don't autotune PIO */
1060 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
1061 /* host is CS5510/CS5520 */ 1075 /* host is CS5510/CS5520 */
1062 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA, 1076 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
1063 /* no LBA48 */ 1077 /* no LBA48 */
@@ -1079,8 +1093,8 @@ enum {
1079 /* unmask IRQs */ 1093 /* unmask IRQs */
1080 IDE_HFLAG_UNMASK_IRQS = (1 << 25), 1094 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1081 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26), 1095 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1082 /* host is CY82C693 */ 1096 /* serialize ports if DMA is possible (for sl82c105) */
1083 IDE_HFLAG_CY82C693 = (1 << 27), 1097 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
1084 /* force host out of "simplex" mode */ 1098 /* force host out of "simplex" mode */
1085 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), 1099 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1086 /* DSC overlap is unsupported */ 1100 /* DSC overlap is unsupported */
@@ -1092,9 +1106,9 @@ enum {
1092}; 1106};
1093 1107
1094#ifdef CONFIG_BLK_DEV_OFFBOARD 1108#ifdef CONFIG_BLK_DEV_OFFBOARD
1095# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1096#else
1097# define IDE_HFLAG_OFF_BOARD 0 1109# define IDE_HFLAG_OFF_BOARD 0
1110#else
1111# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1098#endif 1112#endif
1099 1113
1100struct ide_port_info { 1114struct ide_port_info {
@@ -1102,10 +1116,14 @@ struct ide_port_info {
1102 unsigned int (*init_chipset)(struct pci_dev *, const char *); 1116 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1103 void (*init_iops)(ide_hwif_t *); 1117 void (*init_iops)(ide_hwif_t *);
1104 void (*init_hwif)(ide_hwif_t *); 1118 void (*init_hwif)(ide_hwif_t *);
1105 void (*init_dma)(ide_hwif_t *, unsigned long); 1119 int (*init_dma)(ide_hwif_t *,
1120 const struct ide_port_info *);
1121
1122 const struct ide_port_ops *port_ops;
1123 const struct ide_dma_ops *dma_ops;
1124
1106 ide_pci_enablebit_t enablebits[2]; 1125 ide_pci_enablebit_t enablebits[2];
1107 hwif_chipset_t chipset; 1126 hwif_chipset_t chipset;
1108 u8 extra;
1109 u32 host_flags; 1127 u32 host_flags;
1110 u8 pio_mask; 1128 u8 pio_mask;
1111 u8 swdma_mask; 1129 u8 swdma_mask;
@@ -1152,13 +1170,16 @@ void ide_destroy_dmatable(ide_drive_t *);
1152 1170
1153#ifdef CONFIG_BLK_DEV_IDEDMA_SFF 1171#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1154extern int ide_build_dmatable(ide_drive_t *, struct request *); 1172extern int ide_build_dmatable(ide_drive_t *, struct request *);
1155extern int ide_release_dma(ide_hwif_t *); 1173int ide_allocate_dma_engine(ide_hwif_t *);
1156extern void ide_setup_dma(ide_hwif_t *, unsigned long); 1174void ide_release_dma_engine(ide_hwif_t *);
1175void ide_setup_dma(ide_hwif_t *, unsigned long);
1157 1176
1158void ide_dma_host_set(ide_drive_t *, int); 1177void ide_dma_host_set(ide_drive_t *, int);
1159extern int ide_dma_setup(ide_drive_t *); 1178extern int ide_dma_setup(ide_drive_t *);
1179void ide_dma_exec_cmd(ide_drive_t *, u8);
1160extern void ide_dma_start(ide_drive_t *); 1180extern void ide_dma_start(ide_drive_t *);
1161extern int __ide_dma_end(ide_drive_t *); 1181extern int __ide_dma_end(ide_drive_t *);
1182int ide_dma_test_irq(ide_drive_t *);
1162extern void ide_dma_lost_irq(ide_drive_t *); 1183extern void ide_dma_lost_irq(ide_drive_t *);
1163extern void ide_dma_timeout(ide_drive_t *); 1184extern void ide_dma_timeout(ide_drive_t *);
1164#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ 1185#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
@@ -1176,7 +1197,7 @@ static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1176#endif /* CONFIG_BLK_DEV_IDEDMA */ 1197#endif /* CONFIG_BLK_DEV_IDEDMA */
1177 1198
1178#ifndef CONFIG_BLK_DEV_IDEDMA_SFF 1199#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1179static inline void ide_release_dma(ide_hwif_t *drive) {;} 1200static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1180#endif 1201#endif
1181 1202
1182#ifdef CONFIG_BLK_DEV_IDEACPI 1203#ifdef CONFIG_BLK_DEV_IDEACPI
@@ -1196,17 +1217,18 @@ static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1196#endif 1217#endif
1197 1218
1198void ide_remove_port_from_hwgroup(ide_hwif_t *); 1219void ide_remove_port_from_hwgroup(ide_hwif_t *);
1199extern int ide_hwif_request_regions(ide_hwif_t *hwif); 1220void ide_unregister(ide_hwif_t *);
1200extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1201void ide_unregister(unsigned int);
1202 1221
1203void ide_register_region(struct gendisk *); 1222void ide_register_region(struct gendisk *);
1204void ide_unregister_region(struct gendisk *); 1223void ide_unregister_region(struct gendisk *);
1205 1224
1206void ide_undecoded_slave(ide_drive_t *); 1225void ide_undecoded_slave(ide_drive_t *);
1207 1226
1227void ide_port_apply_params(ide_hwif_t *);
1228
1208int ide_device_add_all(u8 *idx, const struct ide_port_info *); 1229int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1209int ide_device_add(u8 idx[4], const struct ide_port_info *); 1230int ide_device_add(u8 idx[4], const struct ide_port_info *);
1231int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
1210void ide_port_unregister_devices(ide_hwif_t *); 1232void ide_port_unregister_devices(ide_hwif_t *);
1211void ide_port_scan(ide_hwif_t *); 1233void ide_port_scan(ide_hwif_t *);
1212 1234
@@ -1315,29 +1337,28 @@ static inline void ide_set_irq(ide_drive_t *drive, int on)
1315{ 1337{
1316 ide_hwif_t *hwif = drive->hwif; 1338 ide_hwif_t *hwif = drive->hwif;
1317 1339
1318 hwif->OUTB(drive->ctl | (on ? 0 : 2), 1340 hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr);
1319 hwif->io_ports[IDE_CONTROL_OFFSET]);
1320} 1341}
1321 1342
1322static inline u8 ide_read_status(ide_drive_t *drive) 1343static inline u8 ide_read_status(ide_drive_t *drive)
1323{ 1344{
1324 ide_hwif_t *hwif = drive->hwif; 1345 ide_hwif_t *hwif = drive->hwif;
1325 1346
1326 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1347 return hwif->INB(hwif->io_ports.status_addr);
1327} 1348}
1328 1349
1329static inline u8 ide_read_altstatus(ide_drive_t *drive) 1350static inline u8 ide_read_altstatus(ide_drive_t *drive)
1330{ 1351{
1331 ide_hwif_t *hwif = drive->hwif; 1352 ide_hwif_t *hwif = drive->hwif;
1332 1353
1333 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]); 1354 return hwif->INB(hwif->io_ports.ctl_addr);
1334} 1355}
1335 1356
1336static inline u8 ide_read_error(ide_drive_t *drive) 1357static inline u8 ide_read_error(ide_drive_t *drive)
1337{ 1358{
1338 ide_hwif_t *hwif = drive->hwif; 1359 ide_hwif_t *hwif = drive->hwif;
1339 1360
1340 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]); 1361 return hwif->INB(hwif->io_ports.error_addr);
1341} 1362}
1342 1363
1343/* 1364/*
@@ -1350,7 +1371,7 @@ static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount)
1350 1371
1351 /* FIXME: use ->atapi_input_bytes */ 1372 /* FIXME: use ->atapi_input_bytes */
1352 while (bcount--) 1373 while (bcount--)
1353 (void)hwif->INB(hwif->io_ports[IDE_DATA_OFFSET]); 1374 (void)hwif->INB(hwif->io_ports.data_addr);
1354} 1375}
1355 1376
1356static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount) 1377static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
@@ -1359,7 +1380,7 @@ static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
1359 1380
1360 /* FIXME: use ->atapi_output_bytes */ 1381 /* FIXME: use ->atapi_output_bytes */
1361 while (bcount--) 1382 while (bcount--)
1362 hwif->OUTB(0, hwif->io_ports[IDE_DATA_OFFSET]); 1383 hwif->OUTB(0, hwif->io_ports.data_addr);
1363} 1384}
1364 1385
1365#endif /* _IDE_H */ 1386#endif /* _IDE_H */