diff options
Diffstat (limited to 'include/linux/i2c')
| -rw-r--r-- | include/linux/i2c/dm355evm_msp.h | 79 | ||||
| -rw-r--r-- | include/linux/i2c/twl4030.h | 81 |
2 files changed, 127 insertions, 33 deletions
diff --git a/include/linux/i2c/dm355evm_msp.h b/include/linux/i2c/dm355evm_msp.h new file mode 100644 index 000000000000..372470350fab --- /dev/null +++ b/include/linux/i2c/dm355evm_msp.h | |||
| @@ -0,0 +1,79 @@ | |||
| 1 | /* | ||
| 2 | * dm355evm_msp.h - support MSP430 microcontroller on DM355EVM board | ||
| 3 | */ | ||
| 4 | #ifndef __LINUX_I2C_DM355EVM_MSP | ||
| 5 | #define __LINUX_I2C_DM355EVM_MSP | ||
| 6 | |||
| 7 | /* | ||
| 8 | * Written against Spectrum's writeup for the A4 firmware revision, | ||
| 9 | * and tweaked to match source and rev D2 schematics by removing CPLD | ||
| 10 | * and NOR flash hooks (which were last appropriate in rev B boards). | ||
| 11 | * | ||
| 12 | * Note that the firmware supports a flavor of write posting ... to be | ||
| 13 | * sure a write completes, issue another read or write. | ||
| 14 | */ | ||
| 15 | |||
| 16 | /* utilities to access "registers" emulated by msp430 firmware */ | ||
| 17 | extern int dm355evm_msp_write(u8 value, u8 reg); | ||
| 18 | extern int dm355evm_msp_read(u8 reg); | ||
| 19 | |||
| 20 | |||
| 21 | /* command/control registers */ | ||
| 22 | #define DM355EVM_MSP_COMMAND 0x00 | ||
| 23 | # define MSP_COMMAND_NULL 0 | ||
| 24 | # define MSP_COMMAND_RESET_COLD 1 | ||
| 25 | # define MSP_COMMAND_RESET_WARM 2 | ||
| 26 | # define MSP_COMMAND_RESET_WARM_I 3 | ||
| 27 | # define MSP_COMMAND_POWEROFF 4 | ||
| 28 | # define MSP_COMMAND_IR_REINIT 5 | ||
| 29 | #define DM355EVM_MSP_STATUS 0x01 | ||
| 30 | # define MSP_STATUS_BAD_OFFSET BIT(0) | ||
| 31 | # define MSP_STATUS_BAD_COMMAND BIT(1) | ||
| 32 | # define MSP_STATUS_POWER_ERROR BIT(2) | ||
| 33 | # define MSP_STATUS_RXBUF_OVERRUN BIT(3) | ||
| 34 | #define DM355EVM_MSP_RESET 0x02 /* 0 bits == in reset */ | ||
| 35 | # define MSP_RESET_DC5 BIT(0) | ||
| 36 | # define MSP_RESET_TVP5154 BIT(2) | ||
| 37 | # define MSP_RESET_IMAGER BIT(3) | ||
| 38 | # define MSP_RESET_ETHERNET BIT(4) | ||
| 39 | # define MSP_RESET_SYS BIT(5) | ||
| 40 | # define MSP_RESET_AIC33 BIT(7) | ||
| 41 | |||
| 42 | /* GPIO registers ... bit patterns mostly match the source MSP ports */ | ||
| 43 | #define DM355EVM_MSP_LED 0x03 /* active low (MSP P4) */ | ||
| 44 | #define DM355EVM_MSP_SWITCH1 0x04 /* (MSP P5, masked) */ | ||
| 45 | # define MSP_SWITCH1_SW6_1 BIT(0) | ||
| 46 | # define MSP_SWITCH1_SW6_2 BIT(1) | ||
| 47 | # define MSP_SWITCH1_SW6_3 BIT(2) | ||
| 48 | # define MSP_SWITCH1_SW6_4 BIT(3) | ||
| 49 | # define MSP_SWITCH1_J1 BIT(4) /* NTSC/PAL */ | ||
| 50 | # define MSP_SWITCH1_MSP_INT BIT(5) /* active low */ | ||
| 51 | #define DM355EVM_MSP_SWITCH2 0x05 /* (MSP P6, masked) */ | ||
| 52 | # define MSP_SWITCH2_SW10 BIT(3) | ||
| 53 | # define MSP_SWITCH2_SW11 BIT(4) | ||
| 54 | # define MSP_SWITCH2_SW12 BIT(5) | ||
| 55 | # define MSP_SWITCH2_SW13 BIT(6) | ||
| 56 | # define MSP_SWITCH2_SW14 BIT(7) | ||
| 57 | #define DM355EVM_MSP_SDMMC 0x06 /* (MSP P2, masked) */ | ||
| 58 | # define MSP_SDMMC_0_WP BIT(1) | ||
| 59 | # define MSP_SDMMC_0_CD BIT(2) /* active low */ | ||
| 60 | # define MSP_SDMMC_1_WP BIT(3) | ||
| 61 | # define MSP_SDMMC_1_CD BIT(4) /* active low */ | ||
| 62 | #define DM355EVM_MSP_FIRMREV 0x07 /* not a GPIO (out of order) */ | ||
| 63 | #define DM355EVM_MSP_VIDEO_IN 0x08 /* (MSP P3, masked) */ | ||
| 64 | # define MSP_VIDEO_IMAGER BIT(7) /* low == tvp5146 */ | ||
| 65 | |||
| 66 | /* power supply registers are currently omitted */ | ||
| 67 | |||
| 68 | /* RTC registers */ | ||
| 69 | #define DM355EVM_MSP_RTC_0 0x12 /* LSB */ | ||
| 70 | #define DM355EVM_MSP_RTC_1 0x13 | ||
| 71 | #define DM355EVM_MSP_RTC_2 0x14 | ||
| 72 | #define DM355EVM_MSP_RTC_3 0x15 /* MSB */ | ||
| 73 | |||
| 74 | /* input event queue registers; code == ((HIGH << 8) | LOW) */ | ||
| 75 | #define DM355EVM_MSP_INPUT_COUNT 0x16 /* decrement by reading LOW */ | ||
| 76 | #define DM355EVM_MSP_INPUT_HIGH 0x17 | ||
| 77 | #define DM355EVM_MSP_INPUT_LOW 0x18 | ||
| 78 | |||
| 79 | #endif /* __LINUX_I2C_DM355EVM_MSP */ | ||
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h index fb604dcd38f1..a8f84c01f82e 100644 --- a/include/linux/i2c/twl4030.h +++ b/include/linux/i2c/twl4030.h | |||
| @@ -78,8 +78,8 @@ int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); | |||
| 78 | * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1 | 78 | * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1 |
| 79 | * for the value, and populate your data starting at offset 1. | 79 | * for the value, and populate your data starting at offset 1. |
| 80 | */ | 80 | */ |
| 81 | int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes); | 81 | int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); |
| 82 | int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes); | 82 | int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); |
| 83 | 83 | ||
| 84 | /*----------------------------------------------------------------------*/ | 84 | /*----------------------------------------------------------------------*/ |
| 85 | 85 | ||
| @@ -278,6 +278,18 @@ struct twl4030_platform_data { | |||
| 278 | struct twl4030_keypad_data *keypad; | 278 | struct twl4030_keypad_data *keypad; |
| 279 | struct twl4030_usb_data *usb; | 279 | struct twl4030_usb_data *usb; |
| 280 | 280 | ||
| 281 | /* LDO regulators */ | ||
| 282 | struct regulator_init_data *vdac; | ||
| 283 | struct regulator_init_data *vpll1; | ||
| 284 | struct regulator_init_data *vpll2; | ||
| 285 | struct regulator_init_data *vmmc1; | ||
| 286 | struct regulator_init_data *vmmc2; | ||
| 287 | struct regulator_init_data *vsim; | ||
| 288 | struct regulator_init_data *vaux1; | ||
| 289 | struct regulator_init_data *vaux2; | ||
| 290 | struct regulator_init_data *vaux3; | ||
| 291 | struct regulator_init_data *vaux4; | ||
| 292 | |||
| 281 | /* REVISIT more to come ... _nothing_ should be hard-wired */ | 293 | /* REVISIT more to come ... _nothing_ should be hard-wired */ |
| 282 | }; | 294 | }; |
| 283 | 295 | ||
| @@ -285,33 +297,6 @@ struct twl4030_platform_data { | |||
| 285 | 297 | ||
| 286 | int twl4030_sih_setup(int module); | 298 | int twl4030_sih_setup(int module); |
| 287 | 299 | ||
| 288 | /* | ||
| 289 | * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the | ||
| 290 | * IRQ data to subsidiary devices using platform device resources. | ||
| 291 | */ | ||
| 292 | |||
| 293 | /* IRQ information-need base */ | ||
| 294 | #include <mach/irqs.h> | ||
| 295 | /* TWL4030 interrupts */ | ||
| 296 | |||
| 297 | /* #define TWL4030_MODIRQ_GPIO (TWL4030_IRQ_BASE + 0) */ | ||
| 298 | #define TWL4030_MODIRQ_KEYPAD (TWL4030_IRQ_BASE + 1) | ||
| 299 | #define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2) | ||
| 300 | #define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3) | ||
| 301 | /* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */ | ||
| 302 | /* #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) */ | ||
| 303 | |||
| 304 | #define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0) | ||
| 305 | /* #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) */ | ||
| 306 | /* #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) */ | ||
| 307 | /* #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) */ | ||
| 308 | /* #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) */ | ||
| 309 | /* #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) */ | ||
| 310 | /* #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) */ | ||
| 311 | /* #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) */ | ||
| 312 | |||
| 313 | /* Rest are unsued currently*/ | ||
| 314 | |||
| 315 | /* Offsets to Power Registers */ | 300 | /* Offsets to Power Registers */ |
| 316 | #define TWL4030_VDAC_DEV_GRP 0x3B | 301 | #define TWL4030_VDAC_DEV_GRP 0x3B |
| 317 | #define TWL4030_VDAC_DEDICATED 0x3E | 302 | #define TWL4030_VDAC_DEDICATED 0x3E |
| @@ -322,10 +307,6 @@ int twl4030_sih_setup(int module); | |||
| 322 | #define TWL4030_VAUX3_DEV_GRP 0x1F | 307 | #define TWL4030_VAUX3_DEV_GRP 0x1F |
| 323 | #define TWL4030_VAUX3_DEDICATED 0x22 | 308 | #define TWL4030_VAUX3_DEDICATED 0x22 |
| 324 | 309 | ||
| 325 | /* TWL4030 GPIO interrupt definitions */ | ||
| 326 | |||
| 327 | #define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n)) | ||
| 328 | |||
| 329 | /* | 310 | /* |
| 330 | * Exported TWL4030 GPIO APIs | 311 | * Exported TWL4030 GPIO APIs |
| 331 | * | 312 | * |
| @@ -340,4 +321,38 @@ int twl4030_set_gpio_debounce(int gpio, int enable); | |||
| 340 | static inline int twl4030charger_usb_en(int enable) { return 0; } | 321 | static inline int twl4030charger_usb_en(int enable) { return 0; } |
| 341 | #endif | 322 | #endif |
| 342 | 323 | ||
| 324 | /*----------------------------------------------------------------------*/ | ||
| 325 | |||
| 326 | /* Linux-specific regulator identifiers ... for now, we only support | ||
| 327 | * the LDOs, and leave the three buck converters alone. VDD1 and VDD2 | ||
| 328 | * need to tie into hardware based voltage scaling (cpufreq etc), while | ||
| 329 | * VIO is generally fixed. | ||
| 330 | */ | ||
| 331 | |||
| 332 | /* EXTERNAL dc-to-dc buck converters */ | ||
| 333 | #define TWL4030_REG_VDD1 0 | ||
| 334 | #define TWL4030_REG_VDD2 1 | ||
| 335 | #define TWL4030_REG_VIO 2 | ||
| 336 | |||
| 337 | /* EXTERNAL LDOs */ | ||
| 338 | #define TWL4030_REG_VDAC 3 | ||
| 339 | #define TWL4030_REG_VPLL1 4 | ||
| 340 | #define TWL4030_REG_VPLL2 5 /* not on all chips */ | ||
| 341 | #define TWL4030_REG_VMMC1 6 | ||
| 342 | #define TWL4030_REG_VMMC2 7 /* not on all chips */ | ||
| 343 | #define TWL4030_REG_VSIM 8 /* not on all chips */ | ||
| 344 | #define TWL4030_REG_VAUX1 9 /* not on all chips */ | ||
| 345 | #define TWL4030_REG_VAUX2_4030 10 /* (twl4030-specific) */ | ||
| 346 | #define TWL4030_REG_VAUX2 11 /* (twl5030 and newer) */ | ||
| 347 | #define TWL4030_REG_VAUX3 12 /* not on all chips */ | ||
| 348 | #define TWL4030_REG_VAUX4 13 /* not on all chips */ | ||
| 349 | |||
| 350 | /* INTERNAL LDOs */ | ||
| 351 | #define TWL4030_REG_VINTANA1 14 | ||
| 352 | #define TWL4030_REG_VINTANA2 15 | ||
| 353 | #define TWL4030_REG_VINTDIG 16 | ||
| 354 | #define TWL4030_REG_VUSB1V5 17 | ||
| 355 | #define TWL4030_REG_VUSB1V8 18 | ||
| 356 | #define TWL4030_REG_VUSB3V1 19 | ||
| 357 | |||
| 343 | #endif /* End of __TWL4030_H */ | 358 | #endif /* End of __TWL4030_H */ |
