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-rw-r--r--include/linux/i2c/twl.h83
1 files changed, 82 insertions, 1 deletions
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 6de90bfc6acd..c760991b354a 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -141,6 +141,16 @@
141#define TWL6030_CHARGER_CTRL_INT_MASK 0x10 141#define TWL6030_CHARGER_CTRL_INT_MASK 0x10
142#define TWL6030_CHARGER_FAULT_INT_MASK 0x60 142#define TWL6030_CHARGER_FAULT_INT_MASK 0x60
143 143
144#define TWL6030_MMCCTRL 0xEE
145#define VMMC_AUTO_OFF (0x1 << 3)
146#define SW_FC (0x1 << 2)
147#define STS_MMC 0x1
148
149#define TWL6030_CFG_INPUT_PUPD3 0xF2
150#define MMC_PU (0x1 << 3)
151#define MMC_PD (0x1 << 2)
152
153
144 154
145#define TWL4030_CLASS_ID 0x4030 155#define TWL4030_CLASS_ID 0x4030
146#define TWL6030_CLASS_ID 0x6030 156#define TWL6030_CLASS_ID 0x6030
@@ -173,6 +183,27 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
173int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); 183int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
174int twl6030_interrupt_mask(u8 bit_mask, u8 offset); 184int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
175 185
186/* Card detect Configuration for MMC1 Controller on OMAP4 */
187#ifdef CONFIG_TWL4030_CORE
188int twl6030_mmc_card_detect_config(void);
189#else
190static inline int twl6030_mmc_card_detect_config(void)
191{
192 pr_debug("twl6030_mmc_card_detect_config not supported\n");
193 return 0;
194}
195#endif
196
197/* MMC1 Controller on OMAP4 uses Phoenix irq for Card detect */
198#ifdef CONFIG_TWL4030_CORE
199int twl6030_mmc_card_detect(struct device *dev, int slot);
200#else
201static inline int twl6030_mmc_card_detect(struct device *dev, int slot)
202{
203 pr_debug("Call back twl6030_mmc_card_detect not supported\n");
204 return -EIO;
205}
206#endif
176/*----------------------------------------------------------------------*/ 207/*----------------------------------------------------------------------*/
177 208
178/* 209/*
@@ -357,6 +388,52 @@ int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
357 388
358/*----------------------------------------------------------------------*/ 389/*----------------------------------------------------------------------*/
359 390
391/*
392 * PM Master module register offsets (use TWL4030_MODULE_PM_MASTER)
393 */
394
395#define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x00
396#define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x01
397#define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x02
398#define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x03
399#define TWL4030_PM_MASTER_STS_BOOT 0x04
400#define TWL4030_PM_MASTER_CFG_BOOT 0x05
401#define TWL4030_PM_MASTER_SHUNDAN 0x06
402#define TWL4030_PM_MASTER_BOOT_BCI 0x07
403#define TWL4030_PM_MASTER_CFG_PWRANA1 0x08
404#define TWL4030_PM_MASTER_CFG_PWRANA2 0x09
405#define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x0b
406#define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x0c
407#define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x0d
408#define TWL4030_PM_MASTER_PROTECT_KEY 0x0e
409#define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x0f
410#define TWL4030_PM_MASTER_P1_SW_EVENTS 0x10
411#define TWL4030_PM_MASTER_P2_SW_EVENTS 0x11
412#define TWL4030_PM_MASTER_P3_SW_EVENTS 0x12
413#define TWL4030_PM_MASTER_STS_P123_STATE 0x13
414#define TWL4030_PM_MASTER_PB_CFG 0x14
415#define TWL4030_PM_MASTER_PB_WORD_MSB 0x15
416#define TWL4030_PM_MASTER_PB_WORD_LSB 0x16
417#define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x1c
418#define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x1d
419#define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x1e
420#define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x1f
421#define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x20
422#define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x21
423#define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x22
424#define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x23
425#define TWL4030_PM_MASTER_MEMORY_DATA 0x24
426
427#define TWL4030_PM_MASTER_KEY_CFG1 0xc0
428#define TWL4030_PM_MASTER_KEY_CFG2 0x0c
429
430#define TWL4030_PM_MASTER_KEY_TST1 0xe0
431#define TWL4030_PM_MASTER_KEY_TST2 0x0e
432
433#define TWL4030_PM_MASTER_GLOBAL_TST 0xb6
434
435/*----------------------------------------------------------------------*/
436
360/* Power bus message definitions */ 437/* Power bus message definitions */
361 438
362/* The TWL4030/5030 splits its power-management resources (the various 439/* The TWL4030/5030 splits its power-management resources (the various
@@ -553,8 +630,12 @@ extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
553extern int twl4030_remove_script(u8 flags); 630extern int twl4030_remove_script(u8 flags);
554 631
555struct twl4030_codec_audio_data { 632struct twl4030_codec_audio_data {
556 unsigned int audio_mclk; 633 unsigned int audio_mclk; /* not used, will be removed */
634 unsigned int digimic_delay; /* in ms */
557 unsigned int ramp_delay_value; 635 unsigned int ramp_delay_value;
636 unsigned int offset_cncl_path;
637 unsigned int check_defaults:1;
638 unsigned int reset_registers:1;
558 unsigned int hs_extmute:1; 639 unsigned int hs_extmute:1;
559 void (*set_hs_extmute)(int mute); 640 void (*set_hs_extmute)(int mute);
560}; 641};