diff options
Diffstat (limited to 'include/linux/dmar.h')
| -rw-r--r-- | include/linux/dmar.h | 127 |
1 files changed, 100 insertions, 27 deletions
diff --git a/include/linux/dmar.h b/include/linux/dmar.h index 56c73b847551..c360c558e59e 100644 --- a/include/linux/dmar.h +++ b/include/linux/dmar.h | |||
| @@ -25,9 +25,99 @@ | |||
| 25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
| 26 | #include <linux/msi.h> | 26 | #include <linux/msi.h> |
| 27 | 27 | ||
| 28 | #ifdef CONFIG_DMAR | 28 | #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP) |
| 29 | struct intel_iommu; | 29 | struct intel_iommu; |
| 30 | 30 | ||
| 31 | struct dmar_drhd_unit { | ||
| 32 | struct list_head list; /* list of drhd units */ | ||
| 33 | struct acpi_dmar_header *hdr; /* ACPI header */ | ||
| 34 | u64 reg_base_addr; /* register base address*/ | ||
| 35 | struct pci_dev **devices; /* target device array */ | ||
| 36 | int devices_cnt; /* target device count */ | ||
| 37 | u8 ignored:1; /* ignore drhd */ | ||
| 38 | u8 include_all:1; | ||
| 39 | struct intel_iommu *iommu; | ||
| 40 | }; | ||
| 41 | |||
| 42 | extern struct list_head dmar_drhd_units; | ||
| 43 | |||
| 44 | #define for_each_drhd_unit(drhd) \ | ||
| 45 | list_for_each_entry(drhd, &dmar_drhd_units, list) | ||
| 46 | |||
| 47 | extern int dmar_table_init(void); | ||
| 48 | extern int early_dmar_detect(void); | ||
| 49 | extern int dmar_dev_scope_init(void); | ||
| 50 | |||
| 51 | /* Intel IOMMU detection */ | ||
| 52 | extern void detect_intel_iommu(void); | ||
| 53 | |||
| 54 | |||
| 55 | extern int parse_ioapics_under_ir(void); | ||
| 56 | extern int alloc_iommu(struct dmar_drhd_unit *); | ||
| 57 | #else | ||
| 58 | static inline void detect_intel_iommu(void) | ||
| 59 | { | ||
| 60 | return; | ||
| 61 | } | ||
| 62 | |||
| 63 | static inline int dmar_table_init(void) | ||
| 64 | { | ||
| 65 | return -ENODEV; | ||
| 66 | } | ||
| 67 | #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */ | ||
| 68 | |||
| 69 | #ifdef CONFIG_INTR_REMAP | ||
| 70 | extern int intr_remapping_enabled; | ||
| 71 | extern int enable_intr_remapping(int); | ||
| 72 | |||
| 73 | struct irte { | ||
| 74 | union { | ||
| 75 | struct { | ||
| 76 | __u64 present : 1, | ||
| 77 | fpd : 1, | ||
| 78 | dst_mode : 1, | ||
| 79 | redir_hint : 1, | ||
| 80 | trigger_mode : 1, | ||
| 81 | dlvry_mode : 3, | ||
| 82 | avail : 4, | ||
| 83 | __reserved_1 : 4, | ||
| 84 | vector : 8, | ||
| 85 | __reserved_2 : 8, | ||
| 86 | dest_id : 32; | ||
| 87 | }; | ||
| 88 | __u64 low; | ||
| 89 | }; | ||
| 90 | |||
| 91 | union { | ||
| 92 | struct { | ||
| 93 | __u64 sid : 16, | ||
| 94 | sq : 2, | ||
| 95 | svt : 2, | ||
| 96 | __reserved_3 : 44; | ||
| 97 | }; | ||
| 98 | __u64 high; | ||
| 99 | }; | ||
| 100 | }; | ||
| 101 | extern int get_irte(int irq, struct irte *entry); | ||
| 102 | extern int modify_irte(int irq, struct irte *irte_modified); | ||
| 103 | extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count); | ||
| 104 | extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, | ||
| 105 | u16 sub_handle); | ||
| 106 | extern int map_irq_to_irte_handle(int irq, u16 *sub_handle); | ||
| 107 | extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index); | ||
| 108 | extern int flush_irte(int irq); | ||
| 109 | extern int free_irte(int irq); | ||
| 110 | |||
| 111 | extern int irq_remapped(int irq); | ||
| 112 | extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev); | ||
| 113 | extern struct intel_iommu *map_ioapic_to_ir(int apic); | ||
| 114 | #else | ||
| 115 | #define irq_remapped(irq) (0) | ||
| 116 | #define enable_intr_remapping(mode) (-1) | ||
| 117 | #define intr_remapping_enabled (0) | ||
| 118 | #endif | ||
| 119 | |||
| 120 | #ifdef CONFIG_DMAR | ||
| 31 | extern const char *dmar_get_fault_reason(u8 fault_reason); | 121 | extern const char *dmar_get_fault_reason(u8 fault_reason); |
| 32 | 122 | ||
| 33 | /* Can't use the common MSI interrupt functions | 123 | /* Can't use the common MSI interrupt functions |
| @@ -40,47 +130,30 @@ extern void dmar_msi_write(int irq, struct msi_msg *msg); | |||
| 40 | extern int dmar_set_interrupt(struct intel_iommu *iommu); | 130 | extern int dmar_set_interrupt(struct intel_iommu *iommu); |
| 41 | extern int arch_setup_dmar_msi(unsigned int irq); | 131 | extern int arch_setup_dmar_msi(unsigned int irq); |
| 42 | 132 | ||
| 43 | /* Intel IOMMU detection and initialization functions */ | 133 | extern int iommu_detected, no_iommu; |
| 44 | extern void detect_intel_iommu(void); | ||
| 45 | extern int intel_iommu_init(void); | ||
| 46 | |||
| 47 | extern int dmar_table_init(void); | ||
| 48 | extern int early_dmar_detect(void); | ||
| 49 | |||
| 50 | extern struct list_head dmar_drhd_units; | ||
| 51 | extern struct list_head dmar_rmrr_units; | 134 | extern struct list_head dmar_rmrr_units; |
| 52 | |||
| 53 | struct dmar_drhd_unit { | ||
| 54 | struct list_head list; /* list of drhd units */ | ||
| 55 | u64 reg_base_addr; /* register base address*/ | ||
| 56 | struct pci_dev **devices; /* target device array */ | ||
| 57 | int devices_cnt; /* target device count */ | ||
| 58 | u8 ignored:1; /* ignore drhd */ | ||
| 59 | u8 include_all:1; | ||
| 60 | struct intel_iommu *iommu; | ||
| 61 | }; | ||
| 62 | |||
| 63 | struct dmar_rmrr_unit { | 135 | struct dmar_rmrr_unit { |
| 64 | struct list_head list; /* list of rmrr units */ | 136 | struct list_head list; /* list of rmrr units */ |
| 137 | struct acpi_dmar_header *hdr; /* ACPI header */ | ||
| 65 | u64 base_address; /* reserved base address*/ | 138 | u64 base_address; /* reserved base address*/ |
| 66 | u64 end_address; /* reserved end address */ | 139 | u64 end_address; /* reserved end address */ |
| 67 | struct pci_dev **devices; /* target devices */ | 140 | struct pci_dev **devices; /* target devices */ |
| 68 | int devices_cnt; /* target device count */ | 141 | int devices_cnt; /* target device count */ |
| 69 | }; | 142 | }; |
| 70 | 143 | ||
| 71 | #define for_each_drhd_unit(drhd) \ | ||
| 72 | list_for_each_entry(drhd, &dmar_drhd_units, list) | ||
| 73 | #define for_each_rmrr_units(rmrr) \ | 144 | #define for_each_rmrr_units(rmrr) \ |
| 74 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) | 145 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) |
| 146 | /* Intel DMAR initialization functions */ | ||
| 147 | extern int intel_iommu_init(void); | ||
| 148 | extern int dmar_disabled; | ||
| 75 | #else | 149 | #else |
| 76 | static inline void detect_intel_iommu(void) | ||
| 77 | { | ||
| 78 | return; | ||
| 79 | } | ||
| 80 | static inline int intel_iommu_init(void) | 150 | static inline int intel_iommu_init(void) |
| 81 | { | 151 | { |
| 152 | #ifdef CONFIG_INTR_REMAP | ||
| 153 | return dmar_dev_scope_init(); | ||
| 154 | #else | ||
| 82 | return -ENODEV; | 155 | return -ENODEV; |
| 156 | #endif | ||
| 83 | } | 157 | } |
| 84 | |||
| 85 | #endif /* !CONFIG_DMAR */ | 158 | #endif /* !CONFIG_DMAR */ |
| 86 | #endif /* __DMAR_H__ */ | 159 | #endif /* __DMAR_H__ */ |
