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-rw-r--r--include/linux/dmar.h126
1 files changed, 99 insertions, 27 deletions
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 56c73b847551..f1984fc3e06d 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -25,9 +25,98 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/msi.h> 26#include <linux/msi.h>
27 27
28#ifdef CONFIG_DMAR 28#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
29struct intel_iommu; 29struct intel_iommu;
30 30
31struct dmar_drhd_unit {
32 struct list_head list; /* list of drhd units */
33 struct acpi_dmar_header *hdr; /* ACPI header */
34 u64 reg_base_addr; /* register base address*/
35 struct pci_dev **devices; /* target device array */
36 int devices_cnt; /* target device count */
37 u8 ignored:1; /* ignore drhd */
38 u8 include_all:1;
39 struct intel_iommu *iommu;
40};
41
42extern struct list_head dmar_drhd_units;
43
44#define for_each_drhd_unit(drhd) \
45 list_for_each_entry(drhd, &dmar_drhd_units, list)
46
47extern int dmar_table_init(void);
48extern int dmar_dev_scope_init(void);
49
50/* Intel IOMMU detection */
51extern void detect_intel_iommu(void);
52
53
54extern int parse_ioapics_under_ir(void);
55extern int alloc_iommu(struct dmar_drhd_unit *);
56#else
57static inline void detect_intel_iommu(void)
58{
59 return;
60}
61
62static inline int dmar_table_init(void)
63{
64 return -ENODEV;
65}
66#endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
67
68#ifdef CONFIG_INTR_REMAP
69extern int intr_remapping_enabled;
70extern int enable_intr_remapping(int);
71
72struct irte {
73 union {
74 struct {
75 __u64 present : 1,
76 fpd : 1,
77 dst_mode : 1,
78 redir_hint : 1,
79 trigger_mode : 1,
80 dlvry_mode : 3,
81 avail : 4,
82 __reserved_1 : 4,
83 vector : 8,
84 __reserved_2 : 8,
85 dest_id : 32;
86 };
87 __u64 low;
88 };
89
90 union {
91 struct {
92 __u64 sid : 16,
93 sq : 2,
94 svt : 2,
95 __reserved_3 : 44;
96 };
97 __u64 high;
98 };
99};
100extern int get_irte(int irq, struct irte *entry);
101extern int modify_irte(int irq, struct irte *irte_modified);
102extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
103extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
104 u16 sub_handle);
105extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
106extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index);
107extern int flush_irte(int irq);
108extern int free_irte(int irq);
109
110extern int irq_remapped(int irq);
111extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
112extern struct intel_iommu *map_ioapic_to_ir(int apic);
113#else
114#define irq_remapped(irq) (0)
115#define enable_intr_remapping(mode) (-1)
116#define intr_remapping_enabled (0)
117#endif
118
119#ifdef CONFIG_DMAR
31extern const char *dmar_get_fault_reason(u8 fault_reason); 120extern const char *dmar_get_fault_reason(u8 fault_reason);
32 121
33/* Can't use the common MSI interrupt functions 122/* Can't use the common MSI interrupt functions
@@ -40,47 +129,30 @@ extern void dmar_msi_write(int irq, struct msi_msg *msg);
40extern int dmar_set_interrupt(struct intel_iommu *iommu); 129extern int dmar_set_interrupt(struct intel_iommu *iommu);
41extern int arch_setup_dmar_msi(unsigned int irq); 130extern int arch_setup_dmar_msi(unsigned int irq);
42 131
43/* Intel IOMMU detection and initialization functions */ 132extern int iommu_detected, no_iommu;
44extern void detect_intel_iommu(void);
45extern int intel_iommu_init(void);
46
47extern int dmar_table_init(void);
48extern int early_dmar_detect(void);
49
50extern struct list_head dmar_drhd_units;
51extern struct list_head dmar_rmrr_units; 133extern struct list_head dmar_rmrr_units;
52
53struct dmar_drhd_unit {
54 struct list_head list; /* list of drhd units */
55 u64 reg_base_addr; /* register base address*/
56 struct pci_dev **devices; /* target device array */
57 int devices_cnt; /* target device count */
58 u8 ignored:1; /* ignore drhd */
59 u8 include_all:1;
60 struct intel_iommu *iommu;
61};
62
63struct dmar_rmrr_unit { 134struct dmar_rmrr_unit {
64 struct list_head list; /* list of rmrr units */ 135 struct list_head list; /* list of rmrr units */
136 struct acpi_dmar_header *hdr; /* ACPI header */
65 u64 base_address; /* reserved base address*/ 137 u64 base_address; /* reserved base address*/
66 u64 end_address; /* reserved end address */ 138 u64 end_address; /* reserved end address */
67 struct pci_dev **devices; /* target devices */ 139 struct pci_dev **devices; /* target devices */
68 int devices_cnt; /* target device count */ 140 int devices_cnt; /* target device count */
69}; 141};
70 142
71#define for_each_drhd_unit(drhd) \
72 list_for_each_entry(drhd, &dmar_drhd_units, list)
73#define for_each_rmrr_units(rmrr) \ 143#define for_each_rmrr_units(rmrr) \
74 list_for_each_entry(rmrr, &dmar_rmrr_units, list) 144 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
145/* Intel DMAR initialization functions */
146extern int intel_iommu_init(void);
147extern int dmar_disabled;
75#else 148#else
76static inline void detect_intel_iommu(void)
77{
78 return;
79}
80static inline int intel_iommu_init(void) 149static inline int intel_iommu_init(void)
81{ 150{
151#ifdef CONFIG_INTR_REMAP
152 return dmar_dev_scope_init();
153#else
82 return -ENODEV; 154 return -ENODEV;
155#endif
83} 156}
84
85#endif /* !CONFIG_DMAR */ 157#endif /* !CONFIG_DMAR */
86#endif /* __DMAR_H__ */ 158#endif /* __DMAR_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-06 15:13:39 -0500