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-rw-r--r--include/linux/dmaengine.h293
1 files changed, 183 insertions, 110 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index c94d8f1d62e5..a3b6035b6c86 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -21,29 +21,40 @@
21#ifndef DMAENGINE_H 21#ifndef DMAENGINE_H
22#define DMAENGINE_H 22#define DMAENGINE_H
23 23
24#ifdef CONFIG_DMA_ENGINE
25
26#include <linux/device.h> 24#include <linux/device.h>
27#include <linux/uio.h> 25#include <linux/uio.h>
28#include <linux/kref.h> 26#include <linux/kref.h>
29#include <linux/completion.h> 27#include <linux/completion.h>
30#include <linux/rcupdate.h> 28#include <linux/rcupdate.h>
29#include <linux/dma-mapping.h>
31 30
32/** 31/**
33 * enum dma_event - resource PNP/power managment events 32 * enum dma_state - resource PNP/power managment state
34 * @DMA_RESOURCE_SUSPEND: DMA device going into low power state 33 * @DMA_RESOURCE_SUSPEND: DMA device going into low power state
35 * @DMA_RESOURCE_RESUME: DMA device returning to full power 34 * @DMA_RESOURCE_RESUME: DMA device returning to full power
36 * @DMA_RESOURCE_ADDED: DMA device added to the system 35 * @DMA_RESOURCE_AVAILABLE: DMA device available to the system
37 * @DMA_RESOURCE_REMOVED: DMA device removed from the system 36 * @DMA_RESOURCE_REMOVED: DMA device removed from the system
38 */ 37 */
39enum dma_event { 38enum dma_state {
40 DMA_RESOURCE_SUSPEND, 39 DMA_RESOURCE_SUSPEND,
41 DMA_RESOURCE_RESUME, 40 DMA_RESOURCE_RESUME,
42 DMA_RESOURCE_ADDED, 41 DMA_RESOURCE_AVAILABLE,
43 DMA_RESOURCE_REMOVED, 42 DMA_RESOURCE_REMOVED,
44}; 43};
45 44
46/** 45/**
46 * enum dma_state_client - state of the channel in the client
47 * @DMA_ACK: client would like to use, or was using this channel
48 * @DMA_DUP: client has already seen this channel, or is not using this channel
49 * @DMA_NAK: client does not want to see any more channels
50 */
51enum dma_state_client {
52 DMA_ACK,
53 DMA_DUP,
54 DMA_NAK,
55};
56
57/**
47 * typedef dma_cookie_t - an opaque DMA cookie 58 * typedef dma_cookie_t - an opaque DMA cookie
48 * 59 *
49 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code 60 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
@@ -65,6 +76,31 @@ enum dma_status {
65}; 76};
66 77
67/** 78/**
79 * enum dma_transaction_type - DMA transaction types/indexes
80 */
81enum dma_transaction_type {
82 DMA_MEMCPY,
83 DMA_XOR,
84 DMA_PQ_XOR,
85 DMA_DUAL_XOR,
86 DMA_PQ_UPDATE,
87 DMA_ZERO_SUM,
88 DMA_PQ_ZERO_SUM,
89 DMA_MEMSET,
90 DMA_MEMCPY_CRC32C,
91 DMA_INTERRUPT,
92};
93
94/* last transaction type for creation of the capabilities mask */
95#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1)
96
97/**
98 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
99 * See linux/cpumask.h
100 */
101typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
102
103/**
68 * struct dma_chan_percpu - the per-CPU part of struct dma_chan 104 * struct dma_chan_percpu - the per-CPU part of struct dma_chan
69 * @refcount: local_t used for open-coded "bigref" counting 105 * @refcount: local_t used for open-coded "bigref" counting
70 * @memcpy_count: transaction counter 106 * @memcpy_count: transaction counter
@@ -80,7 +116,6 @@ struct dma_chan_percpu {
80 116
81/** 117/**
82 * struct dma_chan - devices supply DMA channels, clients use them 118 * struct dma_chan - devices supply DMA channels, clients use them
83 * @client: ptr to the client user of this chan, will be %NULL when unused
84 * @device: ptr to the dma device who supplies this channel, always !%NULL 119 * @device: ptr to the dma device who supplies this channel, always !%NULL
85 * @cookie: last cookie value returned to client 120 * @cookie: last cookie value returned to client
86 * @chan_id: channel ID for sysfs 121 * @chan_id: channel ID for sysfs
@@ -88,12 +123,10 @@ struct dma_chan_percpu {
88 * @refcount: kref, used in "bigref" slow-mode 123 * @refcount: kref, used in "bigref" slow-mode
89 * @slow_ref: indicates that the DMA channel is free 124 * @slow_ref: indicates that the DMA channel is free
90 * @rcu: the DMA channel's RCU head 125 * @rcu: the DMA channel's RCU head
91 * @client_node: used to add this to the client chan list
92 * @device_node: used to add this to the device chan list 126 * @device_node: used to add this to the device chan list
93 * @local: per-cpu pointer to a struct dma_chan_percpu 127 * @local: per-cpu pointer to a struct dma_chan_percpu
94 */ 128 */
95struct dma_chan { 129struct dma_chan {
96 struct dma_client *client;
97 struct dma_device *device; 130 struct dma_device *device;
98 dma_cookie_t cookie; 131 dma_cookie_t cookie;
99 132
@@ -105,11 +138,11 @@ struct dma_chan {
105 int slow_ref; 138 int slow_ref;
106 struct rcu_head rcu; 139 struct rcu_head rcu;
107 140
108 struct list_head client_node;
109 struct list_head device_node; 141 struct list_head device_node;
110 struct dma_chan_percpu *local; 142 struct dma_chan_percpu *local;
111}; 143};
112 144
145
113void dma_chan_cleanup(struct kref *kref); 146void dma_chan_cleanup(struct kref *kref);
114 147
115static inline void dma_chan_get(struct dma_chan *chan) 148static inline void dma_chan_get(struct dma_chan *chan)
@@ -134,169 +167,206 @@ static inline void dma_chan_put(struct dma_chan *chan)
134 167
135/* 168/*
136 * typedef dma_event_callback - function pointer to a DMA event callback 169 * typedef dma_event_callback - function pointer to a DMA event callback
170 * For each channel added to the system this routine is called for each client.
171 * If the client would like to use the channel it returns '1' to signal (ack)
172 * the dmaengine core to take out a reference on the channel and its
173 * corresponding device. A client must not 'ack' an available channel more
174 * than once. When a channel is removed all clients are notified. If a client
175 * is using the channel it must 'ack' the removal. A client must not 'ack' a
176 * removed channel more than once.
177 * @client - 'this' pointer for the client context
178 * @chan - channel to be acted upon
179 * @state - available or removed
137 */ 180 */
138typedef void (*dma_event_callback) (struct dma_client *client, 181struct dma_client;
139 struct dma_chan *chan, enum dma_event event); 182typedef enum dma_state_client (*dma_event_callback) (struct dma_client *client,
183 struct dma_chan *chan, enum dma_state state);
140 184
141/** 185/**
142 * struct dma_client - info on the entity making use of DMA services 186 * struct dma_client - info on the entity making use of DMA services
143 * @event_callback: func ptr to call when something happens 187 * @event_callback: func ptr to call when something happens
144 * @chan_count: number of chans allocated 188 * @cap_mask: only return channels that satisfy the requested capabilities
145 * @chans_desired: number of chans requested. Can be +/- chan_count 189 * a value of zero corresponds to any capability
146 * @lock: protects access to the channels list
147 * @channels: the list of DMA channels allocated
148 * @global_node: list_head for global dma_client_list 190 * @global_node: list_head for global dma_client_list
149 */ 191 */
150struct dma_client { 192struct dma_client {
151 dma_event_callback event_callback; 193 dma_event_callback event_callback;
152 unsigned int chan_count; 194 dma_cap_mask_t cap_mask;
153 unsigned int chans_desired;
154
155 spinlock_t lock;
156 struct list_head channels;
157 struct list_head global_node; 195 struct list_head global_node;
158}; 196};
159 197
198typedef void (*dma_async_tx_callback)(void *dma_async_param);
199/**
200 * struct dma_async_tx_descriptor - async transaction descriptor
201 * ---dma generic offload fields---
202 * @cookie: tracking cookie for this transaction, set to -EBUSY if
203 * this tx is sitting on a dependency list
204 * @ack: the descriptor can not be reused until the client acknowledges
205 * receipt, i.e. has has a chance to establish any dependency chains
206 * @phys: physical address of the descriptor
207 * @tx_list: driver common field for operations that require multiple
208 * descriptors
209 * @chan: target channel for this operation
210 * @tx_submit: set the prepared descriptor(s) to be executed by the engine
211 * @tx_set_dest: set a destination address in a hardware descriptor
212 * @tx_set_src: set a source address in a hardware descriptor
213 * @callback: routine to call after this operation is complete
214 * @callback_param: general parameter to pass to the callback routine
215 * ---async_tx api specific fields---
216 * @depend_list: at completion this list of transactions are submitted
217 * @depend_node: allow this transaction to be executed after another
218 * transaction has completed, possibly on another channel
219 * @parent: pointer to the next level up in the dependency chain
220 * @lock: protect the dependency list
221 */
222struct dma_async_tx_descriptor {
223 dma_cookie_t cookie;
224 int ack;
225 dma_addr_t phys;
226 struct list_head tx_list;
227 struct dma_chan *chan;
228 dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
229 void (*tx_set_dest)(dma_addr_t addr,
230 struct dma_async_tx_descriptor *tx, int index);
231 void (*tx_set_src)(dma_addr_t addr,
232 struct dma_async_tx_descriptor *tx, int index);
233 dma_async_tx_callback callback;
234 void *callback_param;
235 struct list_head depend_list;
236 struct list_head depend_node;
237 struct dma_async_tx_descriptor *parent;
238 spinlock_t lock;
239};
240
160/** 241/**
161 * struct dma_device - info on the entity supplying DMA services 242 * struct dma_device - info on the entity supplying DMA services
162 * @chancnt: how many DMA channels are supported 243 * @chancnt: how many DMA channels are supported
163 * @channels: the list of struct dma_chan 244 * @channels: the list of struct dma_chan
164 * @global_node: list_head for global dma_device_list 245 * @global_node: list_head for global dma_device_list
246 * @cap_mask: one or more dma_capability flags
247 * @max_xor: maximum number of xor sources, 0 if no capability
165 * @refcount: reference count 248 * @refcount: reference count
166 * @done: IO completion struct 249 * @done: IO completion struct
167 * @dev_id: unique device ID 250 * @dev_id: unique device ID
251 * @dev: struct device reference for dma mapping api
168 * @device_alloc_chan_resources: allocate resources and return the 252 * @device_alloc_chan_resources: allocate resources and return the
169 * number of allocated descriptors 253 * number of allocated descriptors
170 * @device_free_chan_resources: release DMA channel's resources 254 * @device_free_chan_resources: release DMA channel's resources
171 * @device_memcpy_buf_to_buf: memcpy buf pointer to buf pointer 255 * @device_prep_dma_memcpy: prepares a memcpy operation
172 * @device_memcpy_buf_to_pg: memcpy buf pointer to struct page 256 * @device_prep_dma_xor: prepares a xor operation
173 * @device_memcpy_pg_to_pg: memcpy struct page/offset to struct page/offset 257 * @device_prep_dma_zero_sum: prepares a zero_sum operation
174 * @device_memcpy_complete: poll the status of an IOAT DMA transaction 258 * @device_prep_dma_memset: prepares a memset operation
175 * @device_memcpy_issue_pending: push appended descriptors to hardware 259 * @device_prep_dma_interrupt: prepares an end of chain interrupt operation
260 * @device_dependency_added: async_tx notifies the channel about new deps
261 * @device_issue_pending: push pending transactions to hardware
176 */ 262 */
177struct dma_device { 263struct dma_device {
178 264
179 unsigned int chancnt; 265 unsigned int chancnt;
180 struct list_head channels; 266 struct list_head channels;
181 struct list_head global_node; 267 struct list_head global_node;
268 dma_cap_mask_t cap_mask;
269 int max_xor;
182 270
183 struct kref refcount; 271 struct kref refcount;
184 struct completion done; 272 struct completion done;
185 273
186 int dev_id; 274 int dev_id;
275 struct device *dev;
187 276
188 int (*device_alloc_chan_resources)(struct dma_chan *chan); 277 int (*device_alloc_chan_resources)(struct dma_chan *chan);
189 void (*device_free_chan_resources)(struct dma_chan *chan); 278 void (*device_free_chan_resources)(struct dma_chan *chan);
190 dma_cookie_t (*device_memcpy_buf_to_buf)(struct dma_chan *chan, 279
191 void *dest, void *src, size_t len); 280 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
192 dma_cookie_t (*device_memcpy_buf_to_pg)(struct dma_chan *chan, 281 struct dma_chan *chan, size_t len, int int_en);
193 struct page *page, unsigned int offset, void *kdata, 282 struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
194 size_t len); 283 struct dma_chan *chan, unsigned int src_cnt, size_t len,
195 dma_cookie_t (*device_memcpy_pg_to_pg)(struct dma_chan *chan, 284 int int_en);
196 struct page *dest_pg, unsigned int dest_off, 285 struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)(
197 struct page *src_pg, unsigned int src_off, size_t len); 286 struct dma_chan *chan, unsigned int src_cnt, size_t len,
198 enum dma_status (*device_memcpy_complete)(struct dma_chan *chan, 287 u32 *result, int int_en);
288 struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
289 struct dma_chan *chan, int value, size_t len, int int_en);
290 struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
291 struct dma_chan *chan);
292
293 void (*device_dependency_added)(struct dma_chan *chan);
294 enum dma_status (*device_is_tx_complete)(struct dma_chan *chan,
199 dma_cookie_t cookie, dma_cookie_t *last, 295 dma_cookie_t cookie, dma_cookie_t *last,
200 dma_cookie_t *used); 296 dma_cookie_t *used);
201 void (*device_memcpy_issue_pending)(struct dma_chan *chan); 297 void (*device_issue_pending)(struct dma_chan *chan);
202}; 298};
203 299
204/* --- public DMA engine API --- */ 300/* --- public DMA engine API --- */
205 301
206struct dma_client *dma_async_client_register(dma_event_callback event_callback); 302void dma_async_client_register(struct dma_client *client);
207void dma_async_client_unregister(struct dma_client *client); 303void dma_async_client_unregister(struct dma_client *client);
208void dma_async_client_chan_request(struct dma_client *client, 304void dma_async_client_chan_request(struct dma_client *client);
209 unsigned int number); 305dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan,
306 void *dest, void *src, size_t len);
307dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan,
308 struct page *page, unsigned int offset, void *kdata, size_t len);
309dma_cookie_t dma_async_memcpy_pg_to_pg(struct dma_chan *chan,
310 struct page *dest_pg, unsigned int dest_off, struct page *src_pg,
311 unsigned int src_off, size_t len);
312void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
313 struct dma_chan *chan);
210 314
211/** 315static inline void
212 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses 316async_tx_ack(struct dma_async_tx_descriptor *tx)
213 * @chan: DMA channel to offload copy to
214 * @dest: destination address (virtual)
215 * @src: source address (virtual)
216 * @len: length
217 *
218 * Both @dest and @src must be mappable to a bus address according to the
219 * DMA mapping API rules for streaming mappings.
220 * Both @dest and @src must stay memory resident (kernel memory or locked
221 * user space pages).
222 */
223static inline dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan,
224 void *dest, void *src, size_t len)
225{ 317{
226 int cpu = get_cpu(); 318 tx->ack = 1;
227 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
228 per_cpu_ptr(chan->local, cpu)->memcpy_count++;
229 put_cpu();
230
231 return chan->device->device_memcpy_buf_to_buf(chan, dest, src, len);
232} 319}
233 320
234/** 321#define first_dma_cap(mask) __first_dma_cap(&(mask))
235 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page 322static inline int __first_dma_cap(const dma_cap_mask_t *srcp)
236 * @chan: DMA channel to offload copy to
237 * @page: destination page
238 * @offset: offset in page to copy to
239 * @kdata: source address (virtual)
240 * @len: length
241 *
242 * Both @page/@offset and @kdata must be mappable to a bus address according
243 * to the DMA mapping API rules for streaming mappings.
244 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
245 * locked user space pages)
246 */
247static inline dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan,
248 struct page *page, unsigned int offset, void *kdata, size_t len)
249{ 323{
250 int cpu = get_cpu(); 324 return min_t(int, DMA_TX_TYPE_END,
251 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; 325 find_first_bit(srcp->bits, DMA_TX_TYPE_END));
252 per_cpu_ptr(chan->local, cpu)->memcpy_count++; 326}
253 put_cpu();
254 327
255 return chan->device->device_memcpy_buf_to_pg(chan, page, offset, 328#define next_dma_cap(n, mask) __next_dma_cap((n), &(mask))
256 kdata, len); 329static inline int __next_dma_cap(int n, const dma_cap_mask_t *srcp)
330{
331 return min_t(int, DMA_TX_TYPE_END,
332 find_next_bit(srcp->bits, DMA_TX_TYPE_END, n+1));
257} 333}
258 334
259/** 335#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask))
260 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page 336static inline void
261 * @chan: DMA channel to offload copy to 337__dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp)
262 * @dest_pg: destination page
263 * @dest_off: offset in page to copy to
264 * @src_pg: source page
265 * @src_off: offset in page to copy from
266 * @len: length
267 *
268 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
269 * address according to the DMA mapping API rules for streaming mappings.
270 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
271 * (kernel memory or locked user space pages).
272 */
273static inline dma_cookie_t dma_async_memcpy_pg_to_pg(struct dma_chan *chan,
274 struct page *dest_pg, unsigned int dest_off, struct page *src_pg,
275 unsigned int src_off, size_t len)
276{ 338{
277 int cpu = get_cpu(); 339 set_bit(tx_type, dstp->bits);
278 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; 340}
279 per_cpu_ptr(chan->local, cpu)->memcpy_count++;
280 put_cpu();
281 341
282 return chan->device->device_memcpy_pg_to_pg(chan, dest_pg, dest_off, 342#define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask))
283 src_pg, src_off, len); 343static inline int
344__dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp)
345{
346 return test_bit(tx_type, srcp->bits);
284} 347}
285 348
349#define for_each_dma_cap_mask(cap, mask) \
350 for ((cap) = first_dma_cap(mask); \
351 (cap) < DMA_TX_TYPE_END; \
352 (cap) = next_dma_cap((cap), (mask)))
353
286/** 354/**
287 * dma_async_memcpy_issue_pending - flush pending copies to HW 355 * dma_async_issue_pending - flush pending transactions to HW
288 * @chan: target DMA channel 356 * @chan: target DMA channel
289 * 357 *
290 * This allows drivers to push copies to HW in batches, 358 * This allows drivers to push copies to HW in batches,
291 * reducing MMIO writes where possible. 359 * reducing MMIO writes where possible.
292 */ 360 */
293static inline void dma_async_memcpy_issue_pending(struct dma_chan *chan) 361static inline void dma_async_issue_pending(struct dma_chan *chan)
294{ 362{
295 return chan->device->device_memcpy_issue_pending(chan); 363 return chan->device->device_issue_pending(chan);
296} 364}
297 365
366#define dma_async_memcpy_issue_pending(chan) dma_async_issue_pending(chan)
367
298/** 368/**
299 * dma_async_memcpy_complete - poll for transaction completion 369 * dma_async_is_tx_complete - poll for transaction completion
300 * @chan: DMA channel 370 * @chan: DMA channel
301 * @cookie: transaction identifier to check status of 371 * @cookie: transaction identifier to check status of
302 * @last: returns last completed cookie, can be NULL 372 * @last: returns last completed cookie, can be NULL
@@ -306,12 +376,15 @@ static inline void dma_async_memcpy_issue_pending(struct dma_chan *chan)
306 * internal state and can be used with dma_async_is_complete() to check 376 * internal state and can be used with dma_async_is_complete() to check
307 * the status of multiple cookies without re-checking hardware state. 377 * the status of multiple cookies without re-checking hardware state.
308 */ 378 */
309static inline enum dma_status dma_async_memcpy_complete(struct dma_chan *chan, 379static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan,
310 dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) 380 dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used)
311{ 381{
312 return chan->device->device_memcpy_complete(chan, cookie, last, used); 382 return chan->device->device_is_tx_complete(chan, cookie, last, used);
313} 383}
314 384
385#define dma_async_memcpy_complete(chan, cookie, last, used)\
386 dma_async_is_tx_complete(chan, cookie, last, used)
387
315/** 388/**
316 * dma_async_is_complete - test a cookie against chan state 389 * dma_async_is_complete - test a cookie against chan state
317 * @cookie: transaction identifier to test status of 390 * @cookie: transaction identifier to test status of
@@ -334,6 +407,7 @@ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
334 return DMA_IN_PROGRESS; 407 return DMA_IN_PROGRESS;
335} 408}
336 409
410enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
337 411
338/* --- DMA device --- */ 412/* --- DMA device --- */
339 413
@@ -362,5 +436,4 @@ dma_cookie_t dma_memcpy_pg_to_iovec(struct dma_chan *chan, struct iovec *iov,
362 struct dma_pinned_list *pinned_list, struct page *page, 436 struct dma_pinned_list *pinned_list, struct page *page,
363 unsigned int offset, size_t len); 437 unsigned int offset, size_t len);
364 438
365#endif /* CONFIG_DMA_ENGINE */
366#endif /* DMAENGINE_H */ 439#endif /* DMAENGINE_H */