aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/dmaengine.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r--include/linux/dmaengine.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 5204f018931b..c61d4ca27bcc 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -114,11 +114,17 @@ enum dma_ctrl_flags {
114 * @DMA_TERMINATE_ALL: terminate all ongoing transfers 114 * @DMA_TERMINATE_ALL: terminate all ongoing transfers
115 * @DMA_PAUSE: pause ongoing transfers 115 * @DMA_PAUSE: pause ongoing transfers
116 * @DMA_RESUME: resume paused transfer 116 * @DMA_RESUME: resume paused transfer
117 * @DMA_SLAVE_CONFIG: this command is only implemented by DMA controllers
118 * that need to runtime reconfigure the slave channels (as opposed to passing
119 * configuration data in statically from the platform). An additional
120 * argument of struct dma_slave_config must be passed in with this
121 * command.
117 */ 122 */
118enum dma_ctrl_cmd { 123enum dma_ctrl_cmd {
119 DMA_TERMINATE_ALL, 124 DMA_TERMINATE_ALL,
120 DMA_PAUSE, 125 DMA_PAUSE,
121 DMA_RESUME, 126 DMA_RESUME,
127 DMA_SLAVE_CONFIG,
122}; 128};
123 129
124/** 130/**
@@ -199,6 +205,71 @@ struct dma_chan_dev {
199 atomic_t *idr_ref; 205 atomic_t *idr_ref;
200}; 206};
201 207
208/**
209 * enum dma_slave_buswidth - defines bus with of the DMA slave
210 * device, source or target buses
211 */
212enum dma_slave_buswidth {
213 DMA_SLAVE_BUSWIDTH_UNDEFINED = 0,
214 DMA_SLAVE_BUSWIDTH_1_BYTE = 1,
215 DMA_SLAVE_BUSWIDTH_2_BYTES = 2,
216 DMA_SLAVE_BUSWIDTH_4_BYTES = 4,
217 DMA_SLAVE_BUSWIDTH_8_BYTES = 8,
218};
219
220/**
221 * struct dma_slave_config - dma slave channel runtime config
222 * @direction: whether the data shall go in or out on this slave
223 * channel, right now. DMA_TO_DEVICE and DMA_FROM_DEVICE are
224 * legal values, DMA_BIDIRECTIONAL is not acceptable since we
225 * need to differentiate source and target addresses.
226 * @src_addr: this is the physical address where DMA slave data
227 * should be read (RX), if the source is memory this argument is
228 * ignored.
229 * @dst_addr: this is the physical address where DMA slave data
230 * should be written (TX), if the source is memory this argument
231 * is ignored.
232 * @src_addr_width: this is the width in bytes of the source (RX)
233 * register where DMA data shall be read. If the source
234 * is memory this may be ignored depending on architecture.
235 * Legal values: 1, 2, 4, 8.
236 * @dst_addr_width: same as src_addr_width but for destination
237 * target (TX) mutatis mutandis.
238 * @src_maxburst: the maximum number of words (note: words, as in
239 * units of the src_addr_width member, not bytes) that can be sent
240 * in one burst to the device. Typically something like half the
241 * FIFO depth on I/O peripherals so you don't overflow it. This
242 * may or may not be applicable on memory sources.
243 * @dst_maxburst: same as src_maxburst but for destination target
244 * mutatis mutandis.
245 *
246 * This struct is passed in as configuration data to a DMA engine
247 * in order to set up a certain channel for DMA transport at runtime.
248 * The DMA device/engine has to provide support for an additional
249 * command in the channel config interface, DMA_SLAVE_CONFIG
250 * and this struct will then be passed in as an argument to the
251 * DMA engine device_control() function.
252 *
253 * The rationale for adding configuration information to this struct
254 * is as follows: if it is likely that most DMA slave controllers in
255 * the world will support the configuration option, then make it
256 * generic. If not: if it is fixed so that it be sent in static from
257 * the platform data, then prefer to do that. Else, if it is neither
258 * fixed at runtime, nor generic enough (such as bus mastership on
259 * some CPU family and whatnot) then create a custom slave config
260 * struct and pass that, then make this config a member of that
261 * struct, if applicable.
262 */
263struct dma_slave_config {
264 enum dma_data_direction direction;
265 dma_addr_t src_addr;
266 dma_addr_t dst_addr;
267 enum dma_slave_buswidth src_addr_width;
268 enum dma_slave_buswidth dst_addr_width;
269 u32 src_maxburst;
270 u32 dst_maxburst;
271};
272
202static inline const char *dma_chan_name(struct dma_chan *chan) 273static inline const char *dma_chan_name(struct dma_chan *chan)
203{ 274{
204 return dev_name(&chan->dev->device); 275 return dev_name(&chan->dev->device);