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Diffstat (limited to 'include/linux/dma_remapping.h')
-rw-r--r--include/linux/dma_remapping.h27
1 files changed, 13 insertions, 14 deletions
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
index bff5c65f81dc..952df39c989d 100644
--- a/include/linux/dma_remapping.h
+++ b/include/linux/dma_remapping.h
@@ -2,15 +2,14 @@
2#define _DMA_REMAPPING_H 2#define _DMA_REMAPPING_H
3 3
4/* 4/*
5 * We need a fixed PAGE_SIZE of 4K irrespective of 5 * VT-d hardware uses 4KiB page size regardless of host page size.
6 * arch PAGE_SIZE for IOMMU page tables.
7 */ 6 */
8#define PAGE_SHIFT_4K (12) 7#define VTD_PAGE_SHIFT (12)
9#define PAGE_SIZE_4K (1UL << PAGE_SHIFT_4K) 8#define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
10#define PAGE_MASK_4K (((u64)-1) << PAGE_SHIFT_4K) 9#define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
11#define PAGE_ALIGN_4K(addr) (((addr) + PAGE_SIZE_4K - 1) & PAGE_MASK_4K) 10#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
12 11
13#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT_4K) 12#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)
14#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK) 13#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK)
15#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK) 14#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK)
16 15
@@ -25,7 +24,7 @@ struct root_entry {
25 u64 val; 24 u64 val;
26 u64 rsvd1; 25 u64 rsvd1;
27}; 26};
28#define ROOT_ENTRY_NR (PAGE_SIZE_4K/sizeof(struct root_entry)) 27#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
29static inline bool root_present(struct root_entry *root) 28static inline bool root_present(struct root_entry *root)
30{ 29{
31 return (root->val & 1); 30 return (root->val & 1);
@@ -36,7 +35,7 @@ static inline void set_root_present(struct root_entry *root)
36} 35}
37static inline void set_root_value(struct root_entry *root, unsigned long value) 36static inline void set_root_value(struct root_entry *root, unsigned long value)
38{ 37{
39 root->val |= value & PAGE_MASK_4K; 38 root->val |= value & VTD_PAGE_MASK;
40} 39}
41 40
42struct context_entry; 41struct context_entry;
@@ -45,7 +44,7 @@ get_context_addr_from_root(struct root_entry *root)
45{ 44{
46 return (struct context_entry *) 45 return (struct context_entry *)
47 (root_present(root)?phys_to_virt( 46 (root_present(root)?phys_to_virt(
48 root->val & PAGE_MASK_4K): 47 root->val & VTD_PAGE_MASK) :
49 NULL); 48 NULL);
50} 49}
51 50
@@ -67,7 +66,7 @@ struct context_entry {
67#define context_present(c) ((c).lo & 1) 66#define context_present(c) ((c).lo & 1)
68#define context_fault_disable(c) (((c).lo >> 1) & 1) 67#define context_fault_disable(c) (((c).lo >> 1) & 1)
69#define context_translation_type(c) (((c).lo >> 2) & 3) 68#define context_translation_type(c) (((c).lo >> 2) & 3)
70#define context_address_root(c) ((c).lo & PAGE_MASK_4K) 69#define context_address_root(c) ((c).lo & VTD_PAGE_MASK)
71#define context_address_width(c) ((c).hi & 7) 70#define context_address_width(c) ((c).hi & 7)
72#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1)) 71#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1))
73 72
@@ -81,7 +80,7 @@ struct context_entry {
81 } while (0) 80 } while (0)
82#define CONTEXT_TT_MULTI_LEVEL 0 81#define CONTEXT_TT_MULTI_LEVEL 0
83#define context_set_address_root(c, val) \ 82#define context_set_address_root(c, val) \
84 do {(c).lo |= (val) & PAGE_MASK_4K;} while (0) 83 do {(c).lo |= (val) & VTD_PAGE_MASK; } while (0)
85#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0) 84#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0)
86#define context_set_domain_id(c, val) \ 85#define context_set_domain_id(c, val) \
87 do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0) 86 do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0)
@@ -107,9 +106,9 @@ struct dma_pte {
107#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0) 106#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0)
108#define dma_set_pte_prot(p, prot) \ 107#define dma_set_pte_prot(p, prot) \
109 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0) 108 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
110#define dma_pte_addr(p) ((p).val & PAGE_MASK_4K) 109#define dma_pte_addr(p) ((p).val & VTD_PAGE_MASK)
111#define dma_set_pte_addr(p, addr) do {\ 110#define dma_set_pte_addr(p, addr) do {\
112 (p).val |= ((addr) & PAGE_MASK_4K); } while (0) 111 (p).val |= ((addr) & VTD_PAGE_MASK); } while (0)
113#define dma_pte_present(p) (((p).val & 3) != 0) 112#define dma_pte_present(p) (((p).val & 3) != 0)
114 113
115struct intel_iommu; 114struct intel_iommu;