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opt">]; }; struct control_regs { struct preg vcount; /* vertical counter */ /* Vertical parameters are in units of 1/2 scan line */ struct preg vswin; /* between vsblank and vssync */ struct preg vsblank; /* vert start blank */ struct preg veblank; /* vert end blank (display start) */ struct preg vewin; /* between vesync and veblank */ struct preg vesync; /* vert end sync */ struct preg vssync; /* vert start sync */ struct preg vperiod; /* vert period */ struct preg piped; /* pipe delay hardware cursor */ /* Horizontal params are in units of 2 pixels */ struct preg hperiod; /* horiz period - 2 */ struct preg hsblank; /* horiz start blank */ struct preg heblank; /* horiz end blank */ struct preg hesync; /* horiz end sync */ struct preg hssync; /* horiz start sync */ struct preg heq; /* half horiz sync len */ struct preg hlfln; /* half horiz period */ struct preg hserr; /* horiz period - horiz sync len */ struct preg cnttst; struct preg ctrl; /* display control */ struct preg start_addr; /* start address: 5 lsbs zero */ struct preg pitch; /* addrs diff between scan lines */ struct preg mon_sense; /* monitor sense bits */ struct preg vram_attr; /* enable vram banks */ struct preg mode; struct preg rfrcnt; /* refresh count */ struct preg intr_ena; /* interrupt enable */ struct preg intr_stat; /* interrupt status */ struct preg res[5]; }; struct control_regints { /* Vertical parameters are in units of 1/2 scan line */ unsigned vswin; /* between vsblank and vssync */ unsigned vsblank; /* vert start blank */ unsigned veblank; /* vert end blank (display start) */ unsigned vewin; /* between vesync and veblank */ unsigned vesync; /* vert end sync */ unsigned vssync; /* vert start sync */ unsigned vperiod; /* vert period */ unsigned piped; /* pipe delay hardware cursor */ /* Horizontal params are in units of 2 pixels */ /* Except, apparently, for hres > 1024 (or == 1280?) */ unsigned hperiod; /* horiz period - 2 */ unsigned hsblank; /* horiz start blank */ unsigned heblank; /* horiz end blank */ unsigned hesync; /* horiz end sync */ unsigned hssync; /* horiz start sync */ unsigned heq; /* half horiz sync len */ unsigned hlfln; /* half horiz period */ unsigned hserr; /* horiz period - horiz sync len */ }; /* * Dot clock rate is * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0]. */ struct control_regvals { unsigned regs[16]; /* for vswin .. hserr */ unsigned char mode;