diff options
Diffstat (limited to 'include/linux/clk-provider.h')
-rw-r--r-- | include/linux/clk-provider.h | 58 |
1 files changed, 49 insertions, 9 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index d936409520f8..5591ea71a8d1 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h | |||
@@ -33,6 +33,7 @@ | |||
33 | #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ | 33 | #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ |
34 | 34 | ||
35 | struct clk_hw; | 35 | struct clk_hw; |
36 | struct clk_core; | ||
36 | struct dentry; | 37 | struct dentry; |
37 | 38 | ||
38 | /** | 39 | /** |
@@ -174,9 +175,12 @@ struct clk_ops { | |||
174 | unsigned long parent_rate); | 175 | unsigned long parent_rate); |
175 | long (*round_rate)(struct clk_hw *hw, unsigned long rate, | 176 | long (*round_rate)(struct clk_hw *hw, unsigned long rate, |
176 | unsigned long *parent_rate); | 177 | unsigned long *parent_rate); |
177 | long (*determine_rate)(struct clk_hw *hw, unsigned long rate, | 178 | long (*determine_rate)(struct clk_hw *hw, |
178 | unsigned long *best_parent_rate, | 179 | unsigned long rate, |
179 | struct clk_hw **best_parent_hw); | 180 | unsigned long min_rate, |
181 | unsigned long max_rate, | ||
182 | unsigned long *best_parent_rate, | ||
183 | struct clk_hw **best_parent_hw); | ||
180 | int (*set_parent)(struct clk_hw *hw, u8 index); | 184 | int (*set_parent)(struct clk_hw *hw, u8 index); |
181 | u8 (*get_parent)(struct clk_hw *hw); | 185 | u8 (*get_parent)(struct clk_hw *hw); |
182 | int (*set_rate)(struct clk_hw *hw, unsigned long rate, | 186 | int (*set_rate)(struct clk_hw *hw, unsigned long rate, |
@@ -216,13 +220,17 @@ struct clk_init_data { | |||
216 | * clk_foo and then referenced by the struct clk instance that uses struct | 220 | * clk_foo and then referenced by the struct clk instance that uses struct |
217 | * clk_foo's clk_ops | 221 | * clk_foo's clk_ops |
218 | * | 222 | * |
219 | * @clk: pointer to the struct clk instance that points back to this struct | 223 | * @core: pointer to the struct clk_core instance that points back to this |
220 | * clk_hw instance | 224 | * struct clk_hw instance |
225 | * | ||
226 | * @clk: pointer to the per-user struct clk instance that can be used to call | ||
227 | * into the clk API | ||
221 | * | 228 | * |
222 | * @init: pointer to struct clk_init_data that contains the init data shared | 229 | * @init: pointer to struct clk_init_data that contains the init data shared |
223 | * with the common clock framework. | 230 | * with the common clock framework. |
224 | */ | 231 | */ |
225 | struct clk_hw { | 232 | struct clk_hw { |
233 | struct clk_core *core; | ||
226 | struct clk *clk; | 234 | struct clk *clk; |
227 | const struct clk_init_data *init; | 235 | const struct clk_init_data *init; |
228 | }; | 236 | }; |
@@ -294,6 +302,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name, | |||
294 | const char *parent_name, unsigned long flags, | 302 | const char *parent_name, unsigned long flags, |
295 | void __iomem *reg, u8 bit_idx, | 303 | void __iomem *reg, u8 bit_idx, |
296 | u8 clk_gate_flags, spinlock_t *lock); | 304 | u8 clk_gate_flags, spinlock_t *lock); |
305 | void clk_unregister_gate(struct clk *clk); | ||
297 | 306 | ||
298 | struct clk_div_table { | 307 | struct clk_div_table { |
299 | unsigned int val; | 308 | unsigned int val; |
@@ -352,6 +361,17 @@ struct clk_divider { | |||
352 | #define CLK_DIVIDER_READ_ONLY BIT(5) | 361 | #define CLK_DIVIDER_READ_ONLY BIT(5) |
353 | 362 | ||
354 | extern const struct clk_ops clk_divider_ops; | 363 | extern const struct clk_ops clk_divider_ops; |
364 | |||
365 | unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, | ||
366 | unsigned int val, const struct clk_div_table *table, | ||
367 | unsigned long flags); | ||
368 | long divider_round_rate(struct clk_hw *hw, unsigned long rate, | ||
369 | unsigned long *prate, const struct clk_div_table *table, | ||
370 | u8 width, unsigned long flags); | ||
371 | int divider_get_val(unsigned long rate, unsigned long parent_rate, | ||
372 | const struct clk_div_table *table, u8 width, | ||
373 | unsigned long flags); | ||
374 | |||
355 | struct clk *clk_register_divider(struct device *dev, const char *name, | 375 | struct clk *clk_register_divider(struct device *dev, const char *name, |
356 | const char *parent_name, unsigned long flags, | 376 | const char *parent_name, unsigned long flags, |
357 | void __iomem *reg, u8 shift, u8 width, | 377 | void __iomem *reg, u8 shift, u8 width, |
@@ -361,6 +381,7 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, | |||
361 | void __iomem *reg, u8 shift, u8 width, | 381 | void __iomem *reg, u8 shift, u8 width, |
362 | u8 clk_divider_flags, const struct clk_div_table *table, | 382 | u8 clk_divider_flags, const struct clk_div_table *table, |
363 | spinlock_t *lock); | 383 | spinlock_t *lock); |
384 | void clk_unregister_divider(struct clk *clk); | ||
364 | 385 | ||
365 | /** | 386 | /** |
366 | * struct clk_mux - multiplexer clock | 387 | * struct clk_mux - multiplexer clock |
@@ -382,6 +403,8 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, | |||
382 | * register, and mask of mux bits are in higher 16-bit of this register. | 403 | * register, and mask of mux bits are in higher 16-bit of this register. |
383 | * While setting the mux bits, higher 16-bit should also be updated to | 404 | * While setting the mux bits, higher 16-bit should also be updated to |
384 | * indicate changing mux bits. | 405 | * indicate changing mux bits. |
406 | * CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired | ||
407 | * frequency. | ||
385 | */ | 408 | */ |
386 | struct clk_mux { | 409 | struct clk_mux { |
387 | struct clk_hw hw; | 410 | struct clk_hw hw; |
@@ -396,7 +419,8 @@ struct clk_mux { | |||
396 | #define CLK_MUX_INDEX_ONE BIT(0) | 419 | #define CLK_MUX_INDEX_ONE BIT(0) |
397 | #define CLK_MUX_INDEX_BIT BIT(1) | 420 | #define CLK_MUX_INDEX_BIT BIT(1) |
398 | #define CLK_MUX_HIWORD_MASK BIT(2) | 421 | #define CLK_MUX_HIWORD_MASK BIT(2) |
399 | #define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */ | 422 | #define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */ |
423 | #define CLK_MUX_ROUND_CLOSEST BIT(4) | ||
400 | 424 | ||
401 | extern const struct clk_ops clk_mux_ops; | 425 | extern const struct clk_ops clk_mux_ops; |
402 | extern const struct clk_ops clk_mux_ro_ops; | 426 | extern const struct clk_ops clk_mux_ro_ops; |
@@ -411,6 +435,8 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name, | |||
411 | void __iomem *reg, u8 shift, u32 mask, | 435 | void __iomem *reg, u8 shift, u32 mask, |
412 | u8 clk_mux_flags, u32 *table, spinlock_t *lock); | 436 | u8 clk_mux_flags, u32 *table, spinlock_t *lock); |
413 | 437 | ||
438 | void clk_unregister_mux(struct clk *clk); | ||
439 | |||
414 | void of_fixed_factor_clk_setup(struct device_node *node); | 440 | void of_fixed_factor_clk_setup(struct device_node *node); |
415 | 441 | ||
416 | /** | 442 | /** |
@@ -550,15 +576,29 @@ bool __clk_is_prepared(struct clk *clk); | |||
550 | bool __clk_is_enabled(struct clk *clk); | 576 | bool __clk_is_enabled(struct clk *clk); |
551 | struct clk *__clk_lookup(const char *name); | 577 | struct clk *__clk_lookup(const char *name); |
552 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | 578 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, |
579 | unsigned long min_rate, | ||
580 | unsigned long max_rate, | ||
553 | unsigned long *best_parent_rate, | 581 | unsigned long *best_parent_rate, |
554 | struct clk_hw **best_parent_p); | 582 | struct clk_hw **best_parent_p); |
583 | unsigned long __clk_determine_rate(struct clk_hw *core, | ||
584 | unsigned long rate, | ||
585 | unsigned long min_rate, | ||
586 | unsigned long max_rate); | ||
587 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, | ||
588 | unsigned long min_rate, | ||
589 | unsigned long max_rate, | ||
590 | unsigned long *best_parent_rate, | ||
591 | struct clk_hw **best_parent_p); | ||
592 | |||
593 | static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src) | ||
594 | { | ||
595 | dst->clk = src->clk; | ||
596 | dst->core = src->core; | ||
597 | } | ||
555 | 598 | ||
556 | /* | 599 | /* |
557 | * FIXME clock api without lock protection | 600 | * FIXME clock api without lock protection |
558 | */ | 601 | */ |
559 | int __clk_prepare(struct clk *clk); | ||
560 | void __clk_unprepare(struct clk *clk); | ||
561 | void __clk_reparent(struct clk *clk, struct clk *new_parent); | ||
562 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate); | 602 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate); |
563 | 603 | ||
564 | struct of_device_id; | 604 | struct of_device_id; |