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-rw-r--r--include/linux/bcma/bcma_driver_chipcommon.h4
-rw-r--r--include/linux/bcma/bcma_driver_mips.h11
-rw-r--r--include/linux/bcma/bcma_driver_pci.h2
3 files changed, 13 insertions, 4 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a5bfda6b0a76..8390c474f69a 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -27,7 +27,7 @@
27#define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */ 27#define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */
28#define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */ 28#define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */
29#define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */ 29#define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */
30#define BCMA_CC_FLASHT_NFLASH 0x00000200 /* NAND flash */ 30#define BCMA_CC_FLASHT_NAND 0x00000300 /* NAND flash */
31#define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */ 31#define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */
32#define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */ 32#define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */
33#define BCMA_PLLTYPE_NONE 0x00000000 33#define BCMA_PLLTYPE_NONE 0x00000000
@@ -635,4 +635,6 @@ extern void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc,
635 u32 offset, u32 mask, u32 set); 635 u32 offset, u32 mask, u32 set);
636extern void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid); 636extern void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid);
637 637
638extern u32 bcma_pmu_get_bus_clock(struct bcma_drv_cc *cc);
639
638#endif /* LINUX_BCMA_DRIVER_CC_H_ */ 640#endif /* LINUX_BCMA_DRIVER_CC_H_ */
diff --git a/include/linux/bcma/bcma_driver_mips.h b/include/linux/bcma/bcma_driver_mips.h
index 0baf8a56b794..fb61f3fb4ddb 100644
--- a/include/linux/bcma/bcma_driver_mips.h
+++ b/include/linux/bcma/bcma_driver_mips.h
@@ -28,6 +28,7 @@
28#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048 28#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
29#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0 29#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
30 30
31#define BCMA_MIPS_OOBSELINA74 0x004
31#define BCMA_MIPS_OOBSELOUTA30 0x100 32#define BCMA_MIPS_OOBSELOUTA30 0x100
32 33
33struct bcma_device; 34struct bcma_device;
@@ -36,19 +37,23 @@ struct bcma_drv_mips {
36 struct bcma_device *core; 37 struct bcma_device *core;
37 u8 setup_done:1; 38 u8 setup_done:1;
38 u8 early_setup_done:1; 39 u8 early_setup_done:1;
39 unsigned int assigned_irqs;
40}; 40};
41 41
42#ifdef CONFIG_BCMA_DRIVER_MIPS 42#ifdef CONFIG_BCMA_DRIVER_MIPS
43extern void bcma_core_mips_init(struct bcma_drv_mips *mcore); 43extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
44extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore); 44extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore);
45
46extern unsigned int bcma_core_irq(struct bcma_device *core);
45#else 47#else
46static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { } 48static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
47static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { } 49static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { }
50
51static inline unsigned int bcma_core_irq(struct bcma_device *core)
52{
53 return 0;
54}
48#endif 55#endif
49 56
50extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore); 57extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore);
51 58
52extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
53
54#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */ 59#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
diff --git a/include/linux/bcma/bcma_driver_pci.h b/include/linux/bcma/bcma_driver_pci.h
index c48d98d27b77..424760f01b9d 100644
--- a/include/linux/bcma/bcma_driver_pci.h
+++ b/include/linux/bcma/bcma_driver_pci.h
@@ -179,6 +179,8 @@ struct pci_dev;
179#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */ 179#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */
180#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */ 180#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */
181 181
182#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
183
182/* PCIE Root Capability Register bits (Host mode only) */ 184/* PCIE Root Capability Register bits (Host mode only) */
183#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 185#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
184 186