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-rw-r--r--include/linux/bcma/bcma_driver_pci.h38
-rw-r--r--include/linux/bcma/bcma_regs.h27
2 files changed, 65 insertions, 0 deletions
diff --git a/include/linux/bcma/bcma_driver_pci.h b/include/linux/bcma/bcma_driver_pci.h
index 679d4cab4547..46c71e27d31f 100644
--- a/include/linux/bcma/bcma_driver_pci.h
+++ b/include/linux/bcma/bcma_driver_pci.h
@@ -160,9 +160,44 @@ struct pci_dev;
160/* PCIcore specific boardflags */ 160/* PCIcore specific boardflags */
161#define BCMA_CORE_PCI_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */ 161#define BCMA_CORE_PCI_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
162 162
163/* PCIE Config space accessing MACROS */
164#define BCMA_CORE_PCI_CFG_BUS_SHIFT 24 /* Bus shift */
165#define BCMA_CORE_PCI_CFG_SLOT_SHIFT 19 /* Slot/Device shift */
166#define BCMA_CORE_PCI_CFG_FUN_SHIFT 16 /* Function shift */
167#define BCMA_CORE_PCI_CFG_OFF_SHIFT 0 /* Register shift */
168
169#define BCMA_CORE_PCI_CFG_BUS_MASK 0xff /* Bus mask */
170#define BCMA_CORE_PCI_CFG_SLOT_MASK 0x1f /* Slot/Device mask */
171#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */
172#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */
173
174/* PCIE Root Capability Register bits (Host mode only) */
175#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
176
177struct bcma_drv_pci;
178
179#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
180struct bcma_drv_pci_host {
181 struct bcma_drv_pci *pdev;
182
183 u32 host_cfg_addr;
184 spinlock_t cfgspace_lock;
185
186 struct pci_controller pci_controller;
187 struct pci_ops pci_ops;
188 struct resource mem_resource;
189 struct resource io_resource;
190};
191#endif
192
163struct bcma_drv_pci { 193struct bcma_drv_pci {
164 struct bcma_device *core; 194 struct bcma_device *core;
165 u8 setup_done:1; 195 u8 setup_done:1;
196 u8 hostmode:1;
197
198#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
199 struct bcma_drv_pci_host *host_controller;
200#endif
166}; 201};
167 202
168/* Register access */ 203/* Register access */
@@ -173,4 +208,7 @@ extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
173extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, 208extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
174 struct bcma_device *core, bool enable); 209 struct bcma_device *core, bool enable);
175 210
211extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
212extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
213
176#endif /* LINUX_BCMA_DRIVER_PCI_H_ */ 214#endif /* LINUX_BCMA_DRIVER_PCI_H_ */
diff --git a/include/linux/bcma/bcma_regs.h b/include/linux/bcma/bcma_regs.h
index 9faae2ae02e8..5a71d5719640 100644
--- a/include/linux/bcma/bcma_regs.h
+++ b/include/linux/bcma/bcma_regs.h
@@ -56,4 +56,31 @@
56#define BCMA_PCI_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */ 56#define BCMA_PCI_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
57#define BCMA_PCI_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */ 57#define BCMA_PCI_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
58 58
59/* SiliconBackplane Address Map.
60 * All regions may not exist on all chips.
61 */
62#define BCMA_SOC_SDRAM_BASE 0x00000000U /* Physical SDRAM */
63#define BCMA_SOC_PCI_MEM 0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
64#define BCMA_SOC_PCI_MEM_SZ (64 * 1024 * 1024)
65#define BCMA_SOC_PCI_CFG 0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
66#define BCMA_SOC_SDRAM_SWAPPED 0x10000000U /* Byteswapped Physical SDRAM */
67#define BCMA_SOC_SDRAM_R2 0x80000000U /* Region 2 for sdram (512 MB) */
68
69
70#define BCMA_SOC_PCI_DMA 0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
71#define BCMA_SOC_PCI_DMA2 0x80000000U /* Client Mode sb2pcitranslation2 (1 GB) */
72#define BCMA_SOC_PCI_DMA_SZ 0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
73#define BCMA_SOC_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2
74 * (2 ZettaBytes), low 32 bits
75 */
76#define BCMA_SOC_PCIE_DMA_H32 0x80000000U /* PCIE Client Mode sb2pcitranslation2
77 * (2 ZettaBytes), high 32 bits
78 */
79
80#define BCMA_SOC_PCI1_MEM 0x40000000U /* Host Mode sb2pcitranslation0 (64 MB) */
81#define BCMA_SOC_PCI1_CFG 0x44000000U /* Host Mode sb2pcitranslation1 (64 MB) */
82#define BCMA_SOC_PCIE1_DMA_H32 0xc0000000U /* PCIE Client Mode sb2pcitranslation2
83 * (2 ZettaBytes), high 32 bits
84 */
85
59#endif /* LINUX_BCMA_REGS_H_ */ 86#endif /* LINUX_BCMA_REGS_H_ */