aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/bcma/bcma_regs.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux/bcma/bcma_regs.h')
-rw-r--r--include/linux/bcma/bcma_regs.h27
1 files changed, 26 insertions, 1 deletions
diff --git a/include/linux/bcma/bcma_regs.h b/include/linux/bcma/bcma_regs.h
index f82d88a960ce..9faae2ae02e8 100644
--- a/include/linux/bcma/bcma_regs.h
+++ b/include/linux/bcma/bcma_regs.h
@@ -1,13 +1,38 @@
1#ifndef LINUX_BCMA_REGS_H_ 1#ifndef LINUX_BCMA_REGS_H_
2#define LINUX_BCMA_REGS_H_ 2#define LINUX_BCMA_REGS_H_
3 3
4/* Some single registers are shared between many cores */
5/* BCMA_CLKCTLST: ChipCommon (rev >= 20), PCIe, 80211 */
6#define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
7#define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
8#define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
9#define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
10#define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
11#define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
12#define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
13#define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
14#define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
15#define BCMA_CLKCTLST_HAVEHT 0x00020000 /* HT available */
16#define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */
17#define BCMA_CLKCTLST_BP_ON_HT 0x00080000 /* RO: running on HT clock */
18#define BCMA_CLKCTLST_EXTRESST 0x07000000 /* Mask of external resource status */
19/* Is there any BCM4328 on BCMA bus? */
20#define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
21#define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
22
4/* Agent registers (common for every core) */ 23/* Agent registers (common for every core) */
5#define BCMA_IOCTL 0x0408 24#define BCMA_IOCTL 0x0408 /* IO control */
6#define BCMA_IOCTL_CLK 0x0001 25#define BCMA_IOCTL_CLK 0x0001
7#define BCMA_IOCTL_FGC 0x0002 26#define BCMA_IOCTL_FGC 0x0002
8#define BCMA_IOCTL_CORE_BITS 0x3FFC 27#define BCMA_IOCTL_CORE_BITS 0x3FFC
9#define BCMA_IOCTL_PME_EN 0x4000 28#define BCMA_IOCTL_PME_EN 0x4000
10#define BCMA_IOCTL_BIST_EN 0x8000 29#define BCMA_IOCTL_BIST_EN 0x8000
30#define BCMA_IOST 0x0500 /* IO status */
31#define BCMA_IOST_CORE_BITS 0x0FFF
32#define BCMA_IOST_DMA64 0x1000
33#define BCMA_IOST_GATED_CLK 0x2000
34#define BCMA_IOST_BIST_ERROR 0x4000
35#define BCMA_IOST_BIST_DONE 0x8000
11#define BCMA_RESET_CTL 0x0800 36#define BCMA_RESET_CTL 0x0800
12#define BCMA_RESET_CTL_RESET 0x0001 37#define BCMA_RESET_CTL_RESET 0x0001
13 38