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-rw-r--r--include/linux/amba/bus.h11
-rw-r--r--include/linux/amba/clcd.h1
-rw-r--r--include/linux/amba/mmci.h27
-rw-r--r--include/linux/amba/pl022.h32
-rw-r--r--include/linux/amba/pl330.h45
-rw-r--r--include/linux/amba/serial.h3
6 files changed, 116 insertions, 3 deletions
diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h
index 8b1038607831..b0c174012436 100644
--- a/include/linux/amba/bus.h
+++ b/include/linux/amba/bus.h
@@ -14,14 +14,19 @@
14#ifndef ASMARM_AMBA_H 14#ifndef ASMARM_AMBA_H
15#define ASMARM_AMBA_H 15#define ASMARM_AMBA_H
16 16
17#include <linux/clk.h>
17#include <linux/device.h> 18#include <linux/device.h>
19#include <linux/err.h>
18#include <linux/resource.h> 20#include <linux/resource.h>
19 21
20#define AMBA_NR_IRQS 2 22#define AMBA_NR_IRQS 2
21 23
24struct clk;
25
22struct amba_device { 26struct amba_device {
23 struct device dev; 27 struct device dev;
24 struct resource res; 28 struct resource res;
29 struct clk *pclk;
25 u64 dma_mask; 30 u64 dma_mask;
26 unsigned int periphid; 31 unsigned int periphid;
27 unsigned int irq[AMBA_NR_IRQS]; 32 unsigned int irq[AMBA_NR_IRQS];
@@ -59,6 +64,12 @@ struct amba_device *amba_find_device(const char *, struct device *, unsigned int
59int amba_request_regions(struct amba_device *, const char *); 64int amba_request_regions(struct amba_device *, const char *);
60void amba_release_regions(struct amba_device *); 65void amba_release_regions(struct amba_device *);
61 66
67#define amba_pclk_enable(d) \
68 (IS_ERR((d)->pclk) ? 0 : clk_enable((d)->pclk))
69
70#define amba_pclk_disable(d) \
71 do { if (!IS_ERR((d)->pclk)) clk_disable((d)->pclk); } while (0)
72
62#define amba_config(d) (((d)->periphid >> 24) & 0xff) 73#define amba_config(d) (((d)->periphid >> 24) & 0xff)
63#define amba_rev(d) (((d)->periphid >> 20) & 0x0f) 74#define amba_rev(d) (((d)->periphid >> 20) & 0x0f)
64#define amba_manf(d) (((d)->periphid >> 12) & 0xff) 75#define amba_manf(d) (((d)->periphid >> 12) & 0xff)
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h
index ca16c3801a1e..be33b3affc8a 100644
--- a/include/linux/amba/clcd.h
+++ b/include/linux/amba/clcd.h
@@ -150,6 +150,7 @@ struct clcd_fb {
150 u16 off_cntl; 150 u16 off_cntl;
151 u32 clcd_cntl; 151 u32 clcd_cntl;
152 u32 cmap[16]; 152 u32 cmap[16];
153 bool clk_enabled;
153}; 154};
154 155
155static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs) 156static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 6b4241748dda..ca84ce70d5d5 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -6,9 +6,32 @@
6 6
7#include <linux/mmc/host.h> 7#include <linux/mmc/host.h>
8 8
9/**
10 * struct mmci_platform_data - platform configuration for the MMCI
11 * (also known as PL180) block.
12 * @f_max: the maximum operational frequency for this host in this
13 * platform configuration. When this is specified it takes precedence
14 * over the module parameter for the same frequency.
15 * @ocr_mask: available voltages on the 4 pins from the block, this
16 * is ignored if a regulator is used, see the MMC_VDD_* masks in
17 * mmc/host.h
18 * @vdd_handler: a callback function to translate a MMC_VDD_*
19 * mask into a value to be binary (or set some other custom bits
20 * in MMCIPWR) or:ed and written into the MMCIPWR register of the
21 * block. May also control external power based on the power_mode.
22 * @status: if no GPIO read function was given to the block in
23 * gpio_wp (below) this function will be called to determine
24 * whether a card is present in the MMC slot or not
25 * @gpio_wp: read this GPIO pin to see if the card is write protected
26 * @gpio_cd: read this GPIO pin to detect card insertion
27 * @capabilities: the capabilities of the block as implemented in
28 * this platform, signify anything MMC_CAP_* from mmc/host.h
29 */
9struct mmci_platform_data { 30struct mmci_platform_data {
10 unsigned int ocr_mask; /* available voltages */ 31 unsigned int f_max;
11 u32 (*translate_vdd)(struct device *, unsigned int); 32 unsigned int ocr_mask;
33 u32 (*vdd_handler)(struct device *, unsigned int vdd,
34 unsigned char power_mode);
12 unsigned int (*status)(struct device *); 35 unsigned int (*status)(struct device *);
13 int gpio_wp; 36 int gpio_wp;
14 int gpio_cd; 37 int gpio_cd;
diff --git a/include/linux/amba/pl022.h b/include/linux/amba/pl022.h
index e4836c6b3dd7..abf26cc47a2b 100644
--- a/include/linux/amba/pl022.h
+++ b/include/linux/amba/pl022.h
@@ -71,6 +71,7 @@ struct ssp_clock_params {
71 71
72/** 72/**
73 * enum ssp_rx_endian - endianess of Rx FIFO Data 73 * enum ssp_rx_endian - endianess of Rx FIFO Data
74 * this feature is only available in ST versionf of PL022
74 */ 75 */
75enum ssp_rx_endian { 76enum ssp_rx_endian {
76 SSP_RX_MSB, 77 SSP_RX_MSB,
@@ -181,7 +182,8 @@ enum ssp_microwire_wait_state {
181}; 182};
182 183
183/** 184/**
184 * enum Microwire - whether Full/Half Duplex 185 * enum ssp_duplex - whether Full/Half Duplex on microwire, only
186 * available in the ST Micro variant.
185 * @SSP_MICROWIRE_CHANNEL_FULL_DUPLEX: SSPTXD becomes bi-directional, 187 * @SSP_MICROWIRE_CHANNEL_FULL_DUPLEX: SSPTXD becomes bi-directional,
186 * SSPRXD not used 188 * SSPRXD not used
187 * @SSP_MICROWIRE_CHANNEL_HALF_DUPLEX: SSPTXD is an output, SSPRXD is 189 * @SSP_MICROWIRE_CHANNEL_HALF_DUPLEX: SSPTXD is an output, SSPRXD is
@@ -193,6 +195,31 @@ enum ssp_duplex {
193}; 195};
194 196
195/** 197/**
198 * enum ssp_clkdelay - an optional clock delay on the feedback clock
199 * only available in the ST Micro PL023 variant.
200 * @SSP_FEEDBACK_CLK_DELAY_NONE: no delay, the data coming in from the
201 * slave is sampled directly
202 * @SSP_FEEDBACK_CLK_DELAY_1T: the incoming slave data is sampled with
203 * a delay of T-dt
204 * @SSP_FEEDBACK_CLK_DELAY_2T: dito with a delay if 2T-dt
205 * @SSP_FEEDBACK_CLK_DELAY_3T: dito with a delay if 3T-dt
206 * @SSP_FEEDBACK_CLK_DELAY_4T: dito with a delay if 4T-dt
207 * @SSP_FEEDBACK_CLK_DELAY_5T: dito with a delay if 5T-dt
208 * @SSP_FEEDBACK_CLK_DELAY_6T: dito with a delay if 6T-dt
209 * @SSP_FEEDBACK_CLK_DELAY_7T: dito with a delay if 7T-dt
210 */
211enum ssp_clkdelay {
212 SSP_FEEDBACK_CLK_DELAY_NONE,
213 SSP_FEEDBACK_CLK_DELAY_1T,
214 SSP_FEEDBACK_CLK_DELAY_2T,
215 SSP_FEEDBACK_CLK_DELAY_3T,
216 SSP_FEEDBACK_CLK_DELAY_4T,
217 SSP_FEEDBACK_CLK_DELAY_5T,
218 SSP_FEEDBACK_CLK_DELAY_6T,
219 SSP_FEEDBACK_CLK_DELAY_7T
220};
221
222/**
196 * CHIP select/deselect commands 223 * CHIP select/deselect commands
197 */ 224 */
198enum ssp_chip_select { 225enum ssp_chip_select {
@@ -235,6 +262,8 @@ struct pl022_ssp_controller {
235 * @ctrl_len: Microwire interface: Control length 262 * @ctrl_len: Microwire interface: Control length
236 * @wait_state: Microwire interface: Wait state 263 * @wait_state: Microwire interface: Wait state
237 * @duplex: Microwire interface: Full/Half duplex 264 * @duplex: Microwire interface: Full/Half duplex
265 * @clkdelay: on the PL023 variant, the delay in feeback clock cycles
266 * before sampling the incoming line
238 * @cs_control: function pointer to board-specific function to 267 * @cs_control: function pointer to board-specific function to
239 * assert/deassert I/O port to control HW generation of devices chip-select. 268 * assert/deassert I/O port to control HW generation of devices chip-select.
240 * @dma_xfer_type: Type of DMA xfer (Mem-to-periph or Periph-to-Periph) 269 * @dma_xfer_type: Type of DMA xfer (Mem-to-periph or Periph-to-Periph)
@@ -258,6 +287,7 @@ struct pl022_config_chip {
258 enum ssp_microwire_ctrl_len ctrl_len; 287 enum ssp_microwire_ctrl_len ctrl_len;
259 enum ssp_microwire_wait_state wait_state; 288 enum ssp_microwire_wait_state wait_state;
260 enum ssp_duplex duplex; 289 enum ssp_duplex duplex;
290 enum ssp_clkdelay clkdelay;
261 void (*cs_control) (u32 control); 291 void (*cs_control) (u32 control);
262}; 292};
263 293
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
new file mode 100644
index 000000000000..cbee7de7dd36
--- /dev/null
+++ b/include/linux/amba/pl330.h
@@ -0,0 +1,45 @@
1/* linux/include/linux/amba/pl330.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __AMBA_PL330_H_
13#define __AMBA_PL330_H_
14
15#include <asm/hardware/pl330.h>
16
17struct dma_pl330_peri {
18 /*
19 * Peri_Req i/f of the DMAC that is
20 * peripheral could be reached from.
21 */
22 u8 peri_id; /* {0, 31} */
23 enum pl330_reqtype rqtype;
24
25 /* For M->D and D->M Channels */
26 int burst_sz; /* in power of 2 */
27 dma_addr_t fifo_addr;
28};
29
30struct dma_pl330_platdata {
31 /*
32 * Number of valid peripherals connected to DMAC.
33 * This may be different from the value read from
34 * CR0, as the PL330 implementation might have 'holes'
35 * in the peri list or the peri could also be reached
36 * from another DMAC which the platform prefers.
37 */
38 u8 nr_valid_peri;
39 /* Array of valid peripherals */
40 struct dma_pl330_peri *peri;
41 /* Bytes to allocate for MC buffer */
42 unsigned mcbuf_sz;
43};
44
45#endif /* __AMBA_PL330_H_ */
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index 5a5a7fd62490..e1b634b635f2 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -38,10 +38,12 @@
38#define UART01x_FR 0x18 /* Flag register (Read only). */ 38#define UART01x_FR 0x18 /* Flag register (Read only). */
39#define UART010_IIR 0x1C /* Interrupt indentification register (Read). */ 39#define UART010_IIR 0x1C /* Interrupt indentification register (Read). */
40#define UART010_ICR 0x1C /* Interrupt clear register (Write). */ 40#define UART010_ICR 0x1C /* Interrupt clear register (Write). */
41#define ST_UART011_LCRH_RX 0x1C /* Rx line control register. */
41#define UART01x_ILPR 0x20 /* IrDA low power counter register. */ 42#define UART01x_ILPR 0x20 /* IrDA low power counter register. */
42#define UART011_IBRD 0x24 /* Integer baud rate divisor register. */ 43#define UART011_IBRD 0x24 /* Integer baud rate divisor register. */
43#define UART011_FBRD 0x28 /* Fractional baud rate divisor register. */ 44#define UART011_FBRD 0x28 /* Fractional baud rate divisor register. */
44#define UART011_LCRH 0x2c /* Line control register. */ 45#define UART011_LCRH 0x2c /* Line control register. */
46#define ST_UART011_LCRH_TX 0x2c /* Tx Line control register. */
45#define UART011_CR 0x30 /* Control register. */ 47#define UART011_CR 0x30 /* Control register. */
46#define UART011_IFLS 0x34 /* Interrupt fifo level select. */ 48#define UART011_IFLS 0x34 /* Interrupt fifo level select. */
47#define UART011_IMSC 0x38 /* Interrupt mask. */ 49#define UART011_IMSC 0x38 /* Interrupt mask. */
@@ -84,6 +86,7 @@
84#define UART010_CR_TIE 0x0020 86#define UART010_CR_TIE 0x0020
85#define UART010_CR_RIE 0x0010 87#define UART010_CR_RIE 0x0010
86#define UART010_CR_MSIE 0x0008 88#define UART010_CR_MSIE 0x0008
89#define ST_UART011_CR_OVSFACT 0x0008 /* Oversampling factor */
87#define UART01x_CR_IIRLP 0x0004 /* SIR low power mode */ 90#define UART01x_CR_IIRLP 0x0004 /* SIR low power mode */
88#define UART01x_CR_SIREN 0x0002 /* SIR enable */ 91#define UART01x_CR_SIREN 0x0002 /* SIR enable */
89#define UART01x_CR_UARTEN 0x0001 /* UART enable */ 92#define UART01x_CR_UARTEN 0x0001 /* UART enable */