1 files changed, 36 insertions, 0 deletions

diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index e1b634b635f2..514ed45c462e 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -32,7 +32,9 @@
 #define UART01x_RSR             0x04    /* Receive status register (Read). */
 #define UART01x_ECR             0x04    /* Error clear register (Write). */
 #define UART010_LCRH            0x08    /* Line control register, high byte. */
+#define ST_UART011_DMAWM        0x08    /* DMA watermark configure register. */
 #define UART010_LCRM            0x0C    /* Line control register, middle byte. */
+#define ST_UART011_TIMEOUT      0x0C    /* Timeout period register. */
 #define UART010_LCRL            0x10    /* Line control register, low byte. */
 #define UART010_CR              0x14    /* Control register. */
 #define UART01x_FR              0x18    /* Flag register (Read only). */
@@ -51,6 +53,15 @@
 #define UART011_MIS             0x40    /* Masked interrupt status. */
 #define UART011_ICR             0x44    /* Interrupt clear register. */
 #define UART011_DMACR           0x48    /* DMA control register. */
+#define ST_UART011_XFCR         0x50    /* XON/XOFF control register. */
+#define ST_UART011_XON1         0x54    /* XON1 register. */
+#define ST_UART011_XON2         0x58    /* XON2 register. */
+#define ST_UART011_XOFF1        0x5C    /* XON1 register. */
+#define ST_UART011_XOFF2        0x60    /* XON2 register. */
+#define ST_UART011_ITCR         0x80    /* Integration test control register. */
+#define ST_UART011_ITIP         0x84    /* Integration test input register. */
+#define ST_UART011_ABCR         0x100   /* Autobaud control register. */
+#define ST_UART011_ABIMSC       0x15C   /* Autobaud interrupt mask/clear register. */
 
 #define UART011_DR_OE           (1 << 11)
 #define UART011_DR_BE           (1 << 10)
@@ -102,6 +113,21 @@
 #define UART01x_LCRH_PEN        0x02
 #define UART01x_LCRH_BRK        0x01
 
+#define ST_UART011_DMAWM_RX_1   (0 << 3)
+#define ST_UART011_DMAWM_RX_2   (1 << 3)
+#define ST_UART011_DMAWM_RX_4   (2 << 3)
+#define ST_UART011_DMAWM_RX_8   (3 << 3)
+#define ST_UART011_DMAWM_RX_16  (4 << 3)
+#define ST_UART011_DMAWM_RX_32  (5 << 3)
+#define ST_UART011_DMAWM_RX_48  (6 << 3)
+#define ST_UART011_DMAWM_TX_1   0
+#define ST_UART011_DMAWM_TX_2   1
+#define ST_UART011_DMAWM_TX_4   2
+#define ST_UART011_DMAWM_TX_8   3
+#define ST_UART011_DMAWM_TX_16  4
+#define ST_UART011_DMAWM_TX_32  5
+#define ST_UART011_DMAWM_TX_48  6
+
 #define UART010_IIR_RTIS        0x08
 #define UART010_IIR_TIS         0x04
 #define UART010_IIR_RIS         0x02
@@ -169,6 +195,16 @@ struct amba_device; /* in uncompress this is included but amba/bus.h is not */
 struct amba_pl010_data {
         void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
 };
+
+struct dma_chan;
+struct amba_pl011_data {
+        bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
+        void *dma_rx_param;
+        void *dma_tx_param;
+        void (*init) (void);
+        void (*exit) (void);
+        void (*reset) (void);
+};
 #endif
 
 #endif