diff options
Diffstat (limited to 'include/dt-bindings/clock/marvell,pxa910.h')
-rw-r--r-- | include/dt-bindings/clock/marvell,pxa910.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/marvell,pxa910.h b/include/dt-bindings/clock/marvell,pxa910.h new file mode 100644 index 000000000000..719cffb2bea2 --- /dev/null +++ b/include/dt-bindings/clock/marvell,pxa910.h | |||
@@ -0,0 +1,54 @@ | |||
1 | #ifndef __DTS_MARVELL_PXA910_CLOCK_H | ||
2 | #define __DTS_MARVELL_PXA910_CLOCK_H | ||
3 | |||
4 | /* fixed clocks and plls */ | ||
5 | #define PXA910_CLK_CLK32 1 | ||
6 | #define PXA910_CLK_VCTCXO 2 | ||
7 | #define PXA910_CLK_PLL1 3 | ||
8 | #define PXA910_CLK_PLL1_2 8 | ||
9 | #define PXA910_CLK_PLL1_4 9 | ||
10 | #define PXA910_CLK_PLL1_8 10 | ||
11 | #define PXA910_CLK_PLL1_16 11 | ||
12 | #define PXA910_CLK_PLL1_6 12 | ||
13 | #define PXA910_CLK_PLL1_12 13 | ||
14 | #define PXA910_CLK_PLL1_24 14 | ||
15 | #define PXA910_CLK_PLL1_48 15 | ||
16 | #define PXA910_CLK_PLL1_96 16 | ||
17 | #define PXA910_CLK_PLL1_13 17 | ||
18 | #define PXA910_CLK_PLL1_13_1_5 18 | ||
19 | #define PXA910_CLK_PLL1_2_1_5 19 | ||
20 | #define PXA910_CLK_PLL1_3_16 20 | ||
21 | #define PXA910_CLK_UART_PLL 27 | ||
22 | |||
23 | /* apb periphrals */ | ||
24 | #define PXA910_CLK_TWSI0 60 | ||
25 | #define PXA910_CLK_TWSI1 61 | ||
26 | #define PXA910_CLK_TWSI2 62 | ||
27 | #define PXA910_CLK_TWSI3 63 | ||
28 | #define PXA910_CLK_GPIO 64 | ||
29 | #define PXA910_CLK_KPC 65 | ||
30 | #define PXA910_CLK_RTC 66 | ||
31 | #define PXA910_CLK_PWM0 67 | ||
32 | #define PXA910_CLK_PWM1 68 | ||
33 | #define PXA910_CLK_PWM2 69 | ||
34 | #define PXA910_CLK_PWM3 70 | ||
35 | #define PXA910_CLK_UART0 71 | ||
36 | #define PXA910_CLK_UART1 72 | ||
37 | #define PXA910_CLK_UART2 73 | ||
38 | #define PXA910_CLK_SSP0 74 | ||
39 | #define PXA910_CLK_SSP1 75 | ||
40 | |||
41 | /* axi periphrals */ | ||
42 | #define PXA910_CLK_DFC 100 | ||
43 | #define PXA910_CLK_SDH0 101 | ||
44 | #define PXA910_CLK_SDH1 102 | ||
45 | #define PXA910_CLK_SDH2 103 | ||
46 | #define PXA910_CLK_USB 104 | ||
47 | #define PXA910_CLK_SPH 105 | ||
48 | #define PXA910_CLK_DISP0 106 | ||
49 | #define PXA910_CLK_CCIC0 107 | ||
50 | #define PXA910_CLK_CCIC0_PHY 108 | ||
51 | #define PXA910_CLK_CCIC0_SPHY 109 | ||
52 | |||
53 | #define PXA910_NR_CLKS 200 | ||
54 | #endif | ||