aboutsummaryrefslogtreecommitdiffstats
path: root/include/drm
diff options
context:
space:
mode:
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drmP.h2
-rw-r--r--include/drm/drm_mode.h3
-rw-r--r--include/drm/i915_drm.h54
-rw-r--r--include/drm/nouveau_drm.h1
-rw-r--r--include/drm/ttm/ttm_bo_driver.h5
-rw-r--r--include/drm/vmwgfx_drm.h20
6 files changed, 80 insertions, 5 deletions
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 71dafb69cfeb..ffac157fb5b2 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1408,7 +1408,7 @@ extern int drm_ati_pcigart_cleanup(struct drm_device *dev,
1408 struct drm_ati_pcigart_info * gart_info); 1408 struct drm_ati_pcigart_info * gart_info);
1409 1409
1410extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size, 1410extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
1411 size_t align, dma_addr_t maxaddr); 1411 size_t align);
1412extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); 1412extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
1413extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); 1413extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
1414 1414
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 43009bc2e757..c5ba1636613c 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -85,7 +85,7 @@ struct drm_mode_modeinfo {
85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
87 87
88 __u32 vrefresh; /* vertical refresh * 1000 */ 88 __u32 vrefresh;
89 89
90 __u32 flags; 90 __u32 flags;
91 __u32 type; 91 __u32 type;
@@ -160,6 +160,7 @@ struct drm_mode_get_encoder {
160#define DRM_MODE_CONNECTOR_HDMIA 11 160#define DRM_MODE_CONNECTOR_HDMIA 11
161#define DRM_MODE_CONNECTOR_HDMIB 12 161#define DRM_MODE_CONNECTOR_HDMIB 12
162#define DRM_MODE_CONNECTOR_TV 13 162#define DRM_MODE_CONNECTOR_TV 13
163#define DRM_MODE_CONNECTOR_eDP 14
163 164
164struct drm_mode_get_connector { 165struct drm_mode_get_connector {
165 166
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index ec3f5e80a5df..b64a8d7cdf6d 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -188,6 +188,7 @@ typedef struct _drm_i915_sarea {
188#define DRM_I915_GEM_MADVISE 0x26 188#define DRM_I915_GEM_MADVISE 0x26
189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
190#define DRM_I915_OVERLAY_ATTRS 0x28 190#define DRM_I915_OVERLAY_ATTRS 0x28
191#define DRM_I915_GEM_EXECBUFFER2 0x29
191 192
192#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 193#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
193#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 194#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -207,6 +208,7 @@ typedef struct _drm_i915_sarea {
207#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) 208#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
208#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) 209#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init)
209#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) 210#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
211#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
210#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) 212#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
211#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) 213#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
212#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) 214#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
@@ -272,6 +274,7 @@ typedef struct drm_i915_irq_wait {
272#define I915_PARAM_NUM_FENCES_AVAIL 6 274#define I915_PARAM_NUM_FENCES_AVAIL 6
273#define I915_PARAM_HAS_OVERLAY 7 275#define I915_PARAM_HAS_OVERLAY 7
274#define I915_PARAM_HAS_PAGEFLIPPING 8 276#define I915_PARAM_HAS_PAGEFLIPPING 8
277#define I915_PARAM_HAS_EXECBUF2 9
275 278
276typedef struct drm_i915_getparam { 279typedef struct drm_i915_getparam {
277 int param; 280 int param;
@@ -567,6 +570,57 @@ struct drm_i915_gem_execbuffer {
567 __u64 cliprects_ptr; 570 __u64 cliprects_ptr;
568}; 571};
569 572
573struct drm_i915_gem_exec_object2 {
574 /**
575 * User's handle for a buffer to be bound into the GTT for this
576 * operation.
577 */
578 __u32 handle;
579
580 /** Number of relocations to be performed on this buffer */
581 __u32 relocation_count;
582 /**
583 * Pointer to array of struct drm_i915_gem_relocation_entry containing
584 * the relocations to be performed in this buffer.
585 */
586 __u64 relocs_ptr;
587
588 /** Required alignment in graphics aperture */
589 __u64 alignment;
590
591 /**
592 * Returned value of the updated offset of the object, for future
593 * presumed_offset writes.
594 */
595 __u64 offset;
596
597#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
598 __u64 flags;
599 __u64 rsvd1;
600 __u64 rsvd2;
601};
602
603struct drm_i915_gem_execbuffer2 {
604 /**
605 * List of gem_exec_object2 structs
606 */
607 __u64 buffers_ptr;
608 __u32 buffer_count;
609
610 /** Offset in the batchbuffer to start execution from. */
611 __u32 batch_start_offset;
612 /** Bytes used in batchbuffer from batch_start_offset */
613 __u32 batch_len;
614 __u32 DR1;
615 __u32 DR4;
616 __u32 num_cliprects;
617 /** This is a struct drm_clip_rect *cliprects */
618 __u64 cliprects_ptr;
619 __u64 flags; /* currently unused */
620 __u64 rsvd1;
621 __u64 rsvd2;
622};
623
570struct drm_i915_gem_pin { 624struct drm_i915_gem_pin {
571 /** Handle of the buffer to be pinned. */ 625 /** Handle of the buffer to be pinned. */
572 __u32 handle; 626 __u32 handle;
diff --git a/include/drm/nouveau_drm.h b/include/drm/nouveau_drm.h
index 1e67c441ea82..f745948b61e4 100644
--- a/include/drm/nouveau_drm.h
+++ b/include/drm/nouveau_drm.h
@@ -77,6 +77,7 @@ struct drm_nouveau_gpuobj_free {
77#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10 77#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
78#define NOUVEAU_GETPARAM_CHIPSET_ID 11 78#define NOUVEAU_GETPARAM_CHIPSET_ID 11
79#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12 79#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
80#define NOUVEAU_GETPARAM_GRAPH_UNITS 13
80struct drm_nouveau_getparam { 81struct drm_nouveau_getparam {
81 uint64_t param; 82 uint64_t param;
82 uint64_t value; 83 uint64_t value;
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index ff7664e0c3cd..4c4e0f8375b3 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -353,6 +353,11 @@ struct ttm_bo_driver {
353 /* notify the driver we are taking a fault on this BO 353 /* notify the driver we are taking a fault on this BO
354 * and have reserved it */ 354 * and have reserved it */
355 void (*fault_reserve_notify)(struct ttm_buffer_object *bo); 355 void (*fault_reserve_notify)(struct ttm_buffer_object *bo);
356
357 /**
358 * notify the driver that we're about to swap out this bo
359 */
360 void (*swap_notify) (struct ttm_buffer_object *bo);
356}; 361};
357 362
358/** 363/**
diff --git a/include/drm/vmwgfx_drm.h b/include/drm/vmwgfx_drm.h
index 2be7e1249b6f..c7645f480d12 100644
--- a/include/drm/vmwgfx_drm.h
+++ b/include/drm/vmwgfx_drm.h
@@ -68,7 +68,8 @@
68#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 68#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
69#define DRM_VMW_PARAM_3D 2 69#define DRM_VMW_PARAM_3D 2
70#define DRM_VMW_PARAM_FIFO_OFFSET 3 70#define DRM_VMW_PARAM_FIFO_OFFSET 3
71 71#define DRM_VMW_PARAM_HW_CAPS 4
72#define DRM_VMW_PARAM_FIFO_CAPS 5
72 73
73/** 74/**
74 * struct drm_vmw_getparam_arg 75 * struct drm_vmw_getparam_arg
@@ -181,6 +182,8 @@ struct drm_vmw_context_arg {
181 * The size of the array should equal the total number of mipmap levels. 182 * The size of the array should equal the total number of mipmap levels.
182 * @shareable: Boolean whether other clients (as identified by file descriptors) 183 * @shareable: Boolean whether other clients (as identified by file descriptors)
183 * may reference this surface. 184 * may reference this surface.
185 * @scanout: Boolean whether the surface is intended to be used as a
186 * scanout.
184 * 187 *
185 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 188 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
186 * Output data from the DRM_VMW_REF_SURFACE Ioctl. 189 * Output data from the DRM_VMW_REF_SURFACE Ioctl.
@@ -192,7 +195,7 @@ struct drm_vmw_surface_create_req {
192 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 195 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
193 uint64_t size_addr; 196 uint64_t size_addr;
194 int32_t shareable; 197 int32_t shareable;
195 uint32_t pad64; 198 int32_t scanout;
196}; 199};
197 200
198/** 201/**
@@ -295,17 +298,28 @@ union drm_vmw_surface_reference_arg {
295 * 298 *
296 * @commands: User-space address of a command buffer cast to an uint64_t. 299 * @commands: User-space address of a command buffer cast to an uint64_t.
297 * @command-size: Size in bytes of the command buffer. 300 * @command-size: Size in bytes of the command buffer.
301 * @throttle-us: Sleep until software is less than @throttle_us
302 * microseconds ahead of hardware. The driver may round this value
303 * to the nearest kernel tick.
298 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 304 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
299 * uint64_t. 305 * uint64_t.
306 * @version: Allows expanding the execbuf ioctl parameters without breaking
307 * backwards compatibility, since user-space will always tell the kernel
308 * which version it uses.
309 * @flags: Execbuf flags. None currently.
300 * 310 *
301 * Argument to the DRM_VMW_EXECBUF Ioctl. 311 * Argument to the DRM_VMW_EXECBUF Ioctl.
302 */ 312 */
303 313
314#define DRM_VMW_EXECBUF_VERSION 0
315
304struct drm_vmw_execbuf_arg { 316struct drm_vmw_execbuf_arg {
305 uint64_t commands; 317 uint64_t commands;
306 uint32_t command_size; 318 uint32_t command_size;
307 uint32_t pad64; 319 uint32_t throttle_us;
308 uint64_t fence_rep; 320 uint64_t fence_rep;
321 uint32_t version;
322 uint32_t flags;
309}; 323};
310 324
311/** 325/**