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-rw-r--r--include/drm/Kbuild1
-rw-r--r--include/drm/drmP.h7
-rw-r--r--include/drm/drm_mode.h3
-rw-r--r--include/drm/i915_drm.h54
-rw-r--r--include/drm/nouveau_drm.h1
-rw-r--r--include/drm/ttm/ttm_bo_driver.h5
-rw-r--r--include/drm/ttm/ttm_object.h6
-rw-r--r--include/drm/vmwgfx_drm.h588
8 files changed, 660 insertions, 5 deletions
diff --git a/include/drm/Kbuild b/include/drm/Kbuild
index cfa6af43c9ea..bd3a1c2fbdb4 100644
--- a/include/drm/Kbuild
+++ b/include/drm/Kbuild
@@ -7,5 +7,6 @@ unifdef-y += r128_drm.h
7unifdef-y += radeon_drm.h 7unifdef-y += radeon_drm.h
8unifdef-y += sis_drm.h 8unifdef-y += sis_drm.h
9unifdef-y += savage_drm.h 9unifdef-y += savage_drm.h
10unifdef-y += vmwgfx_drm.h
10unifdef-y += via_drm.h 11unifdef-y += via_drm.h
11unifdef-y += nouveau_drm.h 12unifdef-y += nouveau_drm.h
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 19ef8ebdc662..ffac157fb5b2 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -296,6 +296,7 @@ typedef int drm_ioctl_compat_t(struct file *filp, unsigned int cmd,
296#define DRM_MASTER 0x2 296#define DRM_MASTER 0x2
297#define DRM_ROOT_ONLY 0x4 297#define DRM_ROOT_ONLY 0x4
298#define DRM_CONTROL_ALLOW 0x8 298#define DRM_CONTROL_ALLOW 0x8
299#define DRM_UNLOCKED 0x10
299 300
300struct drm_ioctl_desc { 301struct drm_ioctl_desc {
301 unsigned int cmd; 302 unsigned int cmd;
@@ -1128,8 +1129,8 @@ static inline int drm_mtrr_del(int handle, unsigned long offset,
1128 /* Driver support (drm_drv.h) */ 1129 /* Driver support (drm_drv.h) */
1129extern int drm_init(struct drm_driver *driver); 1130extern int drm_init(struct drm_driver *driver);
1130extern void drm_exit(struct drm_driver *driver); 1131extern void drm_exit(struct drm_driver *driver);
1131extern int drm_ioctl(struct inode *inode, struct file *filp, 1132extern long drm_ioctl(struct file *filp,
1132 unsigned int cmd, unsigned long arg); 1133 unsigned int cmd, unsigned long arg);
1133extern long drm_compat_ioctl(struct file *filp, 1134extern long drm_compat_ioctl(struct file *filp,
1134 unsigned int cmd, unsigned long arg); 1135 unsigned int cmd, unsigned long arg);
1135extern int drm_lastclose(struct drm_device *dev); 1136extern int drm_lastclose(struct drm_device *dev);
@@ -1407,7 +1408,7 @@ extern int drm_ati_pcigart_cleanup(struct drm_device *dev,
1407 struct drm_ati_pcigart_info * gart_info); 1408 struct drm_ati_pcigart_info * gart_info);
1408 1409
1409extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size, 1410extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
1410 size_t align, dma_addr_t maxaddr); 1411 size_t align);
1411extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); 1412extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
1412extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); 1413extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
1413 1414
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 43009bc2e757..c5ba1636613c 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -85,7 +85,7 @@ struct drm_mode_modeinfo {
85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
87 87
88 __u32 vrefresh; /* vertical refresh * 1000 */ 88 __u32 vrefresh;
89 89
90 __u32 flags; 90 __u32 flags;
91 __u32 type; 91 __u32 type;
@@ -160,6 +160,7 @@ struct drm_mode_get_encoder {
160#define DRM_MODE_CONNECTOR_HDMIA 11 160#define DRM_MODE_CONNECTOR_HDMIA 11
161#define DRM_MODE_CONNECTOR_HDMIB 12 161#define DRM_MODE_CONNECTOR_HDMIB 12
162#define DRM_MODE_CONNECTOR_TV 13 162#define DRM_MODE_CONNECTOR_TV 13
163#define DRM_MODE_CONNECTOR_eDP 14
163 164
164struct drm_mode_get_connector { 165struct drm_mode_get_connector {
165 166
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index ec3f5e80a5df..b64a8d7cdf6d 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -188,6 +188,7 @@ typedef struct _drm_i915_sarea {
188#define DRM_I915_GEM_MADVISE 0x26 188#define DRM_I915_GEM_MADVISE 0x26
189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
190#define DRM_I915_OVERLAY_ATTRS 0x28 190#define DRM_I915_OVERLAY_ATTRS 0x28
191#define DRM_I915_GEM_EXECBUFFER2 0x29
191 192
192#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 193#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
193#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 194#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -207,6 +208,7 @@ typedef struct _drm_i915_sarea {
207#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) 208#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
208#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) 209#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init)
209#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) 210#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
211#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
210#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) 212#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
211#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) 213#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
212#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) 214#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
@@ -272,6 +274,7 @@ typedef struct drm_i915_irq_wait {
272#define I915_PARAM_NUM_FENCES_AVAIL 6 274#define I915_PARAM_NUM_FENCES_AVAIL 6
273#define I915_PARAM_HAS_OVERLAY 7 275#define I915_PARAM_HAS_OVERLAY 7
274#define I915_PARAM_HAS_PAGEFLIPPING 8 276#define I915_PARAM_HAS_PAGEFLIPPING 8
277#define I915_PARAM_HAS_EXECBUF2 9
275 278
276typedef struct drm_i915_getparam { 279typedef struct drm_i915_getparam {
277 int param; 280 int param;
@@ -567,6 +570,57 @@ struct drm_i915_gem_execbuffer {
567 __u64 cliprects_ptr; 570 __u64 cliprects_ptr;
568}; 571};
569 572
573struct drm_i915_gem_exec_object2 {
574 /**
575 * User's handle for a buffer to be bound into the GTT for this
576 * operation.
577 */
578 __u32 handle;
579
580 /** Number of relocations to be performed on this buffer */
581 __u32 relocation_count;
582 /**
583 * Pointer to array of struct drm_i915_gem_relocation_entry containing
584 * the relocations to be performed in this buffer.
585 */
586 __u64 relocs_ptr;
587
588 /** Required alignment in graphics aperture */
589 __u64 alignment;
590
591 /**
592 * Returned value of the updated offset of the object, for future
593 * presumed_offset writes.
594 */
595 __u64 offset;
596
597#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
598 __u64 flags;
599 __u64 rsvd1;
600 __u64 rsvd2;
601};
602
603struct drm_i915_gem_execbuffer2 {
604 /**
605 * List of gem_exec_object2 structs
606 */
607 __u64 buffers_ptr;
608 __u32 buffer_count;
609
610 /** Offset in the batchbuffer to start execution from. */
611 __u32 batch_start_offset;
612 /** Bytes used in batchbuffer from batch_start_offset */
613 __u32 batch_len;
614 __u32 DR1;
615 __u32 DR4;
616 __u32 num_cliprects;
617 /** This is a struct drm_clip_rect *cliprects */
618 __u64 cliprects_ptr;
619 __u64 flags; /* currently unused */
620 __u64 rsvd1;
621 __u64 rsvd2;
622};
623
570struct drm_i915_gem_pin { 624struct drm_i915_gem_pin {
571 /** Handle of the buffer to be pinned. */ 625 /** Handle of the buffer to be pinned. */
572 __u32 handle; 626 __u32 handle;
diff --git a/include/drm/nouveau_drm.h b/include/drm/nouveau_drm.h
index 1e67c441ea82..f745948b61e4 100644
--- a/include/drm/nouveau_drm.h
+++ b/include/drm/nouveau_drm.h
@@ -77,6 +77,7 @@ struct drm_nouveau_gpuobj_free {
77#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10 77#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
78#define NOUVEAU_GETPARAM_CHIPSET_ID 11 78#define NOUVEAU_GETPARAM_CHIPSET_ID 11
79#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12 79#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
80#define NOUVEAU_GETPARAM_GRAPH_UNITS 13
80struct drm_nouveau_getparam { 81struct drm_nouveau_getparam {
81 uint64_t param; 82 uint64_t param;
82 uint64_t value; 83 uint64_t value;
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index ff7664e0c3cd..4c4e0f8375b3 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -353,6 +353,11 @@ struct ttm_bo_driver {
353 /* notify the driver we are taking a fault on this BO 353 /* notify the driver we are taking a fault on this BO
354 * and have reserved it */ 354 * and have reserved it */
355 void (*fault_reserve_notify)(struct ttm_buffer_object *bo); 355 void (*fault_reserve_notify)(struct ttm_buffer_object *bo);
356
357 /**
358 * notify the driver that we're about to swap out this bo
359 */
360 void (*swap_notify) (struct ttm_buffer_object *bo);
356}; 361};
357 362
358/** 363/**
diff --git a/include/drm/ttm/ttm_object.h b/include/drm/ttm/ttm_object.h
index 703ca4db0a29..0d9db099978b 100644
--- a/include/drm/ttm/ttm_object.h
+++ b/include/drm/ttm/ttm_object.h
@@ -77,7 +77,11 @@ enum ttm_object_type {
77 ttm_buffer_type, 77 ttm_buffer_type,
78 ttm_lock_type, 78 ttm_lock_type,
79 ttm_driver_type0 = 256, 79 ttm_driver_type0 = 256,
80 ttm_driver_type1 80 ttm_driver_type1,
81 ttm_driver_type2,
82 ttm_driver_type3,
83 ttm_driver_type4,
84 ttm_driver_type5
81}; 85};
82 86
83struct ttm_object_file; 87struct ttm_object_file;
diff --git a/include/drm/vmwgfx_drm.h b/include/drm/vmwgfx_drm.h
new file mode 100644
index 000000000000..c7645f480d12
--- /dev/null
+++ b/include/drm/vmwgfx_drm.h
@@ -0,0 +1,588 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef __VMWGFX_DRM_H__
29#define __VMWGFX_DRM_H__
30
31#define DRM_VMW_MAX_SURFACE_FACES 6
32#define DRM_VMW_MAX_MIP_LEVELS 24
33
34#define DRM_VMW_EXT_NAME_LEN 128
35
36#define DRM_VMW_GET_PARAM 0
37#define DRM_VMW_ALLOC_DMABUF 1
38#define DRM_VMW_UNREF_DMABUF 2
39#define DRM_VMW_CURSOR_BYPASS 3
40/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
41#define DRM_VMW_CONTROL_STREAM 4
42#define DRM_VMW_CLAIM_STREAM 5
43#define DRM_VMW_UNREF_STREAM 6
44/* guarded by DRM_VMW_PARAM_3D == 1 */
45#define DRM_VMW_CREATE_CONTEXT 7
46#define DRM_VMW_UNREF_CONTEXT 8
47#define DRM_VMW_CREATE_SURFACE 9
48#define DRM_VMW_UNREF_SURFACE 10
49#define DRM_VMW_REF_SURFACE 11
50#define DRM_VMW_EXECBUF 12
51#define DRM_VMW_FIFO_DEBUG 13
52#define DRM_VMW_FENCE_WAIT 14
53
54
55/*************************************************************************/
56/**
57 * DRM_VMW_GET_PARAM - get device information.
58 *
59 * DRM_VMW_PARAM_FIFO_OFFSET:
60 * Offset to use to map the first page of the FIFO read-only.
61 * The fifo is mapped using the mmap() system call on the drm device.
62 *
63 * DRM_VMW_PARAM_OVERLAY_IOCTL:
64 * Does the driver support the overlay ioctl.
65 */
66
67#define DRM_VMW_PARAM_NUM_STREAMS 0
68#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
69#define DRM_VMW_PARAM_3D 2
70#define DRM_VMW_PARAM_FIFO_OFFSET 3
71#define DRM_VMW_PARAM_HW_CAPS 4
72#define DRM_VMW_PARAM_FIFO_CAPS 5
73
74/**
75 * struct drm_vmw_getparam_arg
76 *
77 * @value: Returned value. //Out
78 * @param: Parameter to query. //In.
79 *
80 * Argument to the DRM_VMW_GET_PARAM Ioctl.
81 */
82
83struct drm_vmw_getparam_arg {
84 uint64_t value;
85 uint32_t param;
86 uint32_t pad64;
87};
88
89/*************************************************************************/
90/**
91 * DRM_VMW_EXTENSION - Query device extensions.
92 */
93
94/**
95 * struct drm_vmw_extension_rep
96 *
97 * @exists: The queried extension exists.
98 * @driver_ioctl_offset: Ioctl number of the first ioctl in the extension.
99 * @driver_sarea_offset: Offset to any space in the DRI SAREA
100 * used by the extension.
101 * @major: Major version number of the extension.
102 * @minor: Minor version number of the extension.
103 * @pl: Patch level version number of the extension.
104 *
105 * Output argument to the DRM_VMW_EXTENSION Ioctl.
106 */
107
108struct drm_vmw_extension_rep {
109 int32_t exists;
110 uint32_t driver_ioctl_offset;
111 uint32_t driver_sarea_offset;
112 uint32_t major;
113 uint32_t minor;
114 uint32_t pl;
115 uint32_t pad64;
116};
117
118/**
119 * union drm_vmw_extension_arg
120 *
121 * @extension - Ascii name of the extension to be queried. //In
122 * @rep - Reply as defined above. //Out
123 *
124 * Argument to the DRM_VMW_EXTENSION Ioctl.
125 */
126
127union drm_vmw_extension_arg {
128 char extension[DRM_VMW_EXT_NAME_LEN];
129 struct drm_vmw_extension_rep rep;
130};
131
132/*************************************************************************/
133/**
134 * DRM_VMW_CREATE_CONTEXT - Create a host context.
135 *
136 * Allocates a device unique context id, and queues a create context command
137 * for the host. Does not wait for host completion.
138 */
139
140/**
141 * struct drm_vmw_context_arg
142 *
143 * @cid: Device unique context ID.
144 *
145 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
146 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
147 */
148
149struct drm_vmw_context_arg {
150 int32_t cid;
151 uint32_t pad64;
152};
153
154/*************************************************************************/
155/**
156 * DRM_VMW_UNREF_CONTEXT - Create a host context.
157 *
158 * Frees a global context id, and queues a destroy host command for the host.
159 * Does not wait for host completion. The context ID can be used directly
160 * in the command stream and shows up as the same context ID on the host.
161 */
162
163/*************************************************************************/
164/**
165 * DRM_VMW_CREATE_SURFACE - Create a host suface.
166 *
167 * Allocates a device unique surface id, and queues a create surface command
168 * for the host. Does not wait for host completion. The surface ID can be
169 * used directly in the command stream and shows up as the same surface
170 * ID on the host.
171 */
172
173/**
174 * struct drm_wmv_surface_create_req
175 *
176 * @flags: Surface flags as understood by the host.
177 * @format: Surface format as understood by the host.
178 * @mip_levels: Number of mip levels for each face.
179 * An unused face should have 0 encoded.
180 * @size_addr: Address of a user-space array of sruct drm_vmw_size
181 * cast to an uint64_t for 32-64 bit compatibility.
182 * The size of the array should equal the total number of mipmap levels.
183 * @shareable: Boolean whether other clients (as identified by file descriptors)
184 * may reference this surface.
185 * @scanout: Boolean whether the surface is intended to be used as a
186 * scanout.
187 *
188 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
189 * Output data from the DRM_VMW_REF_SURFACE Ioctl.
190 */
191
192struct drm_vmw_surface_create_req {
193 uint32_t flags;
194 uint32_t format;
195 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
196 uint64_t size_addr;
197 int32_t shareable;
198 int32_t scanout;
199};
200
201/**
202 * struct drm_wmv_surface_arg
203 *
204 * @sid: Surface id of created surface or surface to destroy or reference.
205 *
206 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
207 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
208 * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
209 */
210
211struct drm_vmw_surface_arg {
212 int32_t sid;
213 uint32_t pad64;
214};
215
216/**
217 * struct drm_vmw_size ioctl.
218 *
219 * @width - mip level width
220 * @height - mip level height
221 * @depth - mip level depth
222 *
223 * Description of a mip level.
224 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
225 */
226
227struct drm_vmw_size {
228 uint32_t width;
229 uint32_t height;
230 uint32_t depth;
231 uint32_t pad64;
232};
233
234/**
235 * union drm_vmw_surface_create_arg
236 *
237 * @rep: Output data as described above.
238 * @req: Input data as described above.
239 *
240 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
241 */
242
243union drm_vmw_surface_create_arg {
244 struct drm_vmw_surface_arg rep;
245 struct drm_vmw_surface_create_req req;
246};
247
248/*************************************************************************/
249/**
250 * DRM_VMW_REF_SURFACE - Reference a host surface.
251 *
252 * Puts a reference on a host surface with a give sid, as previously
253 * returned by the DRM_VMW_CREATE_SURFACE ioctl.
254 * A reference will make sure the surface isn't destroyed while we hold
255 * it and will allow the calling client to use the surface ID in the command
256 * stream.
257 *
258 * On successful return, the Ioctl returns the surface information given
259 * in the DRM_VMW_CREATE_SURFACE ioctl.
260 */
261
262/**
263 * union drm_vmw_surface_reference_arg
264 *
265 * @rep: Output data as described above.
266 * @req: Input data as described above.
267 *
268 * Argument to the DRM_VMW_REF_SURFACE Ioctl.
269 */
270
271union drm_vmw_surface_reference_arg {
272 struct drm_vmw_surface_create_req rep;
273 struct drm_vmw_surface_arg req;
274};
275
276/*************************************************************************/
277/**
278 * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
279 *
280 * Clear a reference previously put on a host surface.
281 * When all references are gone, including the one implicitly placed
282 * on creation,
283 * a destroy surface command will be queued for the host.
284 * Does not wait for completion.
285 */
286
287/*************************************************************************/
288/**
289 * DRM_VMW_EXECBUF
290 *
291 * Submit a command buffer for execution on the host, and return a
292 * fence sequence that when signaled, indicates that the command buffer has
293 * executed.
294 */
295
296/**
297 * struct drm_vmw_execbuf_arg
298 *
299 * @commands: User-space address of a command buffer cast to an uint64_t.
300 * @command-size: Size in bytes of the command buffer.
301 * @throttle-us: Sleep until software is less than @throttle_us
302 * microseconds ahead of hardware. The driver may round this value
303 * to the nearest kernel tick.
304 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
305 * uint64_t.
306 * @version: Allows expanding the execbuf ioctl parameters without breaking
307 * backwards compatibility, since user-space will always tell the kernel
308 * which version it uses.
309 * @flags: Execbuf flags. None currently.
310 *
311 * Argument to the DRM_VMW_EXECBUF Ioctl.
312 */
313
314#define DRM_VMW_EXECBUF_VERSION 0
315
316struct drm_vmw_execbuf_arg {
317 uint64_t commands;
318 uint32_t command_size;
319 uint32_t throttle_us;
320 uint64_t fence_rep;
321 uint32_t version;
322 uint32_t flags;
323};
324
325/**
326 * struct drm_vmw_fence_rep
327 *
328 * @fence_seq: Fence sequence associated with a command submission.
329 * @error: This member should've been set to -EFAULT on submission.
330 * The following actions should be take on completion:
331 * error == -EFAULT: Fence communication failed. The host is synchronized.
332 * Use the last fence id read from the FIFO fence register.
333 * error != 0 && error != -EFAULT:
334 * Fence submission failed. The host is synchronized. Use the fence_seq member.
335 * error == 0: All is OK, The host may not be synchronized.
336 * Use the fence_seq member.
337 *
338 * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
339 */
340
341struct drm_vmw_fence_rep {
342 uint64_t fence_seq;
343 int32_t error;
344 uint32_t pad64;
345};
346
347/*************************************************************************/
348/**
349 * DRM_VMW_ALLOC_DMABUF
350 *
351 * Allocate a DMA buffer that is visible also to the host.
352 * NOTE: The buffer is
353 * identified by a handle and an offset, which are private to the guest, but
354 * useable in the command stream. The guest kernel may translate these
355 * and patch up the command stream accordingly. In the future, the offset may
356 * be zero at all times, or it may disappear from the interface before it is
357 * fixed.
358 *
359 * The DMA buffer may stay user-space mapped in the guest at all times,
360 * and is thus suitable for sub-allocation.
361 *
362 * DMA buffers are mapped using the mmap() syscall on the drm device.
363 */
364
365/**
366 * struct drm_vmw_alloc_dmabuf_req
367 *
368 * @size: Required minimum size of the buffer.
369 *
370 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
371 */
372
373struct drm_vmw_alloc_dmabuf_req {
374 uint32_t size;
375 uint32_t pad64;
376};
377
378/**
379 * struct drm_vmw_dmabuf_rep
380 *
381 * @map_handle: Offset to use in the mmap() call used to map the buffer.
382 * @handle: Handle unique to this buffer. Used for unreferencing.
383 * @cur_gmr_id: GMR id to use in the command stream when this buffer is
384 * referenced. See not above.
385 * @cur_gmr_offset: Offset to use in the command stream when this buffer is
386 * referenced. See note above.
387 *
388 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
389 */
390
391struct drm_vmw_dmabuf_rep {
392 uint64_t map_handle;
393 uint32_t handle;
394 uint32_t cur_gmr_id;
395 uint32_t cur_gmr_offset;
396 uint32_t pad64;
397};
398
399/**
400 * union drm_vmw_dmabuf_arg
401 *
402 * @req: Input data as described above.
403 * @rep: Output data as described above.
404 *
405 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
406 */
407
408union drm_vmw_alloc_dmabuf_arg {
409 struct drm_vmw_alloc_dmabuf_req req;
410 struct drm_vmw_dmabuf_rep rep;
411};
412
413/*************************************************************************/
414/**
415 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
416 *
417 */
418
419/**
420 * struct drm_vmw_unref_dmabuf_arg
421 *
422 * @handle: Handle indicating what buffer to free. Obtained from the
423 * DRM_VMW_ALLOC_DMABUF Ioctl.
424 *
425 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
426 */
427
428struct drm_vmw_unref_dmabuf_arg {
429 uint32_t handle;
430 uint32_t pad64;
431};
432
433/*************************************************************************/
434/**
435 * DRM_VMW_FIFO_DEBUG - Get last FIFO submission.
436 *
437 * This IOCTL copies the last FIFO submission directly out of the FIFO buffer.
438 */
439
440/**
441 * struct drm_vmw_fifo_debug_arg
442 *
443 * @debug_buffer: User space address of a debug_buffer cast to an uint64_t //In
444 * @debug_buffer_size: Size in bytes of debug buffer //In
445 * @used_size: Number of bytes copied to the buffer // Out
446 * @did_not_fit: Boolean indicating that the fifo contents did not fit. //Out
447 *
448 * Argument to the DRM_VMW_FIFO_DEBUG Ioctl.
449 */
450
451struct drm_vmw_fifo_debug_arg {
452 uint64_t debug_buffer;
453 uint32_t debug_buffer_size;
454 uint32_t used_size;
455 int32_t did_not_fit;
456 uint32_t pad64;
457};
458
459struct drm_vmw_fence_wait_arg {
460 uint64_t sequence;
461 uint64_t kernel_cookie;
462 int32_t cookie_valid;
463 int32_t pad64;
464};
465
466/*************************************************************************/
467/**
468 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
469 *
470 * This IOCTL controls the overlay units of the svga device.
471 * The SVGA overlay units does not work like regular hardware units in
472 * that they do not automaticaly read back the contents of the given dma
473 * buffer. But instead only read back for each call to this ioctl, and
474 * at any point between this call being made and a following call that
475 * either changes the buffer or disables the stream.
476 */
477
478/**
479 * struct drm_vmw_rect
480 *
481 * Defines a rectangle. Used in the overlay ioctl to define
482 * source and destination rectangle.
483 */
484
485struct drm_vmw_rect {
486 int32_t x;
487 int32_t y;
488 uint32_t w;
489 uint32_t h;
490};
491
492/**
493 * struct drm_vmw_control_stream_arg
494 *
495 * @stream_id: Stearm to control
496 * @enabled: If false all following arguments are ignored.
497 * @handle: Handle to buffer for getting data from.
498 * @format: Format of the overlay as understood by the host.
499 * @width: Width of the overlay.
500 * @height: Height of the overlay.
501 * @size: Size of the overlay in bytes.
502 * @pitch: Array of pitches, the two last are only used for YUV12 formats.
503 * @offset: Offset from start of dma buffer to overlay.
504 * @src: Source rect, must be within the defined area above.
505 * @dst: Destination rect, x and y may be negative.
506 *
507 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
508 */
509
510struct drm_vmw_control_stream_arg {
511 uint32_t stream_id;
512 uint32_t enabled;
513
514 uint32_t flags;
515 uint32_t color_key;
516
517 uint32_t handle;
518 uint32_t offset;
519 int32_t format;
520 uint32_t size;
521 uint32_t width;
522 uint32_t height;
523 uint32_t pitch[3];
524
525 uint32_t pad64;
526 struct drm_vmw_rect src;
527 struct drm_vmw_rect dst;
528};
529
530/*************************************************************************/
531/**
532 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
533 *
534 */
535
536#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
537#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
538
539/**
540 * struct drm_vmw_cursor_bypass_arg
541 *
542 * @flags: Flags.
543 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
544 * @xpos: X position of cursor.
545 * @ypos: Y position of cursor.
546 * @xhot: X hotspot.
547 * @yhot: Y hotspot.
548 *
549 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
550 */
551
552struct drm_vmw_cursor_bypass_arg {
553 uint32_t flags;
554 uint32_t crtc_id;
555 int32_t xpos;
556 int32_t ypos;
557 int32_t xhot;
558 int32_t yhot;
559};
560
561/*************************************************************************/
562/**
563 * DRM_VMW_CLAIM_STREAM - Claim a single stream.
564 */
565
566/**
567 * struct drm_vmw_context_arg
568 *
569 * @stream_id: Device unique context ID.
570 *
571 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
572 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
573 */
574
575struct drm_vmw_stream_arg {
576 uint32_t stream_id;
577 uint32_t pad64;
578};
579
580/*************************************************************************/
581/**
582 * DRM_VMW_UNREF_STREAM - Unclaim a stream.
583 *
584 * Return a single stream that was claimed by this process. Also makes
585 * sure that the stream has been stopped.
586 */
587
588#endif